H5N2001LD

H5N2001LD RENESAS | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 8

Technical content

Features

• Low on-resistance
• Low leakage current
• High speed switching Outline 1 2 3 1 2 3 1 2 3 (Package name: LDPAK (L) ) (Package name: LDPAK (S)-(1) ) (Package name: LDPAK (S)-(2) ) H5N2001LD H5N2001LS H5N2001LM 1. Gate 2. Drain 3. Source 4. Drain D G S

H5N2001LD, H5N2001LS, H5N2001LM Rev.6.00 Jul 14, 2006 page 2 of 7 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Drain to source voltage V DSS 200 V Gate to source voltage V GSS ±30 V Drain current I D 20 A Drain peak current I D (pulse) Note 1 80 A Body to drain diode reverse drain current I DR 20 A Body to drain diode reverse drain peak current I DR (pulse) Note 1 80 A Avalanche current I AP Note 3 20 A Channel dissipation Pch Note 2 75 W Channel to case Thermal Impedance θ ch-c 1.67 °C/W Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25 °C 3. Tch ≤ 150°C

Electrical Characteristics

(Ta = 25°C) Item Symbol Min Typ Max Unit Test Conditions Drain to source breakdown voltage V (BR) DSS 200 — — V I D = 10 mA, VGS = 0 Gate to source leak current I GSS — — ±0.1 µA V GS = ±30 V, VDS = 0 Zero gate voltage drain current I DSS — — 1 µA V DS = 200 V, VGS = 0 Gate to source cutoff voltage V GS (off) 3.0 — 4.5 V I D = 1 mA, VDS = 10 V Static drain to source on state resistance R DS (on) — 0.100 0.125 Ω I D = 10 A, VGS = 10 V Note 4 Forward transfer admittance |y fs| 8 14 — S I D = 10 A, VDS = 10 V Note 4 Input capacitance Ciss — 1350 — pF Output capacitance Coss — 180 — pF Reverse transfer capacitance Crss — 55 — pF VDS = 25 V VGS = 0 f = 1 MHz Turn-on delay time t d (on) — 35 — ns Rise time t r — 70 — ns Turn-off delay time t d (off) — 85 — ns Fall time t f — 20 — ns ID = 10 A RL = 10 Ω VGS = 10 V Rg = 10 Ω Total gate charge Qg — 44 — nC Gate to source charge Qgs — 8 — nC Gate to drain charge Qgd — 22 — nC VDD = 160 V VGS = 10 V ID = 20 A Body to drain diode forward voltage V DF — 0.9 1.4 V I F = 20 A, VGS = 0 Note4 Body to drain diode reverse recovery time t rr — 140 — ns Body to drain diode reverse recovery charge Qrr — 0.7 — µC IF = 20 A, VGS = 0 diF/dt = 100 A/µs Note: 4. Pulse test

H5N2001LD, H5N2001LS, H5N2001LM Rev.6.00 Jul 14, 2006 page 3 of 7 Main Characteristics Drain to Source Voltage VDS (V) Drain Current ID (A) Maximum Safe Operation Area Drain to Source Voltage VDS (V) Drain Current ID (A) Typical Output Characteristics Gate to Source Voltage VGS (V) Drain Current ID (A) Typical Transfer Characteristics 02468 1 0 Tc = 75°C 25°C –25°C 100 0.3 0.03 0.1 0.01 13 3 0 3 0 0 10 100 1000 VDS = 10 V Pulse Test 1000 300 Ta = 25°C DC Operation Tc = 25°C Operation in this area is limited by R DS (on) 100 50 100 150 200 Channel Dissipation Pch (W) Case Temperature Tc (°C) Power vs. Temperature Derating Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage VDS(on) (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Drain Current ID (A) Drain to Source On State Resistance RDS(on) (Ω) Static Drain to Source on State Resistance vs. Drain Current 048 1 2 1 6 2 0 0.2 0.1 0.02 0.05 0.01 10 100 300 Pulse Test ID = 20 A 5 A 10 A 13 0 10003

0.5 VGS = 10 V

µs 10 µs 048 1 2 1 6 20 10 V

7 V8 V

VGS = 5 V 6 V PW = 10 ms (1shot)

H5N2001LD, H5N2001LS, H5N2001LM Rev.6.00 Jul 14, 2006 page 4 of 7 Case Temperature Tc (°C) Static Drain to Source on State Resistance RDS(on) (Ω) Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance |yfs| (S) Drain Current ID (A) Forward Transfer Admittance vs. Drain Current 0.5 –25 0 25 75 50 100 150 125 0.1 0.2 0.3 0.4 ID = 20 A 10 A 5 A VGS = 10 V Pulse Test 33 00.1 1 10 1000.3 100 0.3 0.1 Tc = –25°C VDS = 10 V Pulse Test 75°C 25°C Capacitance C (pF) Drain to Source Voltage VDS (V) Typical Capacitance vs. Drain to Source Voltage 0 50 100 150 100000 30000 3000 10000 300 1000 100 Ciss Coss Crss VGS = 0 f = 1 MHz 400 300 200 100 20 40 60 80 100 ID = 20 A VGS VDS VDD = 160 V 100 V 50 V VDD = 160 V 100 V 50 V Gate Charge Qg (nc) Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Dynamic Input Characteristics 0.1 0.3 1 3 10 30 100 1000 500 100 200 di / dt = 100 A / µs VGS = 0, Ta = 25°C Reverse Drain Current IDR (A) Reverse Recovery Time trr (ns) Body to Drain Diode Reverse Recovery Time 1000 3000 100 0.1 0.3 10 100 3 Drain Current ID (A) Switching Time t (ns) Switching Characteristics 13 0 10000 300 tr tr td(on) td(off) tf tf VGS = 10 V, VDD = 100 V RW = 5 µs, duty ≤ 1 % Rg = 10 Ω

H5N2001LD, H5N2001LS, H5N2001LM Rev.6.00 Jul 14, 2006 page 5 of 7 Source to Drain Voltage VSD (V) Reverse Drain Current IDR (A) Reverse Drain Current vs. Souece to Drain Voltage Pulse Test VGS = 0, –5 V 5 V 10 V Case Temperature Tc (°C) Gate to Source Cutoff Voltage VGS (off) (V) –25 02 5 7 5 50 125 100 150 Gate to Source Cutoff Voltage vs. Case Temperature 0.1 mA VDS = 10 V ID = 10 mA 1 mA trtd(on) Vin 90% 90% 10% 10%Vout td(off) 90% 10% tf Switching Time Test Circuit Switching Time Waveform Vin Monitor D.U.T. Vin 10 V RL Vout Monitor 10 Ω VDD = 100 V Pulse Width PW (S) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γ s (t) 0.3 0.1 0.03 0.01 10 µ 100 µ 1 m 10 m 100 m 1 10 Tc = 25°C D = 1 0.5 0.2 0.1 0.05 0.02 0.01 1shot pulse PDM PW T D = PW T θch – c (t) = γ s (t)  θch – c θch – c = 1.67°C/W, Tc = 25°C

H5N2001LD, H5N2001LS, H5N2001LM Rev.6.00 Jul 14, 2006 page 6 of 7 Package Dimensions 10.2 ± 0.3 0.86 0.76 ± 0.1 + 0.2 – 0.1 1.3 ± 0.2 4.44 ± 0.2 1.3 ± 0.15 2.49 ± 0.2 0.4 ± 0.1 11.0 ± 0.5 8.6 ± 0.3 10.0 11.3 ± 0.5 + 0.3 – 0.5 (1.4) 1.37 ± 0.2 Previous Code PRSS0004AE-A LDPAK(L) / LDPAK(L)V MASS[Typ.] 1.40g RENESAS CodeJEITA Package Code Unit: mm Package Name LDPAK(L) 10.2 ± 0.3 1.37 ± 0.2 (1.5) (1.4)8.6 ± 0.3 10.0 + 0.3 – 0.5 4.44 ± 0.2 1.3 ± 0.15 0.1 + 0.2 – 0.1 0.4 ± 0.1 2.49 ± 0.2 0.86 + 0.2 – 0.1 1.3 ± 0.2 3.0 + 0.3 – 0.5 (1.5) 7.8 6.6 2.2 1.7 7.8 7.0 SC-83 1.30g MASS[Typ.] LDPAK(S)-(1) / LDPAK(S)-(1)VPRSS0004AE-B RENESAS CodeJEITA Package Code Previous Code Unit: mmPackage Name LDPAK(S)-(1)

H5N2001LD, H5N2001LS, H5N2001LM Rev.6.00 Jul 14, 2006 page 7 of 7  1.35g MASS[Typ.] LDPAK(S)-(2) / LDPAK(S)-(2)VPRSS0004AE-C RENESAS CodeJEITA Package Code Previous Code Unit: mm 10.2 ± 0.3 1.37 ± 0.2 (2.3) (1.4)8.6 ± 0.3 10.0 + 0.3 – 0.5 4.44 ± 0.2 1.3 ± 0.15 0.1 + 0.2 – 0.1 0.4 ± 0.1 2.49 ± 0.2 0.86 + 0.2 – 0.1 1.3 ± 0.2 5.0 + 0.3 – 0.5 (1.5) 7.8 6.6 2.2 1.7 7.8 7.0 Package Name LDPAK(S)-(2)

Ordering Information

Part Name Quantity Shipping Container H5N2001LD-E 500 pcs Box (Conductive Sack) H5N2001LSTL-E 1000 pcs Taping H5N2001LMTL-E 1000 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.

Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Renesas Technology Singapore Pte. Ltd.

1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632

Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510 RENESAS SALES OFFICES © 2006. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .6.0