GM3842A

GM3842A GAMMA | Alldatasheet

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Technical content

Features

Low Start-Up and Operating Current Automatic Feed Forward Compensation Current Mode Operating Frequency up to 500kHz Trimmed Oscillator Discharge Current for Precise Duty Cycle Control Latching PWM for Cycle-By-Cycle Current Limiting Undervoltage Lockout with Hysteresis High Current Totem Pole Output The GM384XA Have Start-up Current 0.17mA GM3842A, GM3843A, GM3844A, GM3845A www.gammamicro.com 1 SIMPLIFIED BLOCK DIAGRAM Error Amplifier R R 5.0V REFERENCE VCC Undervoltage LOCKOUT VREF Undervoltage LOCKOUT OSCILLATOR Latching PWM VCC VC Output Power Ground Current Sense Input Vref R/ CT T Voltage Feedback Input Output Compensation GND V1.0

MARKING INFORMATION & PIN CONFIGURATIONS (TOP VIEW) Ordering Number Package Shipping GM3842AS8T GM3843AS8T GM3844AS8T GM3845AS8T GM3842AS8R GM3843AS8R GM3844AS8R GM3845AS8R GM3842AD8T GM3843AD8T GM3844AD8T GM3845AD8T SOP - 8 SOP - 8 SOP - 8 SOP - 8 SOP - 8 SOP - 8 SOP - 8 SOP - 8 DIP-8 DIP-8 DIP-8 DIP-8

100 Units/ Tube

2,500 Units/ Tape & Reel 2,500 Units/ Tape & Reel 2,500 Units/ Tape & Reel 2,500 Units/ Tape & Reel

60 Units/ Tube

GM3842A, GM3843A, GM3844A, GM3845A ORDERING INFORMATION (Green Package Products are available now!) SOP - 8 2 3 4 5678 VCC VREF OUTPUT GND COMP FB R / CTT ISENSE GM384X * For detail ordering number identification, please see last page. ** For green package products, please add " G" at the end of each part number. Ayww Ayww A = Assembly Location Y = Year W W = Weekly

This pin is Error Amplifier output and is made available for loop compensation. This pin is the combined control circuitry and power ground. This pin is the positive supply of the control integrated circuit (IC) This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider. This output directly drives the gate of a power MOSFET. Peak current up to 1.0A are sourced and sunk by this pin. This is the reference output. It provides charging current for capacitor C T through resistor R T. A voltage proportional to inductor current connected to this input. The PWM uses this information to terminate the output switch conduction. Oscillator frequency and maximum Output cycle are programmed by connecting resistor to V and capacitor C to ground. RT REF T PIN lead GM3842A, GM3843A, GM3844A, GM3845A PARAMETER SYMBOL VALUE UNIT ABSOLUTE MAXIMUM RATINGS Supply Voltage (low impedance source) Output Current, Source or Sink * Input Voltage (analog inputs pins 2) Maximum Power Dissipation (T = 25°C)A Error Amp Output Sink Current Storage Temperature Range Lead Temperature (soldering 5 sec.) ±1.0 - 0.3 to + 5.5 V A VCC IO VI PD ISINK(E.A) Tstg TL 1.0 - 65 to + 150 260 W mA V * Note: Maximum Package Power Dissipation Limits must be observed. VCC

GM3842A, GM3843A, GM3844A, GM3845A REPRESENTATIVE BLOCK DIAGRAM VCC VIN VCC 7 VC Output Power Ground Current Sense Input RS 36V -VCC UVLO Reference Regulator Vref UVLO 3.6V Internal Baias R R Oscillator 2.5V Vref RT CT Voltage Feedback Input Output Compensation + 1.0mA Error Amplifier R 1.0V GND Current Sense Comparator + PWM Latch S R Q Q T = Sink Only Positive True Logic (Toggle flip flop used only in GM3844A, GM3845A) Capacitor CT Latch "Set" Input Output/ Compensation Current Sense Input Latch "Reset" Input Output Latch R / Small CT T Small / Latch CT TR TIMING DIAGRAM 1/2 Vref

GM3842A, GM3843A, GM3844A, GM3845A

ELECTRICAL CHARACTERISTICS

(T = 0°C to 70°C, *V =15V, C =3.3nF, R =10kW, unless otherwise specified )AC C T T TYP MAX UNIT CHARACTERISTICS TEST CONDITIONS MIN SYMBOL Reference Section Oscillator Section Error Amplifier Section Current Sense Section Output Section Undervoltage Lockout Section Reference Output Voltage Oscillation Frequency Input Bias Current Current Sense Input Voltage Gain Rise Time Fall Time Low Output Voltage Start Threshold High Output Voltage Minimum Operating Voltage (after tum ON) Line Regulation Frequency Change with Voltage Input Voltage Maximum Input Signal Load Regulation Oscillator Amplitude Open Loop Voltage Gain Supply Voltage Rejection Power Supply Rejection Ratio Input Bias Current Output Sink Current Output Source Current High Output Voltage Low Output Voltage Short Circuit Output Current VREF f DVREF Df/ DVCC VI(EA) VI(MAX) DVREF V(OSC) AVOL SVR PSRR ISC T = 25°C, I = 1mAJ REF T = 25°CJ V = 3VFB (Note 1 and 2) T = 25°C, C = 1nF(Note 3)JL T = 25°C, C = 1nF(Note 3)JL I = 20mASINK GM3842A, GM3844A I = 20mASOURCE GM3842A, GM3844A 4.9 5.0 -0.1 3.0 0.08 16.0 13.5 6.0 6.0 1.6 -3.0 -1.0 6.0 0.8 -100 5.1 3.15 150 150 0.4 17.5 1.0 2.58 1.1 2.2 9.0 -180 V kHz µA V/ V nS nS mV V V V V V V mV V dB dB dB µA mA 12V V 25V CC 12V V 25V CC V =2.5V PIN1 V =5V (Note 1)PIN1 I = 200mASINK GM3843A, GM3845A I = 200mASOURCE GM3843A, GM3845A 1mA 20mA IREF (Peak to Peak) T =25°C A 0.05 2.5 1.0 1.4 8.4 7.6 IBIAS GV tR tF VOL VTH(ST) VOH VOPR(MIN) 2V V 4V O -0.5 5.0 12V V 25V CC V =2.7V, PIN2 V =1.1VPIN1 V =2.3V, PIN2 V =5VPIN1 V =2.3V, R PIN2 =15kW to GNDL V =2.7V, RPIN2 =15kW to PIN8L ISINK ISOURCE VOH VOL mA mA V V1.1 2.85 0.9 12V V 25V (Note 1) CC IBIAS V =3V PIN3 -10 8.5 7.0 14.5 7.8 11.5 8.2 2.42

GM3842A, GM3843A, GM3844A and GM3845A are high performance with fixed frequency, current mode controllers. They are designed for off-ine and DC-to-DC converter applications offering great versatility with minimal external components. A representative block diagram is shown on page 4. Oscillator The oscillator frequency is determined by the values of the timing components R and C . Capacitor C is TT T charged from the 5.0 V reference through resistor R to approximately 2.8 V and discharged to 1.2 V by an T internal current sink. During the of C , the oscillator generates an internal blanking pulse that holds the center T input of the NOR gate high. This causes the output to be in a low state, thus producing a controlled amount of Figure 2 show R versus oscillator frequency and Figure 2, Output deadtime versus frequency, both for given T values of C output deadtime. T Note that different values of R and C will give the same oscillator frequency, but only one combination will yield TT a specific output deadtime at a given frequency. The oscillator thresholds are temperature com pensated. These interned circuit vefinements minimizes refinements of oscillator frequency and maximum output duty cycle. In many noise sensitive applications, it may be desirable to frequency-lock the converter to an external system clock. This can be accmplished by applying a clock signal to the circuit shown in Figure 9. For best locking results, set the free-unning oscillator frequency to about 10% less than the clock frequency. A method for multi unit synchronization is shown in Figure 10. You can get very accurate output duty cycle clamping by tweaking the clock waveform. Error Amplifier GM384XA series has a fully compensated error amplifier with access to both the inverting input and output, and providing DC voltage gain of 90 dB (typical). The noninverting input is internally biased at 2.5 V and is not pinned out. The converter output voltage is typically divided down and monitored by the inverting input. The maximum input bias current is -2.0 µA, which can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. The Error Amplifier Output (Pin 1) allows external loop compensation. The output voltage is offset by the two diode drops ( 1.4 V) and divided by three before it connects to the inverting input of the Current Sense Comparator. This assures that no drive pulses appear at the Output (Pin 6) when Pin 1 is at its lowest state (V ). This happens when the power supply is operating and the load is removed, or at the beginning of a soft-OL start interval (Figures 11, 12). The Error Amp minimum feedback resistance is limited by the amplifier's source current (0.5 mA) and the required output voltage (V ) to reach the comparator's 1.0 V clamp level:OH Current Sense Comparator and PWM Latch GM384XA series operates as a current mode controller , whereby output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the Error Amplifier Output/Compensation (Pin1). The error signal controls the peak inductor current cycle-by-cycle basis. The Current Sense Comparator PWM Latch configuration assures that only a single pulse appears at the Output during any given oscillator cycle. The inductor current is converted to a voltage by inserting the ground- referenced sense resistor R in series with the source of output switch Q1. This voltage is monitored by the S Current Sense Input (Pin 3) and compared to a level derived from the Error Amp Output. The peak inductor current under normal operating conditions is controlled by the voltage at pin 1 where: When the power supply output is overloaded or if output voltage sensing is lost, the chip operation is not normal. In these situations, the Current Sense Comparator threshold will be internally clamped to 1.0 V and the maximum peak switch current is: R = 8800Wf(min) 3.0(1.0V) + 1.4V 0.5mA I=pk V - 1.4V(PIN1) 3 RS I=pk(mak) 1.0V RS GM3842A, GM3843A, GM3844A, GM3845A

When designing a high power switching regulator, it becomes desirable to reduce the internal clamp voltage in order, to keep a reasonable level of power dissipation of R . Adjusting the internal clamp voltage is very simple, S as shown in Figure 11. The two external diodes compensate the internal diodes so you get a constant clamp voltage over temperature. Avoid too much reduction of the I clamp voltage, or you will get noise pickup and pk(max) erratic results. A narrow spike on the leading edge of the current waveform often occurs and can cause the power supply instability when the output load is light. This spike is caused by power transformer interwinding capacitance and output rectifier recovery time. You can eliminate this problem by adding an RC filter on the Current Sense Input, with a time constant similar to the spike's duration; see Figure 16. Undervoltage Lockout Two UVLO comparators in GM384XA series assure that the chips are fully functional before the output stage is enabled. The positive power supply terminal (V ) and the reference output (V ) have separate comparators. CC ref Each has built-in hysteresis to prevent erratic output behavior as their thresholds are reached. The V CC comparator's upper and lower thresholds are 16 V/10 V for GM3842A and GM3844A, and 8.4V/7.6V for GM3843A and GM3845A. The V comparator's upper and lower thresholds are 3.6V/3.4 V. The large hysteresis and low startup current of ref the GM3842A and GM3844A makes them ideal for off-line converter applications where efficient bootstrap startup is required. GM3843A and GM3845A are intended for lower voltage DC-to-DC converter applications. A 36 V zener is connected as a shunt regulator from V to ground. Its purpose is to protect the IC from excessive voltage that CC can occur during system startup. The minimum operating voltage for GM3842A and GM3844A is 11V ; for GM3843A and GM3845A it is 8.2V. Output GM384XA series has a single totem pole output stage that was designed for direct drive of power MOSFET s. It provides up to ±1.0 A peak drive current and has a typical rise/ fall time of 50 ns with a 1.0 nF load. Additional internal circuitry keeps the output in a sinking mode whenever a UVLO is active. This eliminates the need for an external pull-down resistor. Reference The 5.0 V bandgap reference is trimmed to ±1.0% tolerance at T = 25°C on the GM384XA series. Its primary J purpose is to supply charging current to the oscillator timing capacitor. The reference has short circuit protection and it can provide more than 20mA for powering additional control system circuitry. Design Considerations Do not make your converter to use wire-wrap or plug-in prototype boards. High-frequency circuit layout techniques must be observed to prevent pulsewidth jitter. This is usually caused by excessive noise pick-up imposed on the Current Sense or Voltage Feedback inputs. Y ou can improve noice immunity by lowering circuit impedances at these points. The PCB layout should have a ground plane with low-current signal and high- current switch and output grounds returning on separate paths to the input filter capacitor. Ceramic bypass capacitors (0.1 µF) connected directly to V , V , and V may be required, depending upon circuit layout, to CC C ref provide a low impedance path for filtering high frequency noise. All high-current loops should be as short as possible and use heavy copper runs to minimize radiated EMI. The Error Amp compensation circuitry and the converter output voltage divider should be placed as close as possible to the GM384XA, and as far as possible from the power switch and other noise- generating components. GM3842A, GM3843A, GM3844A, GM3845A

reaches the threshold established by the control voltage. Figure 9. Continuous Current Waveforms

5.0 Vref

Figure 12. Adjustable reduction of clamp level Figure 13. Soft-start circuit

Figure 14. Adjustable buffered reduction of clamp level with soft-start Figure 15. Current sensing power mosfet clamp level must be implemented.

Figure 16. current wavefrom spike suppression

capacitance and any series wiring inductance in the gate-source circuit. Figure 17. MOSFET Parasitic Oscillations Figure 18. Isolated MOSFET Drive for boost and flyback converters operating with continuous inductor current.

Figure 19. Latched Shutdown The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10 k. continuous inductor current.

GM3842A, GM3843A, GM3844A, GM3845A 0.275 7.0 0.155 4.0 0.060 1.52 0.050 1.270 0.024 0.6 Inches mm( ) Pad Layout 0 ~ 8°° SOP-8 P ACKAGE OUTLINE DIMENSIONS PIN INDENT 0.0285 ± 0.0105 0.725 ± 0.275 0.008 ± 0.002 0.203 ± 0.05 0.238 ± 0.008 6.04 ± 0.2 0.155 ± 0.004 3.94 ± 0.1 0.693 ± 0.504 4.91 ± 0.1 0.05 1.27 0.057 ± 0.004 1.45 ± 0.1 0.007 ± 0.003 0.175 ± 0.075 0.016 ± 0.004 0.406 ± 0.1 0.063 ± 0.006 1.60 ± 0.15

0.02 MIN

0.51 MIN

DIP-8 P ACKAGE OUTLINE DIMENSIONS 0.362 ± 0.008 9.20 ± 0.2 0.018 ± 0.004 0.46 ± 0.10 0.06 ± 0.006 1.524 ± 0.15 Inches mm( ) 0.252 ± 0.008 6.40 ± 0.2 0.1 ± 0.008 2.54 ± 0.2 0.134 ± 0.008 3.40 ± 0.2 0.158 ± 0.012 4.01 ± 0.3 0.13 ± 0.008 3.30 ± 0.2 0.3 ± 0.008 7.62 ± 0.2 0.3425 ± 0.0155 8.70 ± 0.4 0.012 ± 0.004 0.304 ± 0.1

GM3842A, GM3843A, GM3844A, GM3845A ORDERING NUMBER GM 3842 A S8 R Gamma Micro. Circuit Type Package S8: SOP-8 D8: DIP-8 Shipping R: Tape & Reel "A" Version

GM3842A, GM3843A, GM3844A, GM3845A