GBL06

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GBL005, GBL01, GBL02, GBL04, GBL06, GBL08, GBL10 www.vishay.com Vishay General Semiconductor Revision: 16-Aug-13 1 Document Number: 88609 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Glass Passivated Single-Phase Bridge Rectifier

FEATURES

• UL recognition file number E54214
• Ideal for printed circuit boards
• High surge current capability
• Typical I R less than 0.1 μA
• High case dielectric strength
• Solder dip 275 °C max. 10 s, per JESD 22-B106
• Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 TYPICAL APPLICATIONS General purpose use in AC/DC bridge full wave rectification for monitor, TV, printer, SMPS, adapter, audio equipment, and home appliances application. MECHANICAL DATA Case: GBL Molding compound meets UL 94 V-0 flammability rating Base P/N-E3 - RoHS-compliant, commercial grade Terminals: Matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 E3 suffix meets JESD 201 class 1A whisker test Polarity: As marked on body Notes (2) Unit mounted on PCB at 0.375" (9.5 mm) lead length and 0.5" x 0.5" (12 mm x 12 mm) copper pads PRIMARY CHARACTERISTICS Package GBL IF(AV) 4 A VRRM

50 V, 100 V, 200 V, 400 V, 600 V,

800 V, 1000 V

IR 5 μA VF at IF = 4.0 A 1.0 V TJ max. 150 °C Diode variations In-Line Case Type GBL ~ ~ MAXIMUM RATINGS (TA = 25 °C unless otherwise noted) PARAMETER SYMBOL GBL005 GBL01 GBL02 GBL04 GBL06 GBL08 GBL10 UNIT Maximum repetitive peak reverse voltage V RRM 50 100 200 400 600 800 1000 V Maximum RMS voltage V RMS 35 70 140 280 420 560 700 V Maximum DC blocking voltage V DC 50 100 200 400 600 800 1000 V Maximum average forward rectified output current at T C = 50 °C (1) IF(AV) 4.0 A TA = 40 °C (2) 3.0 Peak forward surge current single sine-wave superimposed on rated load I FSM 150 A Rating for fusing (t < 8.3 ms) I 2t9 3 A 2s Operating junction and storage temperature range T J, TSTG - 55 to + 150 °C ELECTRICAL CHARACTERISTICS (TA = 25 °C unless otherwise noted) PARAMETER TEST CONDITIONS SYMBOL GBL005 GBL01 GBL02 GBL04 GBL06 GBL08 GBL10 UNIT Maximum instantaneous forward voltage drop per diode 4.0 A V F 1.0 V Maximum DC reverse current at rated DC blocking voltage per diode T A = 25 °C IR 5.0 μA TA = 125 °C 500 Typical junction capacitance per diode 4.0 V, 1 MHz C J 95 40 pF

GBL005, GBL01, GBL02, GBL04, GBL06, GBL08, GBL10 www.vishay.com Vishay General Semiconductor Revision: 16-Aug-13 2 Document Number: 88609 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Notes (2) Unit mounted on PCB at 0.375" (9.5 mm) lead length and 0.5" x 0.5" (12 mm x 12 mm) copper pads RATINGS AND CHARACTERISTICS CURVES (T A = 25 °C unless otherwise noted) Fig. 1 - Derating Curves Outzput Rectified Current Fig. 2 - Maximum Non-Repetitive Peak Forward Surge Current Per Diode Fig. 3 - Typical Forward Voltage Characteristics Per Diode Fig. 4 - Typical Reverse Characteristics Per Diode THERMAL CHARACTERISTICS (TA = 25 °C unless otherwise noted) PARAMETER SYMBOL GBL005 GBL01 GBL02 GBL04 GBL06 GBL08 GBL10 UNIT Typical thermal resistance R JA (2) 22 °C/W RJC (1) 3.5 ORDERING INFORMATION (Example) PREFERRED P/N UNIT WEIGHT (g ) PREFERRED PACKAGE CODE BA SE QUANTITY DELIVERY MODE GBL06-E3/45 2.18 45 20 Tube GBL06-E3/51 2.18 51 400 Anti-static PVC tray 0 50 100 150 1.0 2.0 3.0 4.0 5.0

60 Hz Resistive or Inductive Load

3.0 x 3.0 x 0.11" Thick (7.5 x 7.5 x 0.3 cm) Aluminum Plate P. C . B . M ounted 0.47 x 0.47" (12 x 12 mm) Copper Pads with 0.375" (9.5 mm) Lead Length Ambient Temperature (°C) Average Forward Output Current (A) 1 10 100 100 150 Number of Cycles at 60 Hz Peak For ward S urge C urrent (A) TJ = TJ Max. Single Sine-Wave

1.0 Cycle

0.01 0.1 100 Instantaneous Forward Voltage (V) Instantaneo us For ward C urrent (A) TJ = 25 °C Pulse Width = 300 µs 1 % Duty Cycle 0 20 40 60 80 100 0.01 0.1 100 1000 50 - 400 V 60 - 1000 V TA = 125 °C TA = 25 °C Percent of Rated Peak Reverse Voltage (%) Instantaneo us Re verse C urrent (µA)

GBL005, GBL01, GBL02, GBL04, GBL06, GBL08, GBL10 www.vishay.com Vishay General Semiconductor Revision: 16-Aug-13 3 Document Number: 88609 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 5 - Typical Junction Capacitance Per Diode Fig. 6 - Typical Transient Thermal Impedance Per Diode PACKAGE OUTLINE DIMENSIONS in inches (millimeters) 0.1 1 10 100 100 1000 50 - 400 V 600 - 1000 V Reverse Voltage (V) Junction Capaci tance (pF) TJ = 25 °C f = 1.0 MHz V sig = 50 mVp-p 0.01 0.1 1 10 100 0.1 100 t - Heating Time (s) Transient Thermal Impedance (°C/W) Case Type GBL 0.125 (3.17) x 45° Chamfer 0.825 (20.9) 0.815 (20.7) 0.421 (10.7) 0.411 (10.4) 0.718 (18.2) 0.682 (17.3) 0.098 (2.5) 0.075 (1.9) Lead Depth 0.022 (0.56) 0.018 (0.46) 0.210 (5.3) 0.190 (4.8) 0.040 (1.02) 0.018 (0.46) 0.050 (1.27) 0.040 (1.02) 0.098 (2.5) 0.075 (1.9) 0.095 (2.41) 0.080 (2.03) 0.080 (2.03) 0.060 (1.50) Polarity shown on front side of case, positive lead beveled corner

VISHAY GENERAL SEMICONDUCTORS Diodes and Rectifiers Application Note SUPERECTIFIER® Design Brings New Level of Reliability to Surface Mount Components www.vishay.com APPLICATION NOTE Revision: 15-Nov-16 1 Document Number: 88841 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 By Joseph M. Beck Surface Mount technology is here to stay. After years of plodding through cautious experimentation, many manufacturers now have fully automated production lines in place. These production lines place circuit components at speeds that until recently would have been unthinkable. Finally being realized are the benefits of what was once considered a “Voo Doo” manufacturing technology. Component manufacturers have learned a great deal over the past several years as well. Initially most surface mount components were nothing more than retrofit, lead formed versions of their conventional leaded, through-hole counterparts. For most manufacturers this was the quickest and least costly method of “developing” a line of surface mountable components. It was soon discovered, however, that this approach to component assembly would be unacceptable. Surface mount technology placed new demands upon circuit components. Electrically, the same power was being required from smaller and smaller packages. Package geometries and dimensions beca me critical in relation to pick and place equipment and circuit board mounting. In addition, the construction of these devices needed to be such that they would suffer no ill effects when subjected to the rigors of the new assembl y environment that surface mount technology presented. Encountered in this environment was extremely high-speed pick and place equipment, component adhesive attachment, immersion in molten solder and rapid tempe rature changes associated with reflow soldering proce sses. All this meant that component manufacturers would have to re-think their approach to device fabrication. Yes, components needed to be smaller; but they also needed to be more reliable. At Vishay General Semiconductor, the development of new surface mount components is not something that is taken lightly. It is realized that in order to produce a truly reliable surface mount product one must first consider all relevant aspects of the technology. Only when this process has been completed can a product be developed which is surface mountable, and inherently reliable. SURFACE MOUNT SUPERECTIFIER® Vishay General Semiconductor manufactures surface mount rectifiers in the popular MELF (metalized electro-face) package style. These devices, denoted as S UPERECTIFIERS, are available with a wide variety of electrical characteristics. The main difference, however, between these rectifiers and other MELF style devices lies in the area of device construction. Fi g. 1. shows the unique construction employed in the manufacture of the Superectifier. Fig. 1 - SUPERECTIFIER Construction The construction of the Superectifier does not internally utilize any soft solders. All interconnects are accomplished by the use of a high temperature brazing process (600 °C). Hence, any chances of solder void occurrence or internal solder reflow during circuit board processing are eliminated. In addition, the silicon rectif ier junction is completely encapsulated by a cavity-free glass. This glass encapsulation ensures that the rectifier junction is hermetically isolated from humidity and other harmful environmental intrusions. The resultant sub-assembly co uld be considered to be a fully functional surface mount rectifier. In fact, many component manufacturers offer MELF devices which have this appearance; namely, an oblong glass bead with two protruding metal end terminatio ns. However, in order that the device have a uniform shape, the General Semiconductor sub-assembly is over molded with epoxy. The result is a smooth, perfectly cylindrical package. TWO SIZES Two different size Superect ifier MELF packages are available. Vishay General Semiconductor designation GL34 and GL41 are for 0.5 A and 1.0 A rectifier types, respectively. JEDEC® mechanical specifications DO-213AA and DO-213AB detail the dimensions of the GL34 and GL41, respectively. Fig. 2 gives these package dimensions. Completely encapsulated brazed construction Solderable copper ends UL recognized flame retardant molding compound (UL 94 V-0) Cavity-free opague glass-passivated junction Solderable copper ends Solid brazing, low resistance, excellent surge capabilities (brazed-temperature) 600 °C

SUPERECTIFIER® Design Brings New Level of Reliability to Surface Mount Components Application Note www.vishay.com Vishay General Semiconductors APPLICATION NOTE Revision: 15-Nov-16 2 Document Number: 88841 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 2 - Dimensional Outline MANUFACTURING CONSIDERATIONS Pick and Place-Surface mount SUPERECTIFIERS are supplied on tape and reel in acco rdance with JEDEC standard RS-481A. Removal of the de vices from the embossed carrier tape is easily accomp lished by all vacuum pick-up mechanisms which utilize a compliant tip. The compliant tip will form a tight seal around the cylindrical MELF design once contact with the device has been made. This is not always the case, however, wh en MELF devices with a non-uniform package outline are used. Fig. 3. shows two such MELF outlines. Fig. 3. A is a device with a concave package outline. This type of package is difficult to consistently remove from the carrier tape as the exact position of pick-up on the component body is critical. Fig. 3. B is that of the most common form of MELF packaging. This type of construction utilizes a nontransparent glass body whic h is often characterized by pitting and surface irregularities . The irregularities make it difficult for a vacuum pick-up to form a tight seal around the device body. The result is that components are often dropped onto the production room floor instead of being placed on the targeted ci rcuit board.Vi shay General Semiconductor solves these problems with a smooth surface and perfectly cylindrical package outline. Fig. 3 - Non-Uniform Melf Outlines Bonding Pads - The geometries and dimensions of bonding pads are critical to the proper mounting, soldering and overall performance of all surface mount components. Fig. 4. gives the recommende d pad layouts for GL34 and GL41 MELF outlines. Use of these pad layouts will be primary assistance in the following three areas:

• Surface mount technology by nature dictates that smaller component packages dissipate the same power as their larger through-hole counte rparts. Hence, adequate bonding pad land area is re quired in order to aid the component package in the dissi pation of this power.The recommended pad layouts provide the needed land area for GL34 and GL41 devices to operate safely at their maximum ratings.
• Component adhesive attachment allows the package to shift slightly from its original placement position prior to adhesive curing. In addition , most adhesives tend to spread during the curing pro cess which also may allow package misalignment. The geometry of the recommended pad layouts will tend to minimize such movements.This assumes, of course, that the package was originally positioned correctly.
• During reflow soldering, solder surface tension can have a significant effect on the move ment and final position of components in relations to their bonding pads. The recommended pad layouts will actually make use of the solder surface tensions to bring MELF devices into alignment with the two bonding pad land areas. This means that MELF devices which are initially placed in slight misalignment on their bo nding pads will reposition themselves during solder reflow until a position of alignment is reached. Soldering - Surface mount S UPERECTIFIERS are capable of withstanding all present forms of wave and reflow soldering. The following guidelines should be followed, however, in order to ensure overall package integrity:
• GL34-Maximum temperature at device and terminations not to exceed 400 °C for 5 s. Complete device submersible temperature not to exceed 260 °C for 10 s in solder bath.
• GL41-Maximum temperature at device end terminations not to exceed 450 °C for 5 s. Complete device submersible temperature not to exceed 265 °C for 10 s in solder bath. Vishay General Semiconductor’s surface mount S UPERECTIFIERS combine superb electrical performance with unmatched levels of reliabilit y. The construction of the SUPERECTIFIER virtually eliminates all problems associated with high-speed pick and place of MELF components. In addition, S UPERECTIFIER construction ensures that performance and reliability are never compromised when the device is subjected to the demands of surface mount assembly techniques or wh en other seemingly harmful environments are encountere d. Quite simply, no other surface mount rectifier comes close to offering all the advantages of the S UPERECTIFIER MELF. DIMENSIONAL OUTLINE in inches DIMENSION GL34 DO-213AA GL41 DO-213AB MIN. MAX. MIN. MAX. A 0.130 0.146 0.189 0.205 B 0.063 0.067 0.094 0.105 C 0.016 0.022 0.016 0.022 A C B A Pick-Up Pick-Up B

SUPERECTIFIER® Design Brings New Level of Reliability to Surface Mount Components Application Note www.vishay.com Vishay General Semiconductors APPLICATION NOTE Revision: 15-Nov-16 3 Document Number: 88841 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 All surface mount components are small and save space. However, performance and re liability should never be considered necessary trade-offs in order to utilize surface mount technology. Use of Vishay General Semiconductor surface mount S UPERECTIFIERS requires no such sacrifices; no trade-offs. Fig. 4 - Recommended Pad Layout For large buss attachement use a solder mask to reduce effective pad size B A F-slot width G H I Optimum pad size Optimum pad size Where possible make connecting circuitry smaller than the component pads to reduce flashing or miscueing E D C RECOMMENDED PAD LAYOUT in inches DIMENSION GL34 GL41 A 0.069 0.100 B 0.63 0.100 C 0.69 0.100 D 0.138 0.200 E 0.207 0.300 F 0.016 0.025 G 0.138 0.200 H 0.035 to 0.80 0.050 to 0.125 I 0.048 min. 0.075 min. PART NUMBER CURRENT (A) VOLTAGE (V) t rr (ns) PACKAGING GENERAL PURPOSE GL34-J 0.5 50 to 600 - GL34 1N6478-84 1.0 50 to 1000 - GL41 GL41A-Y 1.0 50 to 1600 - GL41 FAST RECOVERY RGL34A-J 0.5 50 to 600 150 to 250 GL34 RGL41A-M 1.0 50 to 1000 150 to 500 GL41 ULTRA FAST RECOVERY EGL34A-G 0.5 50 to 400 50.0 GL34 EGL41A-G 1.0 50 to 400 50.0 GL41

VISHAY GENERAL SEMICONDUCTORS Diodes and Rectifiers Application Note High Speed Data Line Protection Low Current Bridges Rectifiers Lend Themselves to Data Line Protection www.vishay.com APPLICATION NOTE Revision: 15-Nov-16 1 Document Number: 88843 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 By Jon Schleisner Local area network (LAN) data lines require protection against direct and induced transient over voltages on the lines. Protecting these lines and the associated network is not a trivial task. The power range is somewhere between static discharge (very low powe r) and lightening protection which is at the other end of the spectrum (high power). Power handling capability is only one aspect of the design. The designer must take care not to “load down” the line with a highly capacitive TVS or R/ C network. As data rates go beyond 50 mb. It is not possible to use a TVS unit with capacitance above 100 pF to 200 pF. Most standard TVS devices have zero volt cap acitance values greater that 500 pF. To make matters worse, the lower voltage TVS units have higher capacitance values than their higher voltage counterparts. Enter the steering diode bridge. Vishay offers two surface mo unt bridge rectifiers. These components are ideal for use in protection circuits where power handling, capacitive loading and cost are all design considerations. These are the 1 A bridge (DF01S) the smaller 1/2 A (MB1S) SMD bridge rectif iers. Each diode within the 1 A part has a 0 V capacitance of 70 pF. The 1/2 bridge has a junction capacitance of about 25 pF. These components can be configured with TVS components (such as an SMBJ12) to form a high perf ormance, low capacitance network capable of outstanding data line protection in LAN and other similar applications where data lines are exposed to transient surges beyond th e scope of static discharge. Since each bridge contains four diodes each component can protect 2 independent lines. Fig. 1. shows the forward voltage drop of the 1 A and 1/2 A bridge when configured as shown in figure 1. The surge can be applied in either polarity and to either input individually or simultaneously. Fig. 1 - Forward Current vs. Forward Voltage Fig. 2 These small components are capable of handling 120 (MBS) and 160 (DFS) A on the industry standard 10 μs/1000 μs current waveform. This is the same waveform that is used to test the axial and surface mount TVS components. For the MB1S the maximum V F encountered at 120 A is 7 V hence, it is possible to use the 100 V version of either bridge in this application without fear of reliability issues caused by reverse breakdown of the diod es within the bridge during surge events. The different steering diode / TVS configurations are illustrated in Fig. 3. through Fig. 7. 100 160 43215 6 7 1 4 Forward Current (A) Forward Voltage (V) DFS bridge MBS bridge 10981 1 1 2 1 3 140 120 Line 1 Line 2 VF of D1 or D2 VF of D1 or D2 D1 D2 D3 D4 OR

High Speed Data Line Protection Low Current Bridges Rectifiers Lend Themselves to Data Line Protection Application Note www.vishay.com Vishay General Semiconductors APPLICATION NOTE Revision: 15-Nov-16 2 Document Number: 88843 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 3. shows the classic symmetrical bidirectional protector. TVS units are util ized to provide clamping protection for both positive an d negative going transients. The “turn on threshold” of th e network is specified by the BVR of the TVS unit selected pl us the forward voltage drop of the rectifier diode junction within the bridge being utilized. Because the currents encountered can vary between below 1 A and higher than 100 A. The forward voltage drop of the bridge may vary between 0.6 V and 7 V. Fig. 3 Fig. 4 Fig. 4. is a configuration designed to provide a-symmetrical bi-polar protection, that is, the diode drop of 1 V is observed for negative going transients and the B VR of the selected TVS provides the turn on charac teristic for a positive going surge. This is a common configuration when protecting the input stages of transceiver ICs that are powered by ground and B+ and no negative po wer rail is utilized. The configuration can be reversed to provide the same style of surge suppression with a negative power source. Both Fig. 3. and Fig. 4. have a resistor designated “R” going to either V+ or V-. These resistors can be any low power chip resistor in the 50K or above range. They are optional. The purpose of these resistors is to provide a low current forcing the TVS into the avalanche mode causing the impedance at this node to be low. This reduces crosstalk and maintains a reasonable voltage across the steering diodes minimizing the diode junction capacita nce and assuring minimum circuit loading. Fig. 5. graphically shows how multiple SMD bridge rectifiers can be used in conjunction with one or two TVS units in order to protect multiple line applications. Note that the cost of the TVS units then become s amortized over the number of lines tied into it. In significant volumes it is possible to protect multiple data lines to a legitimate 600 W (on the 10 μs/1000 μs waveform) level at a cost far less than an individual TVS per line. And a ll the while the data lines are being loaded with less than 50 pF capacitance. Fig. 5 Protection Action Incoming Transient Line 1 Line 2 TVS Line 1 Line 2 TVS R The Surge can be Applied to Either Line or Both + B (VR) and - B(VR) are Adjusted via TVS Parts Selection. B(VR) + VD (BRIDGE) 0 V B(VR) - VD (BRIDGE) + B(VR) - B(VR) B(VR) (TVS) + 2 VF (BRIDGE) = VC Incoming Transient Line 1 Line 2 TVS Line 1 Line 2 Protection Action The Clamping Voltage Becomes: Line 2 Line 3 Line 5 Line 6Line 4 Line 1 R R Multiple line protection can be implemented by tying several bridges into one set of TVS’s. For single supply systems, one TVS can be eliminated and that node connected to ground.

High Speed Data Line Protection Low Current Bridges Rectifiers Lend Themselves to Data Line Protection Application Note www.vishay.com Vishay General Semiconductors APPLICATION NOTE Revision: 15-Nov-16 3 Document Number: 88843 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 6 Fig. 6. shows an alternate method of using a SMD bridge to provide effective low loss protection for “twisted pair” arrangements. Fig. 7. demonstrates a method of using the bridge rectifier arrangement to protect transceiver I/O ports by “steering” the transient overvoltages to either power supply rail or a single rail and ground. It is important to remember good “house keeping” when employ ing this topology ie; low inductance capacitors should bypass the power supply rails close to the circuitry being protected. If these rules are not followed the leading edge of any steep rise time transient will not be absorbed by the power supply. This will result in higher “let through” voltages and less effective protection. The resultant performance of any of these circuits is severely influenced by parasitic elements in the circuit. Robust low impedance ground planes and simple PCB traces are essential. Series inductance in the PCB traces or grounding scheme will cause higher than expected let though voltage on fast rising transients. How fast is fast? and how much let through voltage is excessive? That will depend on the components you are protecting. Fig. 7 (V+) + VF (V-) - VF Incoming Transient V+ (or V-) ± V F (BRIDGE) Output Input Twisted Pair Clamping Occurs at DFS MBS (V+) + VF (V-) - VF V+ (or V-) ± VF (BRIDGE) Line 2 Line 3 Line 5 Line 6Line 4 Line 1 R R Clamping Occurs at

VISHAY GENERAL SEMICONDUCTOR Rectifiers Application Note Design Guidelines for Schottky Rectifiers www.vishay.com Revision: 13-Aug-15 1 Document Number: 88840 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 APPLICATION NOTE By Jon Schleisner, Senior Technical Marketing Manager INTRODUCTION Known limitations of Schottky rectifiers - including limited high temperature op eration, high leakage and limited voltage range - can be measured and controlled, allowing wide applicatio n on switch mode power supplies. Schottky rectifiers have been used in the power supply industry for approximately 15 years. During this time, significant fiction as well as fact has been associated with this type of rectifier. The primary assets of Schottky devices are switching speeds approachi ng zero-time and very low forward voltage drop (V F). This combination makes Schottky barrier rectifiers ideal for the output stages of switching power supplies. On the negative side, Schottky devices are also known for limited high-t emperature operation, high leakage and limited voltage range B VR. Though these limitations exist, they are quantifiable and controllable, allowing wide application of these devices in switch mode power supplies. High leakage, when associated with standard P-N junction rectifiers, usually indicate s “badness,” implying poor reliability. In a Schottky device, leakage at high temperature (75 °C and greater) is often on the order to several mA, depending on chip size. In th e case of Schottky barrier rectifiers, high-temperature leakage and forward voltage drop are controlled by two primary factors: the size of the chip’s active area and the barrier height (B). Design of a Schottky rectifier can be viewed as a trade off. A high barrier height device exhibits low leakage at high temperature, however, the forward voltage drop increases. These parameters are also controlled by the die size and resistivity of the starting material. A larger die will lower the V F but raise the leakage if al l other parameters are held constant. The resistivity of th e starting material must be chosen in a range where the breakdown voltage (BVR) is not degraded at the low end an d the forward end of the resistivity range. Since a larger chip size is obviously more expensive, this is not the primary method for controlling these parameters. Chip size is usually set to a dimension where the current density through the die is kept at a safe level. BARRIER HEIGHT (B), A FACTOR Vishay General Semiconductor produces two product lines of Schottky barrier rectifiers. One line is referred to as the “MBR” series, a high-temperatu re, low-leakage, relatively high VF type of Schottky device wi th a high barrier height (B). The second line is the “SBL” series, designed to operate at lower temperature (125 °C or less); however, while leakage current is higher, forward voltage drop (V F) is significantly lower and they are designed with a low- B barrier height. The low- B-line SBL series uses a nichrome barrier metal with a barrier height of B = 0.64 eV. The high-B MBR series uses a nichrome-platinum barrier metal to achieve barrier height ( B = 0.71 eV). Both series are guard-ring protected against excessive transient voltages. Figure 1. Both the low and high-barrier-height Schottky devices are valuable in a variety of applications. When the true operating temperature of the Schottky rectifier exceeds 125 °C, the high-barrier-height series must be used to avoid thermal runaway. This occurs when excessive self-heating of the rectifier causes large leakage currents, resulting in additional selfheating. The process becomes a form of positive thermal feedback and may lead to damage in the rectifier or inappropriate functioning of the circuit utilizing the device. 4030 60 50 0.001 0.01 0.1 Voltage (V) A/cm 150 °C 02 0 10 125 °C 100 °C 75 °C

Schottky device must be made. barrier device for a given application. assuming 90 % of the total chip area is active. Figure 2. Calculation of J0 (current density at zero Volts)

VISHAY GENERAL SEMICONDUCTOR Rectifiers Application Note Physical Explanation APPLICATION NOTE Revision: 16-Aug-11 1 Document Number: 84064 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 www.vishay.com GENERAL TERMINOLOGY Semiconductor diodes are used as rectifiers, switches, varactors and voltage stabilizers (see Zener data book). Semiconductor diodes are two-terminal solid-state devices having asymmetrical voltage-current characteristics. Unless otherwise stated, this means a device has single pn-junction corresponding to the characteristics shown in figure 1. Fig. 1 An application of the voltage current curve is given by where If the diode is forward-biased (anode positive with respect to cathode), its forward current (I = I F) increases rapidly with increasing voltage. That is, its resistance becomes very low. If the diode is reverse-biased (anode negative with respect to cathode), its reverse current (-I = IR) is extremely low. This is only valid until the breakdown voltage V BR has been reached. When the reverse voltage is slightly higher than the breakdown voltage, a sharp rise in reverse current results. Bulk resistance Resistance of the bulk material between junction and the diode terminals. Parallel resistance, r P Diode resistance resulting from HF rectification which acts as a damping resistance to the pre-tuned demodulation circuit. Differential resistance See forward resistance, differential Diode capacitance, C D Total capacitance between the diode terminals due to case, junction and parasitic capacitances. Breakdown voltage, V BR Reverse voltage at which a small increase in voltage results in a sharp rise of reverse current. It is given in the technical data sheet for a specified current. Forward voltage, V F The voltage across the diode terminals which results from the flow of current in the forward direction. Forward current, I F The current flowing through th e diode in the direction of lower resistance. Forward resistance, r F The quotient of DC forward voltage across the diode and the corresponding DC forward current. Forward resistance, differential r f The differential resistance measured between the terminals of a diode under specified conditions of measurement, i.e., for small-signal AC voltages or currents at a point of forward direction V-I characteristic. Case capacitance, C case Capacitance of a case without a semiconductor crystal. Integration time, t av With certain limitations, absolute maximum ratings given in technical data sheets may be exceeded for a short time. The mean value of current or voltage is decisive over a specified time interval termed integrat ion time. These mean values over time interval, t av, should not exceed the absolute maximum ratings. Average rectified output current, I FAV The average value of the forward current when using the diode as a rectifier. The maximum allowable average rectified output current depends on th e peak value of the applied reverse voltage during the time interval at which no current is flowing. In the absolute maximum ratings, one or both of the following are given:

• The maximum permissible average rectified output current for zero diode voltage (reverse).
• The maximum permissible average rectified output current for the maximum value of V RRM during the time interval at which no current is flowing. Note FAV decreases with an increasing value of the reverse voltage during the interval of no current flow. V I II S exp V VT = IS saturation current= VT kT

www.vishay.com Vishay General Semiconductor Revision: 16-Aug-11 2 Document Number: 84064 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Rectification efficiency, r The ratio of the DC load voltage to the peak input voltage of an RF rectifier. Series resistance, r s The total value of resistance representing the bulk, contact and lead resistance of a diode given in the equivalent circuit diagram of variable capacitance diodes. Junction capacitance, C J Capacitance due to a pn junction of a diode which decreases with increasing reverse voltage. Reverse voltage, V R The voltage drop which results from the flow of reverse current (through the semiconductor diode). Reverse current, I R (leakage current) The current which flows when reverse bias is applied to a semiconductor junction. Reverse resistance, R R The quotient of the DC reverse voltage across a diode and the corresponding DC reverse current. Reverse resistance, differential, r r The differential resistance measured between the terminals of a diode under specified condition of measurement i.e., for small-signal (AC) voltage or currents at a point of reverse-voltage direction V-I characteristic. Peak forward current, I FRM The maximum forward current with sine-wave operation, f  25 Hz, or pulse operation, f  25 Hz, having a duty cycle tp/T  0.5. Peak reverse voltage, VRRM The maximum reverse voltage having an operating frequency f  25 Hz for sine-wave as well as pulse operation. Peak surge forward current, I FSM The maximum permissible surge current in a forward direction having a specified waveform with a short specified time interval (i.e., 10 ms) unless otherwise specified. It is not an operating value. During frequent repetitions, there is a possibility of change in the device’s characteristic. Peak surge reverse voltage, V RSM The maximum permissible surge voltage applied in a reverse direction. It is not an operating value. During frequent repetitions, there is a possibility of change in the device’s characteristic. Power dissipation, P V An electrical power converted into heat. Unless otherwise specified, this value is gi ven in the data sheets under absolute maximum ratings, with T A = 25 °C at a specified distance from the case (both ends). Switching on Characteristic Forward recovery time, t fr The time required for the voltage to reach a specified value (normally 110 % of the steady state forward voltage drop), after instantaneous switching from zero or a specified reverse voltage to a specifie d forward biased condition (forward current). This recovery time is especially noticeable when higher currents are to be switched within a short time. The reason is that the forward resistance during the turn-on time could be higher than the DC current (inductive behavior). This can result in the destruction of a diode because of high instantaneous power loss if constant current control is used. Turn on transient peak voltage, V fp The voltage peak (overshoot) after instantaneous switching from zero or a specified reverse voltage to a specified forward biased condition (f orward current). The forward recovery is very important es pecially when higher forward currents must be switched on within a very short time (switching on losses). Fig. 2 Fig. 3 Switching off Characteristic, Inductive Load Reverse recovery time, t rr The time required for the current to reach a specified reverse current, iR (normally 0.25 % of I RM), after switching from a specified forward current I F to a specified reverse biased condition (reverse voltage V Batt) with a specified slope dIF/dt. D.U.T. Pulse VS VF IF Rx Ri t VF 100 % 110 % V FP tfr

www.vishay.com Vishay General Semiconductor Revision: 16-Aug-11 3 Document Number: 84064 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Peak reverse recovery current, IRM The peak reverse current afte r switching from a specified forward current I F to a specified reverse biased condition (reverse voltage VR) with a specified switching slope dIF/dt. The reverse recovery is very important especially when switching from higher currents to high reverse voltage within a very short time (switching off losses). Fig. 4 Fig. 5 Reverse avalanche energy, ER The reverse avalanche energy when using the rectifier as a freewheeling diode with an indicutive load. When the inductance is switched off, the current through the inductance will keep on flowing through the D.U.T. until the stored energy, is dissipated within the rectifier. Under this condition the diode is in a reverse avalanche mode with a reverse current at the beginning which is equal to the current that was flowing through the inductance just before it was switched off. The reverse energy capabili ty depends on the reverse current and the junction temperature prior to the avalanche mode. Fig. 6 Fig. 7 Switching off Characteristic, Instantaneous Switching Reverse recovery time, t rr The time required for the current to reach a specified reverse current, iR (normally 0.25 A), after instantaneous switching from a specified forward current I F (normally 0.5 A) to a specified reverse current IR (normally 1.0 A). Reverse recovery charge, Qrr The charged stored within th e diode when instantaneous switched from a specified forward current IF (normally 0.5 A) to a specified reverse current IR (normally 1.0 A). Fig. 8 Fig. 9 D.U.T. Pulse VS tIRM IRMVBatt trr tiR dIF/dt IF VF V, I ER --- L I 2= D.U.T.Pulse VS V t VBR I t IBR D.U.T. Oscilloscope- VS Pulse 50 Ω 50 Ω 50 Ω47 Ω 1.5 kΩ 47 Ω 2 Ω 47 µF I IF trr iR IR Qrr t

VISHAY GENERAL SEMICONDUCTOR Rectifiers Application Note Power Factor Correction with Ultrafast Diodes www.vishay.com APPLICATION NOTE Revision: 25-Nov-15 1 Document Number: 88839 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 More and more switched mode power supplies (SMPS) are being designed with an active power factor correction (PFC) input stage. This is mainly due to the introduction of regulations aimed at restricting the harmonic content of the load current drawn from powe r lines. However, both the user and the power company bene fit from PFC, so it just makes good sense. Non-PFC power supplies use a capacitive input filter, when powered from the AC power line. This results in rectification of the AC line, which in turn causes high peak currents at the crests of the AC voltage, as in Fig. 1a. These peak currents lead to excessive voltage drops in the wiring and imbalance problems in the three-phase power delivery system. This means that the full energy potential of the AC line is not utilized. Fig. 1 - Non-PFC vs. PFC Waveforms (Current, Voltage) Power Factor Correction (PFC ) can be defined as the reduction of the harmonic conten t, and / or the aligning of the phase angle of incoming current so that it is in phase with the line voltage. By maki ng the current waveform look as sinusoidal and in phase with the voltage waveform as possible, as in Fig. 1b, the power drawn by the power supply from the line is maximized for real power. Real power is equal to V RMS × I RMS × cos , where  is the phase difference between the voltage and current waveforms. Therefore, as  approaches zero, cos  approaches unity, which maximizes the real power (now just V RMS × IRMS). Mathematically, Power Factor (PF) is equal to Real Power / Apparent Power. The basic concept behind PFC is to make the input look as much like a resistor as possi ble. Resistors have a power factor of 1 (unity). This is ideal, because it allows the power distribution system to operate at its maximum efficiency. Lets consider a continuous conduction mode (CCM) boost converter being used for active PFC. The boost topology was chosen because it is the least expensive (cheapest) solution, and cost is always a major consideration. Please refer to Fig. 2. Fig. 2 - Continuous Mode Boost Converter Circuit The input full-wave bridge rectif ier converts the alternating current (AC) to direct current (DC). The MOSFET is used as an electronic switch, and is cycled “on” and “off” by an external source. While the MOSFET is “on”, the inductor (L) current increases. While the MOSFET is “off”, the inductor delivers current to the capa citor (C) through the forward biased output diode (D). The inductor current does not fall to zero during each switching cycle, which is why this is known as a “continuous conduction mode.” The MOSFET is pulse-width-modulated so that the input impedance of the circuit appears purely resistive, and the ratio of peak to average current is kept low. The most cost-effective way of reducing losses in the circuit is by choosing a suitable diode for the application. Diodes for use in PFC circuits typically have higher forward voltages than conventional ultrafast epitaxial diodes, but much shorter (faster) reverse recovery times. Vishay recommends the use of the UH-series for PFC applications. V I IAV V I IAV Power Used Power Not Used a. No Power Factor Correction b. Power Factor Corrected Input MOSFET Vout Bridge Rectifier V in IL D C L

Power Factor Correction with Ultrafast Diodes Application Note www.vishay.com Vishay General Semiconductor APPLICATION NOTE Revision: 25-Nov-15 2 Document Number: 88839 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TABLE 1 - PFC ULTRAFAST RECTIFIERS - MINI SELECTOR GUIDE VISHAY PART NUMBERS CASE OUTLINE DESCRIPTION I AV (A) V RRM (V) t rr (ns) USB260 DO-214AA (SMB) Plastic SMD 2 600 30 MURS260 DO-214AA (SMB) Plastic SMD 2 600 50 31GF6 DO-201AD Plastic Axial 3 600 30 SUF30J P600 Plastic Axial 3 600 35 MURS360 DO-214AB (SMC) Plastic SMD 3 600 50 MUR460 DO-201AD Plastic Axial 4 600 50 UHF5JT ITO-220AC Isolated Power Pack 5 600 25 UH5JT TO-220AC Plastic Power Pack 5 600 25 UG5JT TO-220AC Plastic Power Pack 5 600 25 UGB5JT TO-263AB Power Pack SMD 5 600 25 UGF5JT ITO-220AC Isolated Power Pack 5 600 25 UH8JT TO-220AC Plastic Power Pack 8 600 25 UHF8JT ITO-220AC Isolated Power Pack 8 600 25 UG8JT TO-220AC Plastic Power Pack 8 600 25 UGB8JT TO-263AB Power Pack SMD 8 600 25 UGF8JT ITO-220AC Isolated Power Pack 8 600 25 UG12JT TO-220AC Plastic Power Pack 12 600 30 UGB12JT TO-263AB Power Pack SMD 12 600 30 UGF12JT ITO-220AC Isolated Power Pack 12 600 30 UG15JT TO-220AC Plastic Power Pack 15 600 35 UGB15JT TO-263AB Power Pack SMD 15 600 35 UGF15JT ITO-220AC Isolated Power Pack 15 600 35

VISHAY GENERAL SEMICONDUCTOR Diodes and Rectifiers Application Note Rectifiers for Power Factor Correction (PFC) www.vishay.com APPLICATION NOTE Revision: 15-Nov-16 1 Document Number: 88868 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 CCM (continuous-conduction-mode) and CRM (critical- conduction-mode) devices are most widely adapted in commercial applications for po wer factor correction. CCM devices are often used in SMPS with output power ratings greater than 300 W; while CRM devices are often used in SMPS with output power ratings less than 300 W. CRM PFC devices operate in the boundary mode between CCM PFC and DCM (discontinuous-conduction-mode) PFC devices. PFC devices are generally sele cted base on the speed of their reverse recovery time (t rr). Currently for CCM and CRM PFC devices in market, rectifiers up to 600 V with trr smaller or equal to 35 ns are generally used as CCM PFC; rectifiers up to 600 V with revers e recovery time between 35 ns to 60 ns, are used as CRM PFC. It should be noted there is a trade-off between forward voltage drops and switching speed; when the reverse recovery time of ultrafast rectifiers are less than 35 ns, their forward voltage drops would incr ease significantly, in turn the devices' forward surge current abilities would be diminished, therefore cautious attention should be taken when selecting the appropriate CCM or CRM PFC devices for various switch mode powe r supply applications, such that expected performance could be achieved and better reliability would still be ensured. WHAT ARE THE EFFECTS OF NON-PFC-EQUIPPED CIRCUITS Non-PFC power supplies use a capacitive input filter, as shown in Fig. 1, when powere d from AC power line. This results in rectification of the AC line, which in turn causes peak currents at the crest of the AC voltage, as shown in Fig. 2. These peak currents lead to excessive voltage drops in the wiring and imbalance problems in the three-phase power delivery system. This means that the full energy potential of the AC line is not utilized. Fig. 1 - Standard Bridge Rectification of Line Voltage Fig. 2 - 20 W Resistive Load Powered by a Circuit like Fig. 1 Fig. 3 - Same Load like Fig. 2, but Unity Power Factor VMAINS = 230 V Load: SMPS, electronic lighting ballast or any electronical load 100 µF T: 5 ms/DIV. VLINE: 50 V/DIV., ILINE: 1 A/DIV. ILINE VLINE T: 5 ms/DIV. VLINE: 50 V/DIV., ILINE: 0.2 A/DIV. ILINE VLINE

Rectifiers for Power Factor Correction (PFC) Application Note www.vishay.com Vishay General Semiconductor APPLICATION NOTE Revision: 15-Nov-16 2 Document Number: 88868 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Power factor correction (PFC ) can be defined as the reduction of the harmonic cont ent. By making the current waveform look as sinusoidal as possible, as shown in Fig. 3, the power drawn by the power su pply from the line is then maximized to real power. Assuming that the voltage is almost sinusoidal, power factor depends first of all on the current waveform. Thus real power can be defined as: That means that real powe r only is carried by the fundamental harmonic, all the higher harmonics are carrying only reactive power. Elimin ating the higher harmonics means increasing power factor to unity. The definition of power factor is: For the circuit in Fig. 1. the power factor is typically about 40 % to 50 %. For example (related to Fig. 1. and Fig. 2.): The following measurements can be done with the circuit in Fig. 1.: C = 100 μF R = 680  I TRMS = 495 mA P = 20 W S = 43 VA Q = 38 var Power factor = 0.464 With the same resistor dire ctly connected to the line terminals or using power factor correction the following results can be achieved: I TRMS = 172 mA P = 20 W S = 20 W Q = 0 Power factor = 1 This simple example gives a good impression what happens if all electronic equipment is powered without PFC. Obviously we see in this example the same real power, but big differences in RMS current. Fig. 4 - Typical Boost Converter Topology for Active PFC Because it is the most cost sa ving solution the continuous conduction mode (CCM) boost converter as shown in Fig. 4, is today the most used topology for active power factor correction. The bridge rectifier BR1 converts the AC input current into DC current. The MOSFET T is used as an electronic switch, and is cycled “on” and “off” driven by the PFC-IC. While the MOSFET is “on” the inductor current through L increases. While the MOSFET is “off”, the inductor delivers current to the capacitor C through the forward biased output rectifier diode D. The inductor current does not fall to zero during the entire switching cycle, because this operation is called “continuous conduction mode (CCM)”. This mode is suitable for almost all load cu rrent variations. If a constant load current is expected the so-called “discontinuous conduction mode (DCM)”, where currents falls at the end of each cycle to zero, should be preferred. The MOSFET anyway is pulse-width-modu lated so that the input impedance of the circ uit appears purely resistive, and the ratio of peak to average current is kept low. The most cost-effective way of reducing losses in the circuit is by choosing a suitable diode D for the application. Diodes for use in PFC circuits typically have higher forward voltages than conventional fast epitaxial diodes, but much shorter (faster) reverse recovery times. SP 2 Q2+= VRMS I1 2 1t 2sin I 2 2 2t 2sin ... I n Power factor Real power Apparent power D1 R1 L AC ~ Input DC Output SMPS or electronic lamp ballast or any electrical load D C T Mains Rectifier Power Factor Correction Circuit Output Load D2 D4 PFC-IC

Rectifiers for Power Factor Correction (PFC) Application Note www.vishay.com Vishay General Semiconductor APPLICATION NOTE Revision: 15-Nov-16 3 Document Number: 88868 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 HOW A STANDARD PFC CIRCUIT WORKS Fig. 4. shows the typical topology of a PFC pre-stage that is built of a standard boost converter driven by a control IC. It is important that at the output of the Rectifier BR1 there will be no ”large” smoothing capacitor with several μF connected, because that would eliminate all efforts of the PFC circuit, although it would operate sufficiently. The input voltage of the PFC is a rectified DC voltage pulsed with double line frequency. The shown switch is usually implemented by an IGBT or Power-MOS transistor. Operation principle: The instantaneous value of the current through the boost inductor has to be adapted as well as possible to the instantaneous value of the line voltage through suitable pulse-width modulation of the transistor switch T. The actual inductor current can be won by the voltage drop at R3. The input voltage can be found at the voltage divider R1, R2. The current amplitude will be regulated on the value of the output voltage, R4, R5. To be able to control the current through the boost inductor, the output voltage of the PFC has to be higher at every moment of operation than the crest of the line input voltage. For 230 V mains the DC output should be about 400 V. A large capacitor at the output does not affect the power factor, but is good for smoothing the DC voltage. An additional advantage of PFC circuit is the regulated DC voltage that gives the opportunity of having a following SMPS to be wide range operated (e.g. 110 V to 230 V input voltage). ADVANTAGES OF CIRCUITS WITH PFC

• The use of PFC allows the manufacturer of electrical load to use smaller, more cost-effective mains rectifiers because of smaller RMS current with PFC.
• Offers a stable regulated output voltage which is the input voltage for the following electrical load. Indeed the PFC makes it a system based wide-range power supply itself.
• The following electrical load (SMPS, electronic ballast unit or other electrical load) can be much simpler, which is also a cost saving factor. Vishay General Semiconductor recommends the use of their ultrafast rectifier series of PFC rectifier. RECOMMENDED REVERSE VOLTAGES FOR MOST USED LINE VOLTAGE LEVELS VLINE RMS (V) VRRM (V) 110 400 120 400 230 600 277 600

talks about rectifiers, if the specified current is above 0.5 A.

• Standard rectifiers with a trr > 500 ns
• Fast rectifiers with a 100 ns < trr < 500 ns
• Ultrafast rectifiers with a trr < 100 ns
• Schottky rectifiers with majority carrier effect Except Schottky rectifiers all these are of p-n junction technology with different processes to optimize the characteristics for different applications. They are placed in different packages, leaded like the Sinterglass, SMD like DO214AC (SMA) or TO-220 to fullfill different mounting and power requirements. Because of their predominant rectifying qualities, rectifiers are primarily used for power or signal conditioning in a variety of applications. This can range from high power to low power switching rectifie r requirements (e.g. mobile phone chargers, energy saving lamps,...). They are also used in several other specialized ways like clamping networks for SMPS (e.g. BY T42), damper and modulator diodes for the deflection circuits in CRTs (e.g. BY228), freewheeling diodes for inductive loads etc. For specialized rectifying applications, silicon controlled rectifiers (SCRs) are used. But these are not simply diodes they have a third terminal, the gate. The other special group of rectifiers, the Schottky rectifiers, are not use the conventional p-n junction, they have a barrier metal design. These are also non controlled rectifiers with two terminals only. Their big advantage is the excellent switching characteristic compared to even the fastest p-n junction diode. For more deta ils about Schottky rectifiers, please refere to Application Note “Fundamentals of Schottky Rectifiers”

Figure 1. below shows the basic rectifier characteristics with which the reverse leakage current IR flows.

Fundamentals of Rectifiers Application Note www.vishay.com Vishay General Semiconductor APPLICATION NOTE Revision: 06-Aug-15 2 Document Number: 88867 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 The major parameters for the selection of the appropriate rectifier are the maximum reverse voltage (V RRM), the average forward current (IF(AV)) and for switching application the reverse recovery characteristic (t rr) too. Additional parameters may be, for exampl e forward, surge capability (IFSM) etc. BASIC RECTIFIER PARAMETERS VR Reverse voltage VRRM Repetitive peak reverse voltage, including all repeated reverse transient voltages VBR Reverse breakdown voltage IR Reverse (leakage) current, at a specified reverse voltage VR and temperature TJ IF Forward current VF Forward voltage drop, at a specified forward current IF and temperature TJ IF(AV) Average forward output current, at a specified current wa veform (normally 10 ms/50 Hz half sine wave, sometimes 8.3 ms/60 Hz half sine wave), a specified reverse voltage and a specified mounting condition (e.g. lead-length = 10 mm or PCB mounted with certain pads and distance) IFSM Peak forward surge current, with a sp ecified current waveform (n ormally 10 ms/50 Hz half sine wave, sometimes 8.3 ms/60 Hz half sine wave) trr Reverse recovery time, at a specified forward current (normally 0.5 A), a specified reverse current (normally 1.0 A) and specified measurement conditions (normally from 0 to 0.25 A)

www.vishay.com Vishay Revision: 11-Jan-18 1 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Vishay General Semiconductor AXIAL MARKING Examples: Note

• x - type code PART NUMBER MARKING CODE TYPE RoHS-COMPLIANT HALOGEN-FREE MPG06 series MPG06x M06x RMPG06 series RMPG06x MR06x UG06 series UG06x MUG06x SB0x series SB0x0 MSB0x0 TPMP06 series T-x MT-x P6KE22 SB340 521X Cathode band Part number Logo / date code Cathode band Vishay part number Logo / date code JEDEC® part number Polarity GP15M 1521X 1.5KE15A 1N6275A Part number / logo / date code 1521X DATE CODE (for RoHS-compliant products) Week by calendar year (21st) Factory designator Last digit of year (2015) Week by calendar year (21 st) Last two digits of year (2015) Factory designator 5 21 X 15 21 X DATE CODE (for halogen-free products) Factory designator Week by calendar year (21st) Last digit of year (2015) “M” prefix denotes halogen-free compound 5 21 XM Notes (1) No cathode band marking for TVS bi-directional type (2) Date code per individual part number specification 1521X Cathode band Logo / part number Polarity MPG06 MPG06J

www.vishay.com Vishay Revision: 11-Jan-18 2 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 POWER PACK MARKING Examples: V40100C 1521X VF40100C 1521X VB40100C 1521X VI40100C 1521X TO-220AB ITO-220AB TO-263AB SMPD (TO-263AC) TO-262AA V40D100C M521X V20WM100C M521X TO-252 Logo Part number Date code Circuit diagram SlimDPAK V40PW45C M521X V20100S 1521X VF20100S 1521X VB20100S 1521X VI20100S 1521X NC A TO-220AB ITO-220AB TO-263AB TO-262AA TO-252AASMPD (TO-263AC) V20M120S M521X VI20100S 1521X SlimDPAK V35PW45 M521X Logo Part number Date code Circuit diagram MBR1060 1521X MBRF1060 1521X MBRB1060 1521X MBR4060PT TO-3P / TO-3PW (TO-247AD) 521X TO-220AC ITO-220AC TO-263AB Logo Part number Date code Circuit diagram Logo Part number Date code Circuit diagram DATE CODE (for RoHS-compliant products) Week by calendar year (21st) Factory designator Last digit of year (2015) Week by calendar year (21 st) Last two digits of year (2015) Factory designator 5 21 X 15 21 X DATE CODE (for halogen-free products) Factory designator Week by calendar year (21st) Last digit of year (2015) “M” prefix denotes halogen-free compound 5 21 XM Notes (1) Date code per individual part number specification

www.vishay.com Vishay Revision: 11-Jan-18 3 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PLASTIC MELF AND MiniMELF MARKING 1. Package: GL41 (DO-213AB) 2. Package: GL34 (DO-213AA) GF1 (DO-214BA) MARKING MELF 2.5 mm x 4.9 mm 2nd band (reverse voltage) 1st band (product family) TYPE 1 st BAND 2 nd BAND BYM10 series white gray: 50 V violet: 1000 V GL41 series white red: 100 V white: 1300 V BYM11 series red orange: 200 V brown: 1600 V RGL41 series red yellow: 400 V BYM12 series green green: 600 V EGL41 series green blue: 800 V BYM13 series orange gray: 20 V orange: 40 V green: 60 V SGL41 series orange red: 30 V yellow: 50 V TGL41-xx blue ZGL41-xx red MiniMELF 1.6 mm x 3.5 mm 2nd band (reverse voltage) 1st band (product family) TYPE 1 st BAND 2 nd BAND BYM07 series white gray: 50 V brown: 300 V GL34 series white red: 100 V yellow: 400 V EGL34 series green pink: 150 V green: 600 V RGL34 series red orange: 200 V blue: 800 V EA Logo Cathode band Date code Type code Polarity DATE CODE Month 1 to 9 = January to September A = October B = November C = December Last digit of year (2015) Note  Type code refers to individual datasheet 5 9

www.vishay.com Vishay Revision: 11-Jan-18 4 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SMA (DO-214AC), SMB (DO-214AA), SMC (DO-214AB), SlimSMA (DO-221AC), AND SMPA (DO-221BC) MARKING SMA with “BYS”, “BYG” Prefix SMA with “BYS”, “BYG” Prefix Notes  Type code refers to individual datasheet  No cathode band marking for TVS bi-directional type  “XY” 2 digits: For rectifiers and PAR TVS (TPSMA, TPSMB, TPSMB, TPSMC, and TA6F)  “XYZ” 3 digits: For T RANSZORB® TVS and Power Voltage-Regulating Diodes  Non “M” mark belongs to RoHS-compliant productFactory designator DATE CODE Month 1 to 9 = January to September A = October B = November C = December Year (e.g., 5 = 2015 6 = 2016) X Y Z SMA, SMB, SMC Logo Cathode band Date code Type codeSA XY(Z) SMA, SMB, SMC, SlimSMA, SMPA SA XY(Z) M Halogen-free compound mark Cathode band Date code Type code Halogen-free compound mark Year (2015) Month (September) BYS 025 M59 Cathode band Part number Vishay Year (2015) Month (September) BYS 025 V59 Cathode band Part number SMA, SMB, SMC (for TMBS products with long core part number) Halogen-free compound mark Year (2015) Month (September) V8L MXY Cathode band Part number

www.vishay.com Vishay Revision: 11-Jan-18 5 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DO-218AB MARKING SMPC (TO-277A) MARKING SM5S22 1521 SM5S22 M521 Polarity DATE CODE (for RoHS-compliant products) Week by calendar year (21st) Last two digits of year (2015) 15 21 DATE CODE (for halogen-free products) Week by calendar year (21st) Last digit of year (2015) “M” prefix denotes halogen-free compound 5 21M Polarity Logo Part number Date code Cathode band Logo Part number Date code Cathode band S104 MXY Type code Date code PBR MXYZ Polarity (for rectifiers) Notes  Type code refers to individual datasheet  “XY” 2 digits: for rectifiers and PAR ® TVS  “XYZ” 3 digits: for TRANSZORB® TVS  TRANSZORB® TVS: cathod band depends on actual polarity  No cathode band marking for bi-directional PAR TVS type DATE CODE Factory designator Month 1 to 9 = January to September A = October B = November C = December Year (e.g., 5 = 2015 6 = 2016) X Y Z “M” prefix denotes halogen-free compound M GDE MXYZ Type code Date code Polarity (for TRANSZORB® TVS of SMPCxxAN) Type code Date code Polarity (for TRANSZORB® TVS of SMPCxxA) DDP MXY Type code Date code Polarity (for PAR® TVS)

www.vishay.com Vishay Revision: 11-Jan-18 6 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SMP (DO-220AA) MARKING MicroSMP (DO-219AD) MARKING MicroSMF (DO-219AC) MARKING Notes  Type code refers to individual datasheet  “XY” 2 digits: for rectifiers and PAR TVS  “XYZ” 3 digits: for T RANSZORB® TVS and power voltage-regulating diodes DATE CODE Factory designator Month 1 to 9 = January to September A = October B = November C = December Year (e.g., 5 = 2015 6 = 2016) X Y Z “M” prefix denotes halogen-free compound M ADP MXY Polarity (for PAR TVS only) Type code Date code Cathode band AY MXYZ Polarity (for TRANSZORB® TVS and power voltage-regulating diodes) Type code Date code Cathode Band SJ MXY Cathode band Polarity (for rectifiers) Type code Date code Note  Type code refers to individual datasheet DATE CODE Factory designator Month 1 to 9 = January to September A = October B = November C = December Year (e.g., 5 = 2015 6 = 2016) X Y Z “M” prefix denotes halogen-free compound M MXY Cathode bandPolarity (for rectifiers) Type code Date code AE MXY Polarity (for TVS MSP series only) Cathode band Type code Date code DATE CODE Month 1 to 9 = January to September A = October B = November C = December Year (e.g., 5 = 2015 6 = 2016) X Y 13A XY Polarity Cathode band Type code Date code Note  Type code refers to individual datasheet

www.vishay.com Vishay Revision: 11-Jan-18 7 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SMF (DO-219AB) MARKING FlatPAK 5 X 6 MARKING BRIDGE MARKING Single in-line bridge marking DATE CODE Month 1 to 9 = January to September O = October N = November D = December Year (e.g., G = 2015; H = 2016; I = 2017; K = 2018; L = 2019) According EN 600626 X YPolarity Date code Type code Cathode band XY DATE CODE M X Y V10M12D MXX Logo Type code Date code Pin 1 MARK Month 1 to 9 = January to September A = October B = November C = December Year (e.g. 6 = 2016 7 = 2017) “M” prefix denotes halogen-free compound Case Style KBPM Case Style KBU, GBU Case Style BU Case Type KBL, GBL Case Style GSIB-5S, PB DATE CODE (for RoHS-compliant products) Week by calendar year (21st) Last digit of year (2015) Factory designator 5 21 X Note (1) Date code per individual part number specification Logo : Part number: 3KBP08M, BU2506 (example) UL approved: RU Location: China Date code (e.g.,521X, 1521X or M521X) Polarity: + Positive output terminal - Negative output terminal ~ Alternate DATE CODE (for halogen-free products) Factory designator Week by calendar year (21st) Last digit of year (2015) “M” prefix denotes halogen-free compound 5 21 XM DATE CODE (for RoHS-compliant products) Week by calendar year (21st) Last two digits of year (2015) Factory designator 15 21 X 1521X RU +- ~~ CHINA RU 521X 3KBP08M +- ~ GBU8K RU CHINA1521X +-~~ BU2506 RU CHINA 1521X +- ~~ +- ~ CHINA RU 1521X GBL08 GSIB2580

www.vishay.com Vishay Revision: 11-Jan-18 8 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DUAL IN-LINE BRIDGE MARKING MBS (TO-269AA) and MBM Mini-Bridge Note

• For halogen-free: add “Underli ne” below type code (e.g., 6)
• RMB2S and RMB4S only has ty pe code without date code TYPE TYPE CODE TYPE TYPE CODE B2S, B2M B2 MB4S, MB4M 4 B4S, B4M B4 MB6S, MB6M 6 B6S, B6M B6 RMB2S 2R MB2S, MB2M 2 RMB4S 4R TYPE TYPE CODE MBL104S BL104 MBL106S BL106 MBL108S BL108 MBL110S BL110 Factory designator DATE CODE Month 1 to 9 = January to September O = October N = November D = December Year (e.g., 5 = 2015 6 = 2016) X Y Z Negative output terminal Type code Date code A XYZ Positive output terminal Alternate ~~ Polarity: + Positive output terminal - Negative output terminal MBLS MXYYZ BL110 (top view) DATE CODE Factory designator Month 1 to 9 = January to September O = October N = November D = December Year (e.g., 5 = 2015 6 = 2016) X Y Z “M” prefix denotes halogen-free compound M Logo Date code Type code

www.vishay.com Vishay Revision: 11-Jan-18 9 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DFS, DFM, and WOG DFS DFM DF 06S XYYZ DF06 XYYZ Bevel Bevel (top view) (top view) DFS DFM DF 06S MXYYZ DF06 MXYYZ Bevel Bevel (top view) (top view) WOG 2W10G XYYZ (top view) WOG 2W10G MXYYZ (top view) Case Style GBPC1/GBPC6 Bevel (side view) DATE CODE Factory designator Week by calendar year (21st) Last digit of year (2015) “M” prefix denotes halogen-free compound X YY ZM Notes (1) Date code per individual part number specification (2) Non “M” mark belongs to RoHS-compliant product (3) “M” prefix denotes halogen-free compound Case Style GBPC/GBPC-W (side view) Logo: Part number: GBPC2508 (example) UL approved: RU Location: China Date code: (M)XYYZ Polarity: + Positive output terminal - Negative output terminal ~ Alternate Bevel CHINA MXYYZ GBPC2508 RU GBPC602RU XYYZ CHINA

www.vishay.com Vishay Revision: 11-Jan-18 10 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Vishay Semiconductors (Small Signal Products) SMD MARKING CLP0603 MARKING CLP1608 MARKING DO-213 MARKING DATE CODE 5D 1 Type code Cathode mark Opening of “C” indicates month, where wafer lot was started in fab, e.g. 3 o’clock means March Year e.g. 1 5D Note  Type code refers to individual datasheet DATE CODE 104 13 Type code Cathode mark Year e.g. 2013 Month e.g. June 104 Note  Type code refers to individual datasheetMarking: cathode Cathode ring View from top unwind

www.vishay.com Vishay Revision: 11-Jan-18 11 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SMA (DO-214AC) MARKING SMF (DO-219AB) MARKING LLP75, LLP1713, LLP2510, LLP2513, LLP3313 MARKING DATE CODE Family identifier Zener voltage 03C BZG Type code xVx Cathode mark V BZG 03C xVx V Factory designation Note  Type code refers to individual datasheet e.g. DATE CODE Year Month e.g. 4 A Type code XY XY Cathode mark Note  Type code refers to individual datasheet e.g. A ... 2010 B ... 2011 C ... 2012 D ... 2013 E ... 2014 F ... 2015 G ... 2016 J ... 2017 DATE CODE Year ... pin 1 Month e.g. 4 A... Type code X... A 4 X Y K ... 2018 L ... 2019 M ... 2020 N ... 2021 P ... 2022 R ... 2023 S ... 2024 T ... 2025 U ... 2026 V ... 2027 W ... 2028 X ... 2029 A ... 2030 .... According EN 600626... pin 1 X A4 LLP75 LLP1713, LLP2510 ... pin 1 XY A4 LLP2513, LLP3313 Note  Type code refers to individual datasheet

www.vishay.com Vishay Revision: 11-Jan-18 12 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 LLP1006, LLP1010 MARKING MicroMELF MARKING MicroSMF (DO-219AC) MARKING QuadroMELF (SOD-80) MARKING DATE CODE A... Type code Cathode / pin 1 X... Jan14-A, Feb14-B, Mar14-C, Apr14-D, May14-E, Jun14-F, Jul14-G, Aug14-H, Sep14-J, Oct14-K, Nov14-M, Dec14-N, Jan15-P, Feb15-Q, Mar15-R, Apr15-S, May15-T, Jun15-U, Jul15-V, Aug15-W, Sep15-X, Oct15-Y, Nov15-Z, Dec15- , Jan16- , Feb16- , Mar16- , Apr16- , May16- , Jun16- , Jul16- , Aug16- , Sep16- , Oct16- , Nov16- , Dec16- , Jan17- , Feb17- , Mar17- , Apr17- , May17- , Jun17-1, Jul17-2, Aug17-3, Sep17-4, Oct17-5, Nov17-6, Dec17-7, Jan18 = Jan14,…. B C D A E F G J K M P Q R T U V W Y AX AX Pin 1 mark Note  Type code refers to individual datasheet Marking: cathode Cathode ring unwind View from top DATE CODE Month 1 to 9 = January to September A = October B = November C = December Year (e.g., 5 = 2015 6 = 2016) X Y 13A XY Polarity Cathode band Type code Date code Note  Type code refers to individual datasheet Marking: cathode Cathode ring unwind View from top

www.vishay.com Vishay Revision: 11-Jan-18 13 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 MiniMELF (SOD-80) MARKING MiniMELF (SOD-80) TLZ MARKING SOD-123 MARKING SOD-323 MARKING Marking: cathode Cathode ring unwind View from top Cathode ring unwind 2A4 2A4 2A4 2A4 View from top Marking: type and cathode e.g. DATE CODE Year Month 4 Y Type code (.) for more codes Cathode mark X.Y X.Y Note  Type code refers to individual datasheet Type code No date code Cathode mark XYZ or X.Y X.Y XYZ Note  Type code refers to individual datasheet

www.vishay.com Vishay Revision: 11-Jan-18 14 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SOD-523 MARKING SOT-23 MARKING SOT-3xx MARKING DATE CODE Type code Cathode mark X A.X Jan14-A, Feb14-B, Mar14-C, Apr14-D, May14-E, Jun14-F, Jul14-G, Aug14-H, Sep14-J, Oct14-K, Nov14-M, Dec14-N, Jan15-P, Feb15-Q, Mar15-R, Apr15-S, May15-T, Jun15-U, Jul15-V, Aug15-W, Sep15-X, Oct15-Y, Nov15-Z, Dec15- , Jan16- , Feb16- , Mar16- , Apr16- , May16- , Jun16- , Jul16- , Aug16- , Sep16- , Oct16- , Nov16- , Dec16- , Jan17- , Feb17- , Mar17- , Apr17- , May17- , Jun17-1, Jul17-2, Aug17-3, Sep17-4, Oct17-5, Nov17-6, Dec17-7, Jan18 = Jan14,…. B C D A E F G J K M P Q R T U V W Y Note  Type code refers to individual datasheet XYZ DATE CODE Vishay Year Work week 45 45 0 V Type code XYZ Note  Type code refers to individual datasheet e.g. H ... 2016 J ... 2017 K ... 2018 L ... 2019 M ... 2020 N ... 2021 According EN 600626 DATE CODE Vishay Year Work week 10 10 0 V Type code XYZ V0 XYZ Note  Type code refers to individual datasheet e.g. H ... 2016 J ... 2017 K ... 2018 L ... 2019 M ... 2020 N ... 2021 According EN 600626

www.vishay.com Vishay Revision: 11-Jan-18 15 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 AXIAL MARKING DO-35 (DO-204AH) BAV, BAW, BAS MARKING DO-35 (DO-204AH) SCHOTTKY BAT,  SD MARKING DO-35 (DO-204AH) ZENER BZX55 MARKING DO-35 (DO-204AH) ZENER TZX MARKING DO-35 (DO-204AH) 1N4148 MARKING DO-35 (DO-204AH) ZENER 1N52 MARKING Cathode ring unwind V BAV BAV View from top Marking: type and cathode Cathode ring unwind BAT s BAT View from top Marking: type and cathode Cathode ring unwind BZX 55A 9V1 BZX View from top Marking: type and cathode Cathode ring unwind TZX 9V1 B TZX View from top Marking: type and cathode Cathode ring unwind V4148 Marking: type and cathode Cathode ring unwind View from top 1N5 221 B 1N5 Marking: type and cathode

www.vishay.com Vishay Revision: 11-Jan-18 16 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DO-41 (DO-204AL) BZX85 MARKING DO-41 (DO-204AL) ZPY MARKING DO-41 (DO-204AL) 1N47xx MARKING SOD-57, SOD-64 MARKING CODE Marking: type and cathode Cathode ring unwind BZX 85C 9V1 BZX View from top Marking: type and cathode Cathode ring unwind ZPY 9V1 ZPY View from top Marking: type and cathode Cathode ring unwind 1N4 728 A 1N4 View from top SOD-57 V BYW56 V BY228 SOD-64 SOD-57 and SOD-64 Avalanche diodes The unique part number is followed by letter “V”, means Vishay e.g. BYT62 V; SF1600 V or BYW83 V SOD-57 Zener diodes BZT03Cxx - where “xx” means the Zener voltage (no “V” after the part number) SOD-64 Zener diodes BZW03Cxx - where “xx” means the Zener voltage (no “V” after the part number)

www.vishay.com Vishay Revision: 11-Jan-18 17 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Vishay Semiconductors (High Power Products) SMF (DO-219AB) MARKING SMA (DO-214AC), SMB (DO-214AA), SMC (DO-214AB) (FRED Pt ®) MARKING SMA (DO-214AC), SMB (DO-214AA), SMC (DO-214AB) (Schottky) MARKING 1st row Second digit: month (1 = Jan; 2 = Feb; ... O = Oct; N = Nov; D = Dec) 2nd row First digit: environmental digit Second digit: current / voltage rating E 1 M A H According EN 600626 Environmental digit code Date code Type code Cathode band 1H2 VXY Z H Process type: X = hyperfast recovery time H = hyperfast recovery time U = ultrafast recovery time L = low VF ultrafast recovery time Month: 1 to 9 = January to September A = October B = November C = December Year XY Date Code Voltage FRED Pt 2 = 200 V 6 = 600 V Current 1 = 1 A 5 = 5 A Type Code SA XY M Halogen-free compound mark Date code Type code Cathode band Month: 1 to 9 = January to September A = October B = November C = December Year XY Date Code S Voltage Schottky standard: C = 15 V E = 30 V F = 40 V H = 60 V J = 100 V Current 1 = 1 A X = 1.5 A 2 = 2 A 3 = 3 A 4 = 4 A A Type Code Schottky MBR series: 2 = 20 V 3 = 30 V 4 = 40 V 6 = 60 V 9 = 90 V 0 = 100 V

www.vishay.com Vishay Revision: 11-Jan-18 18 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SlimSMA (DO-221AC) MARKING SMPC MARKING Date code Cathode band H Process type: X = hyperfast recovery time H = hyperfast recovery time U = ultrafast recovery time L = low VF ultrafast recovery time Month: 1 to 9 = January to September A = October B = November C = December Year XY Date Code Voltage 2 = 200 V 3 = 300 V Current 1 = 1 A 5 = 5 A Type Code 1H2 XY Z Type code Environmental digit code FCH2 MXY (For rectifiers)Polarity 2nd row Environmental digit Year 1 = 2011 2 = 2012 Month 1 to 9 = January to Septembe r A = October B = November C = December MYX 1st row Current C = common cathode E = single die Family H, U, X, L Volt class 1 = 100 V 2 = 200 V 3 = 300 V CURRENT DI GIT CURRENT DI GIT 1D8Q 2F7R

3 G 10 S

4 J 11 T

5 K 12 V

6 N 13 Y

7 P 14 Z

www.vishay.com Vishay Revision: 11-Jan-18 19 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SMPD MARKING 16CDU06 M321X (For Single Die Parts) Logo Part number Date code Circuit diagram 4EDH06 M321X (For Dual Die Parts) Logo Part number Date code Circuit diagram 1st row

16 C D U 06

10 = 10 A 20 = 20 A C = common cathode E = single die D = SMPD package Family H, U, X, L Volt cla ss 1 = 100 V 2 = 200 V 3 = 300 V 2nd row M Y WW X Environmental digit Year 1 = 2011 2 = 2012 .. Week Factory designator

www.vishay.com Vishay Revision: 11-Jan-18 20 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TO-220 MARKING Examples: TO-220AB, TO-220FP, TO-220AC E, TO-220AC-N3 TO-220AB E Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified TO-220FP-N3 Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified TO-220AC E, TO-220AC-N3 Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified Example: This is a xxxxxxxx (1) with assembly lot code AC, assembled on WW 19, 2011 in the assembly line “X” Assembly lot code Part number xxxxxxxx (1) V Z119X AC Product version (optional): Z (replaced according below table) Date code: year 1 = 2011 week 19 line X Assembly lot code Part number FP = FULL-PAK xxxxxxFP (1) AC Example: This is a xxxxxxFP (1) with assembly lot code AC, assembled on WW 19, 2011 in the assembly line “X” V Z119X Product version (optional): Z (replaced according below table) Date code: year 1 = 2011 week 19 line X Example: This is a xxxxxx (1) with assembly lot code AC, assembled on WW 19, 2011 in the assembly line “X” Assembly lot code Part number xxxxxx (1) V Z119X AC Product version (optional): Z (replaced according below table) Date code: year 1 = 2011 week 19 line X

www.vishay.com Vishay Revision: 11-Jan-18 21 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TO-220FP 2L Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified TO-220AC 2L Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified Assembly lot code Part number FP = FULL-PAK xxxxxxxFP (1) AC Example: This is a xxxxxxxFP (1) with assembly lot code AC, assembled on WW 19, 2011 in the assembly line “X” V Z119X Z = lead (Pb)-free Date code: year 1 = 2011 week 19 line X Example: This is a xxxxxx with assembly lot code AC, assembled on WW 19, 2001 in the assembly line “M” Product version (optional): Z (replaced according below table) None = standard Date code: year 1 = 2001 week 19 line M Assembly lot code Part number xxxxxx V Z119M AC

www.vishay.com Vishay Revision: 11-Jan-18 22 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TO-247 MARKING Examples: TO-247, 3 pins long-lead Notes (1) If part number contains “H” as last digit, product is AEC-Q101 qualified (2) If part number contains “L”, product is long-lead TO-247, 2 pins long-lead Notes (1) If part number contains “H” as last digit, product is AEC-Q101 qualified (2) If part number contains “L”, product is long-lead TO-247AC-N3 Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified Assembly lot code Product version (optional): Z (replaced according below table) Date code: year 1 = 2011 week 19 line X Part number Example: Thi s is a xxxxxxx (1) with a ssembly lot code AC, a ssembled on WW 19, 2011 in the a ssembly line ”X”xxxxxxx(1)(2) V Z119X A C Assembly lot code Product version (optional):  P = lead (Pb)-free Date code: year 1 = 2011 week 19 line X Part number Example: This is a xxxxxxx with assembly lot code AC, assembled on WW 19, 2011 in the assembly line ”X” V P119X AC xxxxxxx(1)(2) Assembly lot code Product version (optional): Z (replaced according below table) Date code: year 1 = 2011 week 19 line X Part number Example: Thi s is a xxxxxxx (1) with a ssembly lot code AC, a ssembled on WW 19, 2011 in the a ssembly line ”X”xxxxxxx (1) V Z119X A C

www.vishay.com Vishay Revision: 11-Jan-18 23 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TO-247AC-N3 modified Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified TO-247 PbF TO-247 PbF modified Super TO-247 Assembly lot code Product version (optional): Z (replaced according below table) Date code: year 1 = 2011 week 19 line X Part number Example: This is a xxxxxxx (1) with assembly lot code AC, assembled on WW 19, 2011 in the assembly line ”X” xxxxxxx (1) V Z119X A C Assembly lot code Product version (optional): P = lead (Pb)-free None = standard Date code: year 1 = 2001 week 19 line X Part number Example: T his is a xxxxxxx with assembly lot code AC, assembled on WW 19, 2001 in the assembly line ”X” xxxxxxx V P119X AC Assembly lot code Product version (optional): P = lead (Pb)-free None = standard Date code: year 1 = 2001 week 19 line X Part number Example: This is a xxxxxxx with assembly lot code AC, assembled on WW 19, 2001 in the assembly line ”X” xxxxxxx V P119X AC Assembly lot code Part number Example: This is a xxxxxxx with assembly lot code 5657, assembled on WW 35, 2000 in assembly line “H” xxxxxxx 56 57 V P035H Product version (optional): P = lead (Pb)-free None = standard Date code: year 0 = 2000 week 35 line H

www.vishay.com Vishay Revision: 11-Jan-18 24 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2PAK (TO-263AA), TO-262 MARKING Examples: D 2PAK E (TO-263AA) TO-262AA D 2PAK (TO-263AA) xxxxxxxx V PYWWX AC Assembly lot code Part number Example: This is a xxxxxxxx with assembly lot code AC, assembled on WW 19, 2001 in the assembly line “X” Product version (optional): P = lead (Pb)-free None = standard Date code: year 1 = 2001 week 19 line X xxxxxxx-x AC Assembly lot code Part number Example: This is a xxxxxxx-x with assembly lot code AC, assembled on WW 19, 2001 in the assembly line “X” V PYWWX Product version (optional): P = lead (Pb)-free None = standard Date code: year 1 = 2001 week 19 line X Assembly lot code Part number xxxxxxS AC Example: This is a xxxxxxS with assembly lot code AC, assembled on WW 02, 2000 Product version (optional): P = lead (Pb)-free Date code: Year 0 = 2000 week 02 line X child lot A V PYWWXA

www.vishay.com Vishay Revision: 11-Jan-18 25 Document Number: 88912 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DPAK (TO-252AA) MARKING Examples: DPAK ENote (1) If part number contains “H” as last digit, product is AEC-Q101 qualified DPAK Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified PowerTab® MARKING Examples: PowerTab Note (1) If part number contains “H” as last digit, product is AEC-Q101 qualified Assembly lot code Part number xxxxxxx (1) V Z012C YYYY Example: This is a xxxxxxx with assembly lot code YYYY, assembled on WW 12, 2000 in the assembly line “C” Product version (optional): Z (replaced according below table) Date code: year 0 = 2000 week 12 line C Assembly lot code Part number xxxxxxx (1) Example: T his is a xxxxxxx with assembly lot code YYYY, assembled on WW 12, 2000 in the assembly line “C” V Z012C Product version (optional): Z (replaced according below table) Date code: year 0 = 2000 week 12 line C A A Assembly lot code Product version (optional): F = RoHS-compliant and totally lead (Pb)-free Date code: year 8 = 2008 week 42 line X Part number Example: Thi s is a xxxxxxxx (1) with a ssembly lot code LL, a ssembled on WW 42, 2008 in the a ssembly line ”X” xxxxxxxx (1) V F842X L L

VMN-MS7319-1703© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED.www.vishay.com 技術に関するお問い合わせ先： DiodesAmericas@vishay.com 、DiodesEurope@vishay.com 、DiodesAsia@vishay.com 端子形状が非対称・対称なフラッ トリードタイプパッケージで提供 各種eSMP®パッケージで提供 される製品シリーズ

• ESD保護ダイオード
• PAR® TVSダイオード
• TransZorb® TVS ダイオード
• ツェナーダイオード
• アバランシェダイオード
• FRED Pt®ダイオード
• ショットキーダイオード
• 標準・高速リカバリーダイオード
• TMBS® ダイオード
• 超高速リカバリーダイオード 車載 産機 テレコミュニケーション 照明 DC/DCコンバータ フリーホイール 用途
• 独自開発パッケージ
• 電力効率の向上
• 高い電流駆動能力
• 熱性能と信頼性の 向上に貢献 電流 電力効率 eSMP® パッケージ パワーデバイス向けに最適化 した表面実装型パッケージ 参 照 リンク： eSMP® シリーズ製品概要 www.vishay.com/doc?49383 ダイオード（eSMP®シリーズパッケージ） www.vishay.com/landingpage/tradeshows/diodes/ eSMP ® シリーズ SMPD (TO-263AC) SlimDPAK (TO-252AE) SMPC (TO-277A) SMPA (DO-221BC) SlimSMA (DO-221AC) SMP (DO-220AA) SMF (DO-219AB) MicroSMP (DO-219AD) MicroSMF (DO-219AC) 省 ス ペース化を実現する小型パッケー ジ IN A NUTSHELLパワーダイオード製品の小型・薄型パッケージソリューション eSMP® シリーズ

VMN-MS7319-1703VISHAY INTERTECHNOLOGY, INC. 2017 年版权所有。www.vishay.com 技术问题垂询：DiodesAmericas@vishay.com 、DiodesEurope@vishay.com 或 DiodesAsia@vishay.com 提供不对称和对称扁平式封装 eSMP®系列封装提供的产品 技术：

• ESD 保护二极管
• PAR® TVS 二极管
• TransZorb® TVS 二极管
• 齐纳二极管
• 雪崩整流器
• FRED Pt® 整流器
• 肖特基整流器
• 标准和快速恢复整流器
• TMBS® 整流器
• 超快恢复整流器 汽车 工业 电信 照明 DC/DC CONVERTERS 转换器（续流） 应用 利用可提供更出色热 性能和可靠性的独特 设计支持更高的电流 和功率效率 电流 功率效率 eSMP® 封装 增强型表面贴装功率封装 有用链接 eSMP® 系列产品概述： www.vishay.com/doc?49383 采用 eSMP® 系列封装的二极管/整流器： www.vishay.com/landingpage/tradeshows/diodes/ eSMP® 系列 SMPD (TO-263AC) SlimDPAK (TO-252AE) SMPC (TO-277A) SMPA (DO-221BC) SlimSMA (DO-221AC) SMP (DO-220AA) SMF (DO-219AB) MicroSMP (DO-219AD) MicroSMF (DO-219AC) 节省空间的小型封装 快速了解用于选定二极管和整流器的小尺寸和低型面高度封装解决方案 eSMP® 系列

Pad Layouts/Soldering Process www.vishay.com Vishay General Semiconductor Revision: 12-Sep-13 1 Document Number: 88854 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Pad Layouts/Soldering Process VISHAY GENERAL SEMICONDUCTOR RECOMMENDED MINIMUM MOUNTING PAD LAYOUT SIZES FOR THE SURFACE MOUNT RECTIFIER 0.085 (2.159) MAX. 0.086 (2.18) MIN. 0.060 (1.52) MIN. 0.220 (5.59) REF . MicroSMP 0.079 (2.00) 0.032 (0.80) 0.032 (0.80) 0.020 (0.50) 0.043 (1.10) DFS BRIDGE 0.047 (1.20) MIN. 0.404 (10.26) MAX. 0.060 (1.52) MIN. 0.205 (5.2) 0.195 (5.0) TO-263 0.670 (17.02) 0.591 (15.00) 0.42 (10.66) MIN. 0.33 (8.38) MIN. 0.15 (3.81) MIN. 0.08 (2.032) MIN. 0.105 (2.67) 0.095 (2.41) TO-277A (SMPC) 0.189 (4.80) MIN. 0.186 (4.72) MIN. 0.268 (6.80) 0.050 (1.27) MIN. 0.185 (4.69) MAX. 0.126 (3.20) MIN. 0.060 (1.52) MIN. 0.320 (8.13) REF . C B D A DO-213AA (GL34)/ DO-213AB (GL-41) DO-220AA (SMP) 0.105 (2.67) 0.025 (0.635) 0.030 (0.762) 0.050 (1.27) 0.100 (2.54) All dimensions in inches (millimeters) 0.066 (1.68) MIN. 0.074 (1.88) MAX. 0.060 (1.52) MIN. 0.208 (5.28) REF . DO-214AC (SMA)/ DO-214BA (GF1) MBS BRIDGE 0.023 (0.58) MIN. 0.272 (6.91) MAX.0.030 (0.76) MIN. 0.105 (2.67) 0.095 (2.41) MBLS BRIDGE 0.028 (0.7) MIN. 0.252 (6.4) MAX.0.016 (0.45) MIN. 0.165 (4.2) 0.150 (3.8) DO-214AA (SMB) DO-214AB (SMC)

Pad Layouts/Soldering Process www.vishay.com Vishay General Semiconductor Revision: 12-Sep-13 2 Document Number: 88854 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VISHAY GENERAL SEMICONDUCTOR RECOMMENDED SOLDERING PROCESS Through hole device (THD) and surface mount device (SMD) i mply different soldering technologies leading to different constraints. In THD, the package body is exposed to relatively low temperatures (< 150 °C) because the lead extremeties are only dipped in the soldering alloy, whereas in SMD the whole package body is exposed to a very high temperature (> 240 °C) during reflow soldering process. In addition, molding compounds used for encapsulation absorb moisture from the ambient medi um. During rapid heating in solder reflow process; this absorded moisture can vaporize, generating pressure at lead frame pad/silicon to plastic interfaces in the package, with a risk of package cracking and potential degradation of device reliability. Wave soldering with SMD packages is no t recommended because the thermal shock associated with package body solder dipping may induce internal structural damage to the package (interface delamination) that may affect long term reliability. SMD package characterizations performed as a standard by Vishay only induce Solder Reflow Resistance assessment. JEDEC JESD A111 recommends that wave soldering of SMD packages should be evaluated by the USER, because the stress induced inside the package is very dependant of solder process parameters. Due to the higher melting point of lead (Pb)-free alloys, the temperature of the solder pot will also increase to improve solderability and shorten contact times. For AgSnCu with melting point of 217 °C, the solder pot temperature will be between 250 °C to 270 °C or as high as 260 °C to 280 °C for SnCu. DIMENSIONS in inches (millimeters) DO-213AA (GL34) DO-213AB (GL41) 0.047 (1.20) MIN. 0.047 (1.20) MIN. 0.123 (3.12) MAX. 0.217 (5.52) REF . 0.060 (1.52) MIN. DO-221AC (SlimSMA) DO-221BC (SMPA) 0.087 (2.20) MIN. MIN. MAX. 0.037 (0.92) 0.217 (5.52) 0.060 (1.52) MIN. 0.604 (15.33) 0.525 (13.33) 0.080 (2.03) MIN. 0.120 (3.05) REF. (2.67) (2.41) 0.105 0.095 REF.0.330 0.420 (10.66) MIN. TO-263AC (SMPD)

Pad Layouts/Soldering Process www.vishay.com Vishay General Semiconductor Revision: 12-Sep-13 3 Document Number: 88854 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RECOMMENDED WAVE SOLDERING PROFILE FOR THROUGH HOLE COMPONENTS Fig. 1 Fig. 2 REFLOW FOR SURFACE MOUNTED COMPONENTS Notes (1) Tolerance for peak profile temperature (Tp) is defined as a supplier minimum and user maximum (2) Tolerance for time at peak profile temperature (Tp) is defined as a supplier minimum and user maximum Full line: typical Dotted line: process limits 0 50 100 150 200 250 100 150 200 250 300 Time (s) Temperature (°C) 235 °C ~ 260 °C < 105 °C to 165 °C Second wave First wave - 5 °C/s - 2 °C/s + 200 °C/s + 2 °C/s Forced cooling 10 s Activation of Flux 100 °C ~ 130 °C Pb 270 °C +/- 5 °C Tmelt 217 °C Preheating 180 °C max. Preheating 130 °C min. First wave Second wave 6 °C/s max. 4 °C/s max. Time2 min to 5 min Notes

• Temperature jump from T 2 to T3 (w1): 150 °C max.
• Time from 25 °C to T3 (wave temp.): 8 min max. t (w1 + w2) 7 S+ 2 - 0 Lead (Pb)-free Temperature (°C) TABLE 1 - CLASSIFICATION REFLOW PROFILE PROFILE FEATURE Sn-Pb EUTECTIC ASSEMBLY LEAD (Pb)-FREE ASSEMBLY Preheat and soak Temperature min. (T Smin.) 100 °C 150 °C Temperature max. (TSmax.) 150 °C 200 °C Time (TSmin. to TSmax.) (tS) 60 s to 120 s 60 s to 120 s Average ramp-up rate (TSmax. to Tp) 3 °C/s maximum Liquidous temperature (TL) 183 °C 217 °C Time to liquidous (tL) 60 s to 150 s 60 s to 150 s Peak package temperature (Tp) (1) See classification temperature in table 2 See classification temperature in table 3 Time (tp) (2) with 5 °C of the specified classification temperature (TC) 20 s (2) 30 s (2) Average ramp-down rate (Tp to TSmax.) 6 °C/s maximum Time 25 °C to peak temperature 6 min maximum 8 min maximum

Pad Layouts/Soldering Process www.vishay.com Vishay General Semiconductor Revision: 12-Sep-13 4 Document Number: 88854 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 REFLOW PROFILE Fig. 3 Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature at the rated MSL level. Notes

• Package volume excludes external terminals (balls, bu mps, lands, leads) and/or non-integral heatsinks.
• The maximum component temperature reached during reflow depends on package thickness and volume. The use of convection reflow processes reduces the thermal gradients between packages. However, thermal gradients due to differences in thermal mass of SMD packages may still exist.
• Recommended soldering process is accordance with J-STD-020D. TABLE 2 - Sn-Pb EUTECTIC PROCESS PACKAGE PEAK REFLOW TEMPERATURES PACKAGE THICKNESS VOLUME mm3 < 350 VOLUME mm3 ≥ 350 < 2.5 mm 235 °C 220 °C ≥ 2.5 mm 220 °C 220 °C TABLE 3 - LEAD (Pb) - FREE PROCESS PACKAGE CLASSIFICATION REFLOW TEMPERATURES PACKAGE THICKNESS VOLUME mm 3 < 350 VOLUME mm3

350 TO 2000

2000 < 1.6 mm 260 °C 260 °C 260 °C 1.6 mm to 2.5 mm 260 °C 250 °C 245 °C ≥ 2.5 mm 250 °C 245 °C 245 °C Time Temperature tS Time 25 °C to Peak tp TP TL TSmin. tTSmax. Preheat Area TC - 5 °C Max. Ramp Up Rate = 3 °C/s Max. Ramp Down Rate = 6 °C/s User t PSupplier tP TC - 5 °C TC Supplier TP ≥ TC User TP ≤ TC

www.vishay.com Vishay General Semiconductor Revision: 27-Mar-18 1 Document Number: 88869 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Packaging Information Notes

• “P” and bold letter deno tes preferred package code
• A “T” suffix added to the pack aging codes for SMA, SMB and SMC products indicates that the patented folded-frame construction is used. This does not apply to TR and TR3 codes or T RANSZORB® TVS in SMA and SMB (1) Formerly sold by Vishay Telefunken® (Telefunken® is a registered trademark of Electro Holding GmbH) PACKAGING ORDERING CODE ANTI-STATIC PACKAGE CODE PREFERRED PACKAGE CODE PACKAGING DESCRIPTION 51, A Bulk 52, 52T P SMB (DO-214AA) /SMBG (DO-215AA), 12 mm tape, 7" diameter plastic reel 2D P SM5-8A (DO-218AB), 24 mm tape, 13" diameter plastic reel, anode towards sprocket hole 2E, K SM5-8A (DO-218AB), 24 mm tape, 13" diameter plastic reel, cathode towards sprocket hole 2M, P Tube packaging for 5KP/6KA type lead formed components 53, B 26 mm horizontal tapi ng and ammo box packaging 54, C P 52.4 mm horizontal tape, 13" diameter paper reel 5A, 5AT P SMA (DO-214AC), 12 mm ta pe, 13" diameter plastic reel 5B, 5BT P SMB (DO-214AA) / SMBG (DO-215AA) , 12 mm tape, 13" diameter plastic reel 5CA P GF1 (DO-214BA), 12 mm tape, 13" diameter plastic reel 57, 57T P SMC (DO-214AB) / SMCG (DO-215AB), 16 mm tape, 7" diameter plastic reel 6A P SlimSMA (DO-221AC), 12 mm ta pe, 7" diameter plastic reel 6B P SlimSMA (DO-221AC), 12 mm ta pe, 13" diameter plastic reel 9A, 9AT P SMC (DO-214AB) / SMCG (DO-215AB) , 16 mm tape, 13" diameter plastic reel 61, 61T P SMA (DO-214AC), 12 mm ta pe, 7" diameter plastic reel 67A P GF1 (DO-214BA), 12 mm tape, 7" diameter plastic reel 72, E P Bulk pack for bridge and special axial-leaded formed devices 73, D 52.4 mm horizontal tape and ammo box packaging

77 P DFS bridge, 16 mm tape, 13" diameter paper reel

80 P MB-S (TO-269AA) bridge, 12 mm tape, 13" diameter paper reel

81 P D

2PAK (TO-263AB) 24 mm tape, 13" diameter reinforced hub plastic reel 8W P D 2PAK (TO-263AB) (wire bond) 24 mm tape, 13" diameter reinforced hub plastic reel

83 P GL34 (DO-213AA) 8 mm tape , 13" diameter plastic reel

84A P SMP (DO-220AA) 12 mm tape, 7" diameter plastic reel 85A P SMP (DO-220AA) 12 mm tape, 13" diameter plastic reel 86A P SMPC (TO-277A), 12 mm tape, 7" diameter plastic reel 87A P SMPC (TO-277A), 12 mm tape, 13" diameter plastic reel 89A P MicroSMP (DO-219AD), 8 mm ta pe, 7" diameter plastic reel 45, P P Anti-static tube packag ing for Bridge and Power Pack 4W, P P Anti-static tube packaging for wire bond TO-220, ITO-220, TO-262 and TO-263

96 P GL41 (DO-213AB), 12 mm tape, 7" diameter plastic reel

97 P GL41 (DO-213AB), 12 mm tape, 13" diameter plastic reel

98 P GL34 (DO-213AA), 8 mm tape , 7" diameter plastic reel

100, V MPG06 pseudo radi al tape, cathode first out of ammo pack HP Tape in 7" diameter plastic reel IP Tape in 13" diameter plastic reel TR P SMA (DO-214AC), 12 mm tape , 7" diameter plastic reel (1) TR3 P SMA (DO-214AC), 12 mm tape , 13" diameter plastic reel (1)

www.vishay.com Vishay General Semiconductor Revision: 27-Mar-18 2 Document Number: 88869 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 BULK PACKAGING CASE TYPES PREFERRED PACKAGE CODE PACKAGING BOX SIZE QUANTITY INCHES cm EA. DF-M, DF-S, DFL-S 45 Anti-static plas tic tubes 17.4 length 44.1 length 50 GSIB-3S 45 Anti-static plastic tu bes 25.1 length 63.9 length 20 GSIB-5S, PB 45 Anti-sta tic plastic tubes 24.2 length 61.5 length 20 GBU, BU 45 Anti-stati c plastic tubes 18.5 length 47 length 20 GBL 45 Anti-static plastic tube s 17.5 length 44.5 length 20 TO-220AB / AC, ITO-220AC / AB, TO-262AA 45, 4W Anti-s tatic plastic tubes 21.0 length 53.7 length 50 TO-247AD 45 Anti-static plastic tubes 20.0 le ngth 50.8 length 30 MBS (TO-269AA) 45 Anti-s tatic plastic tubes 20.3 x 0.41 51.5 x 1.04 100 WOG, 2WOG 51 Plastic bags - - 100

www.vishay.com Vishay General Semiconductor Revision: 27-Mar-18 3 Document Number: 88869 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 AXIAL-LEADED TAPE AND REEL PACKAGING All axial-leaded devices are packed in accordance with EIA standard RS-296-E. The diagrams given below refer to these specifications. Fig. 1 Fig. 2 TABLE 1 - AMMO PACK PACKAGING PACKAGING AVAILABLE PRODUCT OUTLINES PREFERRED PACKAGE CODE DIMENSION A DIMENSION B DIMENSION C QUANTITY BOX 26 mm horizontal tape, ammo pack DO-41(DO-204AL), MPG06 DO-15 (DO-204AC) P300 53, B 53, B 53, B 9.7" (247 mm) 1.7" (44 mm) 3.7" (95 mm) 3.0K 1.5K 0.75K 52 mm horizontal tape, ammo pack DO-41(DO-204AL), MPG06 DO-15 (DO-204AC) DO-201AD, GP20 P600 73, D 73, D 73, D 73, D 10.0" (255 mm) 3.15" (80 mm) 4.53" (115 mm) 3.0K 2.0K 1.0K 0.3K Pseudo / radial tape, ammo pack MPG06 100, V 13.4" (340 mm) 1.8" (47 mm) 7.9" (200 mm) 2.0K A C B Inspection Hole (Both Sides) Ammo Pack can be Opened on Either Side, Depending on Desired Device Polarity Component Pitch A 2, 3 Inside Tape Spacing B 2, 3 Lead to Lead Eccentricity |D1 - D2| - Lead Extension K - Lead Bending E 2 Cumulative Pitch P 3 Exposed Adhesive S - Tape Width T - All polarized components shall be oriented in the same direction Description Symbol E D1 D2 A P K S B W 0.8 (0.031) Max. Dimensions A, M, K, P , S and T apply to both sides Dimensions in millimeters (inches) E T6.0 ± 0.4 (0.236 ± 0.0157) The “C” dimension of Fig. 2 is between flanges of the component reel and shall be 1.5 mm (0.059") to 8.00 mm (0.315") greater than the overall taped component width “W” (Fig. 1). Where “W” dimension is 68.2 mm (2.68") max. 38.1 (1.50) Dia. 14.3 (0.56) Dia. D Dia. (Table 2) Kraft Paper 91.9 (3.62) Dia. 50.8 (2.00) Dia. Cathode Lead Colored Tape C Anode Lead White Tape

www.vishay.com Vishay General Semiconductor Revision: 27-Mar-18 4 Document Number: 88869 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 AXIAL-LEADED TAPE AND REEL PACKAGING Note

• Package codes, 61/5A, 52/5B are ma trix-frame constructions for T RANSZORB® TVS in SMA and SMB only TABLE 2 - REEL AND AMMO PACK TAPING SPECIFICATIONS COMPONENT  CASE TYPE PREFERRED PACKAGE CODE UNITS PER REEL COMPONENT PITCH “A” Fig. 1 INSIDE TAPE SPACING “B” Fig. 1 REEL DIMENSION “D” Fig. 2 LEAD BENDING “E” Fig. 1 EA. INCHES mm INCHES mm INCHES mm INCHES mm DFS Surface-Mount 77 1500 Fig. 8 - - 13.0 330 Fig. 8 - GF1 (DO-214BA) 67A, H / 5CA, I 1500 / 6500 - - 7.0 / 13.0 178 / 330 Fig. 8 - GL34 (DO-213AA) 98, H / 83, I 2500 / 9000 - - 7.0 / 13.0 178 / 330 Fig. 8 - GL41 (DO-213AB) 96, H / 97, I 1500 / 5000 - - 7.0 / 13.0 178 / 330 Fig. 8 - SMP (DO-220AA) 84A, H / 85A, I 3000 / 10 000 Fig. 8 - - 7.0 / 13.0 178 / 330 Fig. 8 - SMF (DO-219AB) H / I 3000 / 10 000 - - 7.0 / 13.0 178 / 300 Fig. 8 - SMPD (TO-263AC) / SMPA (DO-221BC) I 2000 / 14 000 - - 13.0 330 Fig. 8 - MicroSMP (DO-219AD) / MicroSMF (DO-219AC) 89A / H 4500 - - 7.0 178 Fig. 8 - SMPC (TO-277A) 86A, H / 87A, I 1500 / 6500 - - 7.0 / 13.0 178 / 330 Fig. 8 - SMA (DO-214AC) 61, 61T, TR, H / 5A, 5AT, TR3, I 1800 / 7500 - - 7.0 / 13.0 178 / 330 Fig. 8 - SMB (DO-214AA) / SMBG (DO-215AA) 52, 52T, H / 5B, 5BT, I 750 / 3200 - - 7.0 / 13.0 178 / 330 Fig. 8 - SMC (DO-214AB) / SMCG (DO-215AB) 57, 57T, H / 9A, 9AT, I 850 / 3500 - - 7.0 / 13.0 178 / 330 Fig. 8 - DO-218AB / AC 2D / I 750 - - 13.0 330 Fig. 8 - D 2PAK (TO-263AB) 81, 8W, I 800 - - 13.0 330 Fig. 8 - MBS (TO-269AA) 80, I 3000 - - 13.0 330 Fig. 8 - SlimSMA (DO-221AC) 6A, H / 6B, I 3500 / 14 000 - - 7.0 / 13.0 178 / 330 Fig. 8 - SlimSMAW H, I 3500 / 14 000 - - 7.0 / 13.0 178 / 330 Fig. 8 - SlimDPAK (TO-252AE) I 4500 - - 13.0 330 Fig. 8 - FlatPAK 5 x 6 H / I 1500 / 6000 - - 7.0 / 13.0 178 / 330 Fig. 8 - TABLE 3 - COMPONENT AND INSIDE HORIZONTAL TAPE SPACING COMPONENT BODY DIAMETER COMPONENTS SPACING A (LEAD TO LEAD) INSIDE TAPE SPACING "B" CUMULATIVE PITCH TOLERANCE 0 mm to 5 mm  (0.0" to 0.197") 5.0 mm ± 0.5 mm (0.197" ± 0.020") 26 mm + 1.5 mm / - 0.0 mm Not to exceed 1.5 mm (0.059") over 6 consecutive components 0 mm to 5 mm  (0.0" to 0.197") 5.0 mm ± 0.5 mm (0.197" ± 0.020") 52.4 mm + 1.5 mm / - 0.4 mm 5.01 mm to 10 mm  (0.197" to 0.394") 10 mm ± 0.5 mm (0.394" ± 0.020") 52.4 mm + 1.5 mm / - 0.4 mm

www.vishay.com Vishay General Semiconductor Revision: 27-Mar-18 5 Document Number: 88869 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DIMENSIONS in millimeters (inches) Fig. 3 - Pseudo Radial RADIAL TAPE PACKAGING Fig. 4 - Reel Dimensions Notes

• “C” dimension between the reel flanges shall be governed by th e overall width of the taped components and shall be 1.5 mm (0.0 57") to 8.0 mm (0.315") greater than the overall width
• All leaded devices are packaged in accordance with EIA standard RS-468-A specification and are available on reel or in fan fold box (ammo pack)
• All dimensions are in millimeters and (inches) 16.0 (0.63) MIN. 2.0 (0.079) MAX. 11.0 (0.433) MAX. 13.0 (0.51) 12.4 (0.49) 4.3 (0.169) 3.7 (0.146) DIA. 12.5 (0.492) MIN. Tape 19.0 (0.748) 17.5 (0.689) 9.75 (0.384) 8.50 (0.335) ± 1.0 (1) (± 0.039) 1.0 (0.039) MAX. 0.6 (0.025) 0.4 (0.016) Available only for MPG06 Product in Ammo Pack in Accordance with EIA Standard RS-468-A Utilizing User Direction Feed 0.66 (0.026) 0.55 (0.022) Lead DIA. 2.54 (0.1) 2.29 (0.090) Body DIA.3.2 (0.125) 2.9 (0.115) 3.06 (0.118) MAX. 5.68 (0.224) 4.68 (0.184) 4.51 (0.178) 3.11 (0.122) (Center to Center) 12.7 (0.50) (Nominal) 1.0 MAX. (1) (0.04) Note: (1) Component Alignment Core DIA. 34.9 to 102 (1.37 to 4.02) “C” Arbor Hole DIA. 30 ± 5 ID (1.181 ± 0.197)

www.vishay.com Vishay General Semiconductor Revision: 27-Mar-18 6 Document Number: 88869 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SURFACE MOUNT TAPE AND REEL PACKAGING Fig. 5 Fig. 6 Fig. 7 Component Cavity Embossed Carrier Tape Top Cover Tape Thickness: 0.10 mm (0.004") Max. R Ref. Bending Radius Tape with Components shall Pass Around Bending Radius without Damage, for Reels with Hub Diameters Approaching Minimum Dimension B N A T D C G DIMENSIONS in millimeters (inches) TAPE SIZE A MAX. B MIN. C D MIN. N MIN. G MAX. T MAX.

www.vishay.com Vishay General Semiconductor Revision: 27-Mar-18 7 Document Number: 88869 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SURFACE MOUNT TAPE AND REEL PACKAGING Fig. 8 Notes (1) A0, B0, and K0 are determined by the maximum dimensions of the componen t size. The clearance between the component and the cavity (2) All surface mount components are packed in accordance with EIA standard 481-E 8 mm, 12 mm, 16 mm, AND 24 mm EMBOSSED TAPE in millimeters (inches) TAPE SIZE D 0 E1 P0 P2 A0, B0, K0 S1 MIN. T MAX. T 1 MAX. 8 mm, 12 mm 1.5 ± 0.1 (0.059 ± 0.004) 1.75 ± 0.1 (0.069 ± 0.004) 4.0 ± 0.1 (0.157 ± 0.004) 2.0 ± 0.05 (0.024) 0.600 (0.024) 0.1 (0.004)16 mm, 24 mm 2.0 ± 0.1 (0.079 ± 0.004) DIMENSIONS in millimeters (inches) GL34 (DO-213AA) 8 (0.315) 4.2 (0.165) 1.0 (0.039) 6.25 (0.246) 3.5 ± 0.05 (0.138 ± 0.002) 4.0 ± 0.10 (0.157 ± 0.004) (0.787) 2.4 (0.094) 8.3 (0.327)MicroSMP (DO-219AB) / MicroSMF (DO-219AD) 3.28 (0.129) 6.05 (0.238) 1.919 (0.076) (0.322) GL34 (DO-213AA) 12 (0.472) 8.2 (0.323) 1.5 (0.059) 10.25 (0.404) 5.5 ± 0.05 (0.217 ± 0.002) (0.984) 4.5 (0.177) 12.3 (0.484) SMA (DO-214AC) 2.64 (0.104) SMP (DO-220AA) 1.84 (0.072) SMPC (TO-277A) 7.0 (0.276) 8.0 ± 0.10 (0.315 ± 0.004) 1.43 (0.056) SMB (DO-214AA) / SMBG (DO-215AA) 8.2 SMC (DO-214AB) /  SMCG (DO-215AB) 16 (0.630) 12.1 (0.476) 14.25 (0.561) 7.5 ± 0.1 (0.295 ± 0.004) 2.64 (0.104) 16.3 (0.642)SlimDPAK (TO-252AE) 2.0 (0.079) DFS 12.0 ± 0.10 D2PAK (TO-263AB) DO-218AB / AC 24 (0.945) 20.1 (0.791) 22.25 (0.876) 11.5 ± 0.1 (0.453 ± 0.004) 16.0 ± 0.10 SlimSMA (DO-221AC) / SMPA (DO-221BC) 12 (0.472) 6.2 (0.244) 10.25 (0.404) 5.5 ± 0.05 (0.217 ± 0.002) 4.0 ± 0.10 (0.157 ± 0.004) 1.53 (0.060) 12.3 (0.484)SlimSMAW 1.61 (0.063) FlatPAK 5 x 6 6.4 (0.252) 8.0 ± 0.10 (0.315 ± 0.004) 1.20 ± 0.10 (0.047 ± 0.004) Notes (1) For machine reference only, including draft and radii concentric around B 0 (2) See note 1 and table T B1 (1) F W P A0 (2) D D1 for components 2.0 mm x 1.2 mm and larger Top Cover Tape De-Reeling Direction T T 10 Pitches Cumulative Tolerance on Tape ± 0.2 Rectifiers Polarization DO-218AB/2D and I DO-218 AC / I TVS Polarization GL41, SMA, SMB, SMC, SMP , MicroSMP , SMPC, SlimSMA, SlimSMAW, DO-218AB/2E and K, MicroSMF , SMF DFS, DFLS, MBS, and MBLS Polarization TO-263AB, TO-252, SMPD, and SlimDPAK

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