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Technical content
Features
600 V Schottky rectifier 175°C maximum operating temperature Positive temperature coefficient of V F Fast switching speeds Superior figure of merit Q C/IF Advantages Applications Improved circuit efficiency (Lower overall cost) Significantly reduced switch ing losses compare to Si PiN diodes Ease of paralleling devices without thermal runaway Smaller heat sink requirements Low reverse recovery current Low device capacitance Down Hole Oil Drilling, Geothermal Instrumentation High Voltage Multipliers Military Power Supplies Maximum Ratings at Tj = 175 °C, unless otherwise specified Parameter Symbol Conditions Values Unit Repetitive peak reverse voltage V RRM 1200 V Continuous forward current I F TC = 25 °C 100 A Continuous forward current I F TC ≤ 135 °C 50 A RMS forward current I F(RMS) TC ≤ 135 °C 87 A Surge non-repetitive forward current, Half Sine Wave IF,SM TC = 25 °C, tP = 10 ms 350 A TC = 135 °C, tP = 10 ms 313 Non-repetitive peak forward current I F,max TC = 25 °C, tP = 10 µs 1625 A I2t value ∫i 2 dt TC = 25 °C, tP = 10 ms tbd A 2S Power dissipation P tot TC = 25 °C 620 W Operating and storage temperature T j , Tstg -55 to 175 °C Electrical Characteristics at Tj = 175 °C, unless otherwise specified Parameter Symbol Conditions Values Unit min. typ. max. Reverse current I R VR = 1200 V, Tj = 25 °C 200 1000 µA VR = 1200 V, Tj = 175 °C 400 3000 Total capacitive charge Q C IF ≤ IF,MAX dIF/dt = 200 A/μs Tj = 175 °C VR = 400 V 158 nC Switching time t s VR = 400 V 50 ns Total capacitance C VR = 1 V, f = 1 MHz, Tj = 25 °C 2940 pF VR = 400 V, f = 1 MHz, Tj = 25 °C 203 *For chip size and metallization, please refer to the mechanical datasheet (must have a non-disclosure agreement with GeneSiC Semiconductor). VRRM = 600 V VF = 1.6 V IF (Tc=25°C) = 100 A QC = 158 nC
Die Datasheet* GB50SLT06-CAL Sep 2014 http://www.genesicsemi.com/index.php/hit-sic/baredie Page 3 of 3 Chip Dimensions: DIE A [mm] 4.5 B [mm] 4.5 METAL C [mm] 4.24 D [mm] 4.24 WIRE BONDABLE E [mm] 4.2 F [mm] 4.2
Revision History
Date Revision Comments Supersedes 2014/09/08 1 Initial Release Published by GeneSiC Semiconductor, Inc.
43670 Trade Center Place Suite 155
Dulles, VA 20166 GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice. GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any intellectual property rights is granted by this document. Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal injury and/or property damage.
Sep 2014 http://www.genesicsemi.com/index.php/hit-sic/baredie Pg1 of 1 SPICE Model Parameters Copy the following code into a SPICE software program for simulation of the GB50SLT06-CAL device. * MODEL OF GeneSiC Semiconductor Inc. * $Revision: 1.0 $ * $Date: 08-SEP-2014 $ * GeneSiC Semiconductor Inc. * 43670 Trade Center Place Ste. 155 * Dulles, VA 20166 * http://www.genesicsemi.com/index.php/hit-sic/baredie * COPYRIGHT (C) 2014 GeneSiC Semiconductor Inc. * ALL RIGHTS RESERVED * These models are provided "AS IS, WHERE IS, AND WITH NO WARRANTY * OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED * TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE." * Models accurate up to 2 times rated drain current. * Start of GB50SLT06-CAL SPICE Model .SUBCKT GB50SLT06 ANODE KATHODE R1 ANODE INT R=((TEMP-24)*9.39E-05); Temperature Dependant Resistor D1 INT KATHODE GB50SLT06_25C; Call the 25C Diode Model .MODEL GB50SLT06_25C D + IS 1.99E-16 RS 0.015652965 + N 1 IKF 1000 + EG 1.2 XTI 3 + CJO 3.86E-09 VJ 1.362328465 + M 0.48198551 FC 0.5 + TT 1.00E-10 BV 600 + IBV 1.00E-03 VPK 600 + IAVE 50 TYPE SiC_Schottky + MFG GeneSiC_Semiconductor .ENDS * End of GB50SLT06-CAL SPICE Model