FXO-HC735-2.048MHZ

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EEG Front-End Performance Demonstration Kit

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User's Guide SLAU443 –May 2012 EEG Front-EndPerformance DemonstrationKit Thisuser'sguidedescribesthecharacteristics,operation,and use oftheADS1299EEG-FE. ThisEVM is an evaluationmodule fortheADS1299, an eight-channel,24-bit,low-power;integratedanalogfront-end (AFE) designedforelectroencephalography(EEG) applications.The ADS1299ECG-FE isintendedfor prototypingand evaluation.Thisuser'sguideincludesa completecircuitdescription,schematicdiagram, and billofmaterials. The followingrelateddocuments areavailablethroughtheTexas Instrumentsweb siteatwww.ti.com. Device LiteratureNumber ADS1299 SBAS499

www.ti.com ListofFigures

2 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

ADS1299EEG-FE Overview www.ti.com

1 ADS1299EEG-FE Overview

1.1 ImportantDisclaimerInformation

Notice:The ADS1299EEG-FE isintendedforfeasibilityand evaluationtesting only in laboratoryand development environments.This productis not for diagnosticuse. The ADS1299EEG-FE istobe used onlyundertheseconditions:

The ADS1299EEG-FE isintendedonlyforelectricalevaluationofthefeaturesoftheADS1299 device ina laboratory,simulation,ordevelopmentenvironment.
The ADS1299EEG-FE isnotintendedfordirectinterfacewitha patient,patientdiagnostics,orwitha defibrillator.
The ADS1299EEG-FE isintendedfordevelopmentpurposesONLY .Itisnotintendedtobe used as all orpartofan end-equipmentapplication.
The ADS1299EEG-FE shouldbe used onlyby qualifiedengineersand technicianswho arefamiliar withtherisksassociatedwithhandlingelectricaland mechanicalcomponents,systems,and subsystems.
You areresponsibleforthesafetyofyourself,yourfellowemployeesand contractors,and yourco- workerswhen usingorhandlingtheADS1299EEG-FE. Furthermore,you arefullyresponsibleforthe contactinterfacebetween thehuman body and electronics;consequently,you areresponsiblefor preventingelectricalhazardssuch as shock,electrostaticdischarge,and electricaloverstressof electriccircuitcomponents.

1.2 Informationabout Cautionsand Warnings

Thisdocument containscautionstatements.The informationina cautionstatementisprovidedforyour protection.Be suretoreadeach cautioncarefully. CAUTION Thisisan example of a cautionstatement.A cautionstatementdescribesa situationthatcouldpotentiallydamage yoursoftwareorequipment.

4 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com Overview

2 Overview

2.1 Introduction

The ADS1299EEG-FE isintendedforevaluatingtheADS1299 low-power,lownoise24-bit,simultaneously sampling,eight-channelfront-endforEEG applications.The digitalSPI™ controlinterfaceisprovidedby theMMB0 ModularEVM motherboard(Rev.D orhigher)thatconnectstotheADS1299EEG FE evaluationboard(Rev A).The ADS1299EEG-FE (seeFigure1)isNOT a referencedesignforEEG applications;rather,itspurposeistoexpediteevaluationand systemdevelopment.The outputofthe ADS1299 yieldsa raw,unfilteredEEG signal. The MMB0 motherboardallowstheADS1299EEG-FE tobe connectedtothecomputerviaan available USB port.Thismanual shows how touse theMMB0 as partoftheADS1299EEG-FE, butdoes not providetechnicaldetailsabouttheMMB0 itself. Throughoutthisdocument,theabbreviationEVM and thetermevaluationmodule aresynonymous with theADS1299EEG-FE.

2.2 Supported Features

Hardware Features:

Configurableforbipolarorunipolarsupplyoperation
Configurableforinternaland externalclockand referenceviajumpersettings
Configurablefordc-coupledinputs
Externalbiaselectrodedrive
Optiontoprovidea common referencetoallchannelsnegativeterminals.
Optiontoselectany electrodeas referenceelectrode
Optiontochoose any electrodeas biaselectrode
Externalshielddriveamplifier SoftwareFeatures:
Analysistoolsincludinga virtualoscilloscope,histogram,FFT.
Data exportforpost-processingofraw EEG data

2.3 FeaturesNot Supported inCurrentVersion

NOTE: The followingfeaturesareNOT SUPPORTED by thecurrentversionoftheevaluationkit.

Real-timedataprocessing
AC lead-offdetectionfilters

2.4 ADS1299EEG-FE Hardware

Figure1 shows thehardwareincludedintheADS1299EEG-FE kit.Contactthefactoryifany component is missing.Also,itishighlyrecommended thatyou checktheTIwebsiteathttp://www.ti.comtoverifythat you have thelatestsoftware. 5SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

Overview www.ti.com Figure1.ADS1299EEG-FE Kit The completekitincludesthefollowingitems:

ADS1299EEG FE printedcircuitboard(PCB),Rev A
MMB0 (ModularEVM motherboard,Rev D orhigher)
Universalac todc walladapter,120V to240V ac to+6V dc

2.5 FactoryDefaultJumper Settings

Table1.FactoryDefaultJumper Settings Jumper Name Settings Comment JP1 Not Installed Used forprogrammablebiasdrive. JP2 2-3 Unipolaranalogsupply(AVDD = 5V) JP3 Not Installed Relatedtoexternalreferencegenerationcircuitry JP4 1-2 5V supplytoboard JP5 Not Installed OptiontoprovidehardwarePWDN signal. JP6 1-2 BIAS_ELEC toonboardmidsupply JP7 1-2 Route REF_ELEC tobufferinput(bufferoutputisnotused by default) JP8 1-2 Route REF_ELEC directlytoSRB1 JP17 Not Installed Relatedtoshielddrivecircuitry JP18 2-3 ClockfromOscillatoron theEVM JP19 1-2 Power forOscillatoron theEVM JP20 1-2 Unipolarsupply(AVSS = 0V) JP21 1-2 JP22 2-3 JP23 1-2 CLKSEL = 0 JP24 2-3 Digitalsupply(DVDD =3.3)

6 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com SoftwareInstallation Table1.FactoryDefaultJumper Settings(continued) Jumper Name Settings Comment JP25 1-2/3-4/5-6 – BIAS_ELEC connectedtoallINPs – BIAS_ELEC connectedtoallINMs – BIAS_ELEC shortedtoREF_ELEC whichconnectstoSRB1 J6 5-6/7-8/9-10/… 32-34/35-36 connectjumperson allchannels

3 SoftwareInstallation

3.1 Minimum Requirements

Beforeinstallingthesoftwarethatisintendedforuse withtheEVM kit,verifythatyourPC meets the minimum requirementsoutlinedinthissection.

3.1.1 Required Setup forADS1299EEG-FE Software

Installthesoftwareon a PC-compatiblecomputerthatmeets thesespecifications:

PentiumIII® /Celeron® processor,866MHz orequivalent
Minimum 256MB ofRAM (512MB orgreaterrecommended)
USB 1.1-compatibleinput
Hard diskdrivewithatleast200MB freespace
Microsoft® Windows ® XP operatingsystemwithSP2 (Windows Vistaand Windows 7 areNOT supportedatthistime)
Mouse orotherpointingdevice
1280 x 960 minimum displayresolution

3.2 InstallingtheSoftware

Do not connectthe ADS1299EEG-FE hardware beforeinstallingthe software on a suitablePC. Failuretoobservethiscautionmay cause MicrosoftWindows tonotrecognizetheADS1299EEG-FE. The latestsoftwareisavailablefromtheTIweb siteatwww.ti.com\\ads1299.Check theADS1299 Product Folderon theTIweb siteregularlyforupdatedversions. To installtheADS1299 software,clickon theexecutableshown inFigure2.Then followtheprompts illustratedinFigure3 throughFigure7. Figure2.ExecutabletoRun ADS1299 SoftwareInstallation 7SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

SoftwareInstallation www.ti.com Figure3.InitializationofADS1299EEG-FE You must acceptthelicenseagreement(shown inFigure4)beforeyou can proceedwiththeinstallation. Figure4.LicenseAgreement

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www.ti.com SoftwareInstallation Figure5.InstallationProcess Figure6.USBStyx DriverPreinstallation 9SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

SoftwareInstallation www.ti.com Figure7.Completion ofADS1299 SoftwareInstallation

3.3 InstalltheADS1299 EVM Hardware Drivers

Applypower totheMMB0 usingthesuppliedwallmount power supplyand connecttheMMB0 toyourPC viaany availableUSB port.Therearetwo USB driverswhichwillbe installed.Followthestepsshown in thefiguresbelowtoinstalltheUSB drivers. Figure8.New Hardware Wizard

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www.ti.com SoftwareInstallation Figure9.New Hardware Wizard Screen 3 ClickNextand allowthewizardtofindand installthedriver. Figure10.Completion oftheInitialUSB Drive 11SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

SoftwareInstallation www.ti.com

3.3.1 InitialLaunch oftheADS1299EEG FE Software

Launch ADS1299EEG FE softwarefromtheprogrammenu. The softwarewillloadand begindownloading firmwaretotheprocessoron datacapturecard(MMB0). Once thefirmwareisloadedand running,itwill cause theUSB tore-enumerate. Figure11.Second 'New Hardware" Wizard ClickNext Figure12.InstalltheUSBStyx Driver

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www.ti.com ADS1299EEG-FE DaughterCard Hardware Introduction By thistimetheADS1299EEG FE softwarewillhave promptedtheuseran witherrormessage. Click‘OK ’. Itmay be necessarytoclosetheprogram,power cycletheADS1299EEG FE and restarttheprogram. Thisprocessmay need tobe done againshouldyou plugtheADS1299ECG FE intoa differentUSB port on yourcomputer.

4 ADS1299EEG-FE Daughter Card Hardware Introduction

Many ofthecomponents on theADS1299EEG-FE are susceptibletodamage by electrostaticdischarge(ESD). Customers are advisedto observe proper ESD handlingprocedureswhen unpackingand handlingtheEVM, includingthe use of a grounded wriststrap,bootstraps,or mats at an approved ESD workstation.An electrostaticsmock and safetyglassesshouldalsobe worn. The ADS1299 ECG front-endevaluationboardisconfiguredtobe used withtheTIMMB0 dataconverter evaluationplatform.The key featuresoftheADS1299 systemon a chip(SOC) are:

EightintegratedINAs and eight24-bithigh-resolutionADCs
Low channelnoiseof1uVpp for65Hz bandwidth
Low power consumption(5mW/channel)
Data ratesof250SPS to16kSPS
5V unipolarorbipolaranalogsupply,1.8Vto3.6Vdigitalsupply.
DC /AC Lead offdetection
On-chiposcillator
On-chipbiasamplifier
VersatileMUX toenableprogrammablereferenceand biaselectrode
SPI datainterface The ADS1299EEG-FE can be used toevaluatetheperformanceofADS1299 chip.Userscan provideany typeofsignaldirectlytotheADS1299 througha varietyofhardwarejumpersettings(J6,JP25).External supportcircuitsareprovidedfortestingpurposessuch as externalreferences,clocks,lead-offresistors, and shielddriveamplifiers. Figure13 shows thefunctionalblockdiagramwithimportantjumpernames fortheEVM. 13SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

ADS1299EEG-FE DaughterCard Hardware Introduction www.ti.com Figure13.ADS1299 EEG-FE FrontEnd Block Diagram The ADS1299EEG-FE boardisa four-layercircuitboard.The boardlayoutisprovidedinSection9;the schematicsareappended tothisdocument.The followingsectionsexplainsome ofthehardwaresettings possiblewiththeEVM forevaluatingtheADS1299 undervarioustestconditions.

4.1 Power Supply

The EEG front-endEVM mounts on theMMB0 EVM withconnectorsJ2,J3 and J4.The main power supplies(+5V,+3V and +1.8V)forthefront-endboardaresuppliedby thehostboard(MMB0) through connectorJ4.Allotherpower suppliesneeded forthefront-endboardaregeneratedon boardby power management devices.The EVM isshippedin+5V unipolarsupplyconfiguration. The ADS1299 can operatefrom+5.0V analogsupply(AVDD/AVSS) and +1.8V to+3.0V digitalsupply (DVDD). A bipolaranalogsupply(±2.5V)can be used as well.The analogpower consumptionofthefront- end boardcan be measured by thecurrentflowingthroughtheJP2 jumperand JP20 jumper.The ADS1299 can be powered down by shortingjumperJP5. TestpointsTP5, TP6, TP7, TP8, TP9, TP10, and TP14 areprovidedtoverifythatthehostpower supplies arecorrect.The correspondingvoltagesareshown inTable2.

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www.ti.com ADS1299EEG-FE DaughterCard Hardware Introduction Table2.Power Supply TestPoints TestPoint Voltage TP7 +5.0V TP9 +1.8V TP10 +3.3V TP5 +5.0V TP13 +2.5V TP6 –2.5V TP8 GND The front-endboardmust be properlyconfiguredinordertoachievethevariouspower-supplyschemes. The defaultpower-supplysettingfortheADS1299EEG-FE isa unipolaranalogsupplyof5V and DVDD of either+3V or+1.8V.Table3 shows theboardand component configurationsforeach analogpower- supplyscheme; Table4 shows theboardconfigurationsforthedigitalsupply. Table3.Analog Supply Configurations UnipolarAnalog Supply BipolarAnalog Supply Power Supplies 5V ±2.5V JP2 (AVDD) 2-3(default) 1-2 JP20 (AVSS) 1-2(default) 2-3 U8 Don ’tCare TPS72325 U9 Don ’tCare TPS73225 Table4.DigitalSupply Configurations DVDD +3.0V +1.8V JP24 2-3(default) 1-2

4.2 Clock

The ADS1299 has an on-chiposcillatorcircuitthatgeneratesa 2.048MHz clock(nominal).Thisclockcan varyby ±5% overtemperature.Forapplicationsthatrequirehigheraccuracy,theADS1299 can also acceptan externalclocksignal.The ADS1299EEG-FE providesan optiontotestbothinternaland externalclockconfigurations.Italsoprovidesan optiontogeneratetheexternalclockfromeitherthe onboardoscillatororfroman externalclocksource. The onboardoscillatorispowered by theDVDD supplyoftheADS1299. Care must be takentoensure thattheexternaloscillatorcan operateeitherwith+1.8V or+3.0V,dependingon theDVDD supply configuration.Table5 shows thejumpersettingsforthethreeoptionsfortheADS1299 clocks. Table5.Clock Jumper Options ADS1299 Clock InternalClock from theADS1299 Clock from Oscillatoron theEVM ExternalClock Source JP18 Not Installed 2-3(default) 1-2 JP19 Don ’tCare 1-2 Don ’tCare J3– pin17 Don ’tCare Don ’tCare ExternalClockSource 15SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

ADS1299EEG-FE DaughterCard Hardware Introduction www.ti.com A 2.048MHz oscillatoravailablefor+3V and +1.8V DVDD istheFXO-HC735-2.048MHz and SiT8002AC- 34-18E-2.048,respectively.The EVM isshippedwiththeexternaloscillatorenabled.

4.3 Reference

The ADS1299 has an on-chipinternalreferencecircuitthatprovidesreferencevoltagestothedevice. Alternatively,theinternalreferencecan be powered down and VREFP can be appliedexternally.This configurationisachievedwiththeexternalreferencegenerator(U3)and driverbuffer.The EVM has the footprintsforthenecessarycircuitry,butthecomponents arenotinstalledatthefactory. The externalreferencevoltagecan be setto4.096V.Measure TP3 tomake suretheexternalreferenceis correct.The settingfortheexternalreferenceisdescribedinTable6. Table6.ExternalReferenceJumper Options InternalReference ExternalReference ADS1299 Reference VREF = 4.5V VREFP = 4.096V JP3 Not Installed Installed The softwareuses theVREF valueenteredintheGlobalRegisterscontroltab(refertoSection5.2)to calculatetheinput-referredvoltagevalueforallthetests.The defaultvalueis4.5V.Ifany othervalueis used,theusermust updatethisfieldintheGlobalRegisterscontroltab.

4.4 Accessing ADS1299 Analog Signals

Some ADS1299 outputsignalsareprovidedas testpointsforprobingpurposesthroughJ5.Table7 lists thevarioustestsignalswiththecorrespondingtestpoints. Table7.TestSignals Signal J5 Pin Number Signal RESERVE 1 2 RESERVE RESERVE 3 4 RESERVE GPIO4 5 6 PWDNB GPIO3 7 8 Daisy_in AGND 9 10 RESERVE

4.5 Accessing ADS1299 DigitalSignals

The ADS1299 digitalsignals(includingSPI interfacesignals,some GPIO signals,and some ofthecontrol signals)areavailableatconnectorJ3.These signalsareused tointerfacetotheMMB0 boardDSP. The pinoutforthisconnectorisgiveninTable8. Table8.SerialInterfacePin Out Signal J3 Pin Number Signal START/CS 1 2 CLKSEL CLK 3 4 GND NC 5 6 GPIO1 CS 7 8 RESETB NC 9 10 GND DIN 11 12 GPIO2 DOUT 13 14 NC/START DRDYB 15 16 SCL EXT_CLK 17 18 GND NC 19 20 SDA

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www.ti.com ADS1299EEG-FE DaughterCard Hardware Introduction

4.6 Analog Inputs

The ADS1299EEG-FE isdesignedso thatitcan be used as a eightchanneldataacquisitionboard. Arbitraryinputsignalscan be fedtotheADS1299 by feedingthesignaldirectlyatconnectorJ6.Figure14 shows theinputconfigurationsthatareavailableintheEVM. Figure14.InputConfigurationsSupported by theEEG-FE a)DifferentialInputsb)Singleended inputs

4.6.1 DifferentialInputs

To digitizeeightdifferentialinputs, 1. Setalljumperstofactorydefaultsas describedinSection2.5. 2. Remove jumpersfrompin7-36ofJ6. 3. Providethedifferentialinputson theeven pins8-36ofJ6. Whileused withdifferentialinputs,careneeds tobe takentoensurethattheanaloginputsarewithinthe inputcommon mode rangeofthePGA. Iftheinputdifferentialsignaliscenteredaround0V,theADS1299 needs tobe operatedwitha bipolarsupply.RefertoSection4.1fordetailson settingtheEVM tooperate witha bipolarsupply.

4.6.2 SingleEnded Inputs

Forsingleended inputsthemeasurement can be done withrespecttothevoltageappliedtotheSRB1 pin oftheADS1299. To digitizeeightsingleended inputs, 1. Setalljumperstofactorydefaultsas describedin 2. Remove jumpersfrompin7-36ofJ6. 3. Shortpin5 and 6 ofJP6.SettheSRB1 bitintheMISC1 registertoroutetheSRB1 pintothenegative inputofthechannels(refertoSection8.3fordetails).ThiswillrouteBIAS_ELEC (midsupply)tothe negativeinputsofthechannelsthroughtheSRB1 pin. 4. ProvidetheSingleended inputstopins36,32,28,24,20,16,12,8 ofJ6 forchannels1-8 respectively. 17SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

UsingtheSoftware:ADS1299 ControlRegistersand GUI www.ti.com Apartfromprovidingtheoptiontofeedinputsdirectlyatthejumper(forgeneralpurposedataacquisition), theADS1299 EVM providesmultipleconfigurationsspecifictotheEEG application.These configurations areexplainedindetailinSection7.

5 Using theSoftware:ADS1299 ControlRegistersand GUI

Beforestartingtouse theEVM software,thereisone importantfeaturethatusersshouldbe aware of.The softwareGUI containsa Save tabthatallowsalldatafromany combinationofchannelstobe saved ina givendirectorylocationwithnotestodescribethesaved data.Figure15 shows theSave taboptions. Figure15.FileSave Option Under 'Save'Tab

5.1 Overview and Features

Thissectionprovidesa quickoverviewofthevariousfeaturesand functionsoftheADS1299EEG-FE softwarepackage. TherearefourprimarytabsacrosstheleftsideoftheGUI:

Abouttab:ProvidesinformationabouttheEVM and softwareversionrevisions.
ADC Registertab:IncludesallofthecontrolregistersfortheADS1299, ina seriesofrelatedsub-tabs: – ChannelRegisterstab – LOFF and BIAS tab

18 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com UsingtheSoftware:ADS1299 ControlRegistersand GUI – GPIO and OtherRegisterstab – RegisterMap tab

Analysistab:Providesdifferentways toanalyzecaptureddatainthetimeorfrequencydomain,witha seriesofrelatedsub-tabs: – Scope tab – FFT tab – Histogramtab
Save tab:Providesoptionsforsavingdata

5.2 GlobalChannel Registers

The firstsectionundertheChannelRegisters→GlobalChannelRegisterstaballowstheuserto manipulatetheentireADS1299 configurationand lead-offregisters.The GlobalChannelRegistersbox includesConfigurationRegister1 (controlsdaisy-chain/MRBmode, clockconnection,and datarate); ConfigurationRegister2 (controlsinternaltestsourceamplitudeand frequency);ConfigurationRegister3 (controlsthereferencebufferpower-up/-downprocesses,thereferencevoltage,thebiasdrive enable/disable,and thebiasreference);and theLead-OffControlRegister(controlsthecomparator thresholdand themagnitudeand frequencyofthelead-offsignal).shows theGUI paneltomanipulate theseregistersand therespectivesettingsforeach. Figure16.Channel RegistersGUI forGlobalRegisters

5.3 Channel ControlRegisters

The second sectionundertheChannelRegisterstabistheChannelControlRegistersbox.Thispanel allowstheusertouniquelyconfigurethefront-endMUX foreach channel.Additionally,atthetopofthe ChannelControlRegistersbox istheoptiontogloballysetallchannelstothesame setting.The channel- specificMUX isillustratedinFigure17.The panelsnapshotforthechannelcontrolregistersisshown in Figure18.Figure19 shows theregisterbittocontroltheswitcheswhichconnectallchannelsnegative inputtoSRB1 pin.Thisbitislocatedin“GPIO and otherregisters”tab. 19SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

UsingtheSoftware:ADS1299 ControlRegistersand GUI www.ti.com Figure17.InputMultiplexerfora SingleChannel (MAIN = [000or 110 or 111]) Figure18.Channel ControlRegistersGUI Panel

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www.ti.com UsingtheSoftware:ADS1299 ControlRegistersand GUI Figure19.RegisterBitforSRB1 Routing

5.3.1 InternalTestSignalsInput

ConfigurationRegister2 controlsthesignalamplitudeand frequencyofan internally-generatedsquare wave testsignals.The primarypurposeofthistestsignalistoverifythefunctionalityofthefront-endMUX, thePGA, and theADC. The testsignalsmay be viewedon theAnalysis→Scope tab,as Figure20 shows. DetailedinstructionsforusingtheAnalysis→Scope tabisprovidedinSection6.1.1. Figure20.InternalTestSignals

5.3.2 Temperature Sensor and theScope Tab

The internaltemperaturesensoron theADS1299 isshown in.When theinternalMUX isroutedtothe temperaturesensorinput,theoutputvoltageoftheADC may be convertedtoa temperaturevalue,using Equation1. (1) 21SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

UsingtheSoftware:ADS1299 ControlRegistersand GUI www.ti.com Figure21.SimplifiedDiode Arrangement The outputvoltagecorrespondingtoa giventemperaturecan be readselectingtheTemperatureSensor optionon theChannelControlRegistersGUI (seeFigure17)and verifiedusingtheAnalysis→Scope tab as shown inFigure22.The number 0.146V(onthey-axis)can be calculatedas a temperatureusing Equation1: Temperature= (0.146– 0.145300)/0.00049+ 25 = 26.4°C Itshouldbe notedthatthetemperaturesensorinputcannotbe used witha gainsettingof24 as itwill saturatethePGA output. Figure22.EightChannel Read ofInternalTemperature Data

22 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com UsingtheSoftware:ADS1299 ControlRegistersand GUI

5.3.3 Normal ElectrodeInput

The Normal electrodeinputon theMUX routestheinputs(VINP and VINN) differentiallytotheinternal PGA, as Figure17 illustrates.An exceptionisiftheSRB1 bitissethigh.IfchannelisinNormal electrode mode and SRB1 bitissethighthesignalon SRB1 pinisroutedtonegativeinputsofallchannelsinstead ofVINN inputs.

5.3.4 MV DD Inputand theScope Tab

The MV DD inputoptionallowsthemeasurement ofthesupplyvoltageVS = (AVDD + AV SS )/2forchannels1, 2,5,6,7,and 8;however,thesupplyvoltageforchannel3 and 4 willbe DV DD /4.As an example,in bipolarsupplymode, AV DD = 3.0Vand AV SS = –2.5V.Therefore,withthePGA gain= 1,theoutputvoltage measured by theADC willbe approximately0.25V.

5.3.5 Bias Measurement

Thismeasurement takesthevoltageattheBIASIN pinand measures iton thePGA withrespectto (AVDD + AVSS)/2 orBIASREF. Thisoptioncan be used togivea calibration/testsignaltoADS1299 devicewithoutconnectingthecalibration/testsignaltotheelectrodes.The positivesignalcan be applied toBIASIN pinand thenegativeinputcan be appliedtotheBIASREF pin.More detailson thiscan be foundinSection7.3.

5.3.6 Bias PositiveElectrodeDriveand Bias NegativeElectrode

Thisoptioncan be used tohave a selectablebiaselectrode.Thisoptionroutesthesignalon BIASIN pin toany ofpositiveornegativepinsofthechannelinputs.

5.4 GPIO and Other Registers

The GPIO and OtherRegisterstab,locatedundertheAnalysistab,includescontrolsforGPIO1 through GPIO4, SRB1 control,pulsemode controland leadoffcomparatorspower down. The GPIO registers controlfourgeneral-purposeI/Opins.Figure23 illustratestheGPIO ControlRegisterGUI panel. Figure23.GPIO ControlRegisterGUI Panel

5.5 Lead-Offand BIAS Registers

The Lead-OffDetectionand CurrentControlRegistersand theBiasDerivationControlRegistersare locatedundertheADC Register→LOFF and BIAS tab. 23SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

UsingtheSoftware:ADS1299 ControlRegistersand GUI www.ti.com

5.5.1 Lead-OffSense (LOFF_SENSP and LOFF_SENSN) Registers

These registersenablelead-offdetectionforboththepositiveand negativechannels.Figure24 describes the4-bitDAC settingstoconfigurethelead-offthreshold.Note thattheLOFF_FLIPx bitschange the directionofthelead-offcurrentifthisoptionisselected.Figure24 illustratestheconnectionsfromthe positiveand negativeinputstothelead-offcomparators.Figure25 shows therespectiveGUI panelon the EVM software. Figure24.LOFF_STATP and LOFF_STATN Comparators Figure25.LOFF_SENSP and LOFF_SENSN RegistersGUI Panel

24 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com UsingtheSoftware:ADS1299 ControlRegistersand GUI

5.5.2 Lead-OffStatusRegisters(LOFF_STATP and LOFF STATN)

These registersstoretheoutputofthelead-offcomparatorthatcorrespondswitheach input.When a lead isdisconnected,thecorrespondingregisterbitactivateslow.The GUI forthisfeatureisenabledby clickingintheupperright-handcorneroftheEVM softwareon theShow/PollLead-OffStatusbutton. Pressingthisbuttoncausesa pop-upbox thatshows thestatusofthelead-offregisters.The GUI shows when a leadisdisconnectedby turningitsbitfromgreentored.Figure26 illustratestheLead-OffStatus RegistersGUI controls. Figure26.Lead-OffStatusIndicator

5.5.3 Bias DriveDerivationControlRegisters

The BiasDriveDerivationControlRegistersenabletheusertosetany combinationofpositiveand/or negativeelectrodestoderivetheBIAS voltagethatisfedtotheinternalbiasdriveamplifier.Figure27 shows thecorrespondingGUI controls.The detailsaboutbiasdrivecan be foundinSection5.5. 25SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

UsingtheSoftware:ADS1299 ControlRegistersand GUI www.ti.com Figure27.BIAS_SENSP and BIAS_SENSN GUI Panel

5.6 RegisterMap

The RegisterMap → DeviceRegisterstabisa helpfuldebug featurethatallowstheusertoviewthestate ofalltheinternalregisters.ThistabisillustratedinFigure28. Figure28.Device RegisterSettings

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www.ti.com ADS1299EEG-FE AnalysisTools

6 ADS1299EEG-FE AnalysisTools

Under theAnalysistabintheADS1299EEG-FE GUI software,therearefourdifferentanalysistools shown thatenablea detailedexaminationofthesignalsselectedby thefront-endMUX:

Scope
Analysis
Histogram
FFT These toolsaredetailedinthefollowingsubsections.

6.1 Scope Tab

6.1.1 Using theAnalysis→Scope Tool

The Scope tool(availableundertheAnalysistab)isa veryusefulmeans ofexaminingtheexactamplitude ofthemeasured inputsignalsfromeach channel.Additionally,userscan determinethenoisecontribution fromeach channelata givenresolution,and reviewthesamplingrate,thePGA gain,and theinputsignal amplitude.Figure29 illustratestheScope toolfeatures. Figure29.Scope Tool Features

6.1.2 Waveform ExaminationTool

The waveform examinationtoolallowstheusertozoom ineitheron allchannelssimultaneouslyoron a singlechannel.Figure30 shows an example ofthewaveform examinationtoolwiththemagnifyingglass zoomed inon 90 samples. 27SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

ADS1299EEG-FE AnalysisTools www.ti.com Figure30.Zoom Option on theWaveform ExaminationTool

6.2 Histogram Tool

The HistogramtoolislocatedundertheAnalysis→Histogramtab.

6.2.1 Using theAnalysis→Histogram Tool

The Analysis→Histogramtoolisused primarilytoviewthebinseparationofthedifferentamplitudesofthe EEG waveform harmonics.Figure31 illustratesthehistogramoutputforinputshorton allchannels.The same SignalZoom analysismay be used on thehistogramplotsfora more detailedexaminationofthe amplitudebins.The Analysistablegivesthemean oftheinputsignaland alsotherms and peak-to-peak valueofthesignalon each channel.

28 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com ADS1299EEG-FE AnalysisTools Figure31.Histogram Bins forInputShortNoise

6.3 FFT Tool

The FFT toolislocatedundertheAnalysis→FFT tab.

6.3.1 Using theAnalysis→FFT Tool

The Analysis→FFT toolallowstheusertoexamine thechannel-specificspectrumas wellas typical figuresofmeritsuch as SNR, THD, ENOB, and CMRR. Each featureisnumbered belowand describedin detailinthefollowingsubsections.Figure32 illustratesan Analysis→FFT plotforinputshortconfiguration. The explanationofdifferenttabsisexplainedbelow. 29SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

ADS1299EEG-FE AnalysisTools www.ti.com Figure32.Analysis:FFT Graph ofInputShortTest Coherent Frequency Calculator:1 Coherentsamplinginan FFT isdefinedas FAIN/FSAMPLE = N WINDOW /NTOTAL ,where:

FAIN istheinputfrequency
FSAMPLE isthesamplingfrequencyoftheADS1299
N WINDOW isthenumber ofodd integercyclesduringa givensamplingperiod
N TOTAL isthenumber ofdatapoints(inpowers of2)thatisused tocreatetheFFT Iftheconditionsfor coherentsamplingcan be met,theFFT resultsfora periodicsignalwillbe optimized.The IdealAIN Frequencyisa valuethatiscalculatedbased on thesamplingrate,such thatthecoherentsampling criteriacan be met. AC AnalysisParameters:2 Thissectionofthetoolallowstheusertodictatethenumber ofharmonics,dc leakagebins,harmonic leakagebins,and fundamentalleakagebinsthatareused inthecreationofvarioushistograms.Pressing theWindowing button,illustratedinFigure33,allowstheusertoevaluatetheFFT graphundera variety ofdifferentwindows.Note thatpressingtheReferencebuttontogglesbetween dBFS (decibels,full-scale) and dBc (decibelstocarrier).

30 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com ADS1299EEG-FE AnalysisTools Figure33.Analysis:FFT :AC AnalysisParameters :Windowing Options FFT Analysis:3 PressingtheFFT Analysisbuttonpullsup thewindow shown inFigure34.Thiswindow can be useful because thedifferenttabulatedfiguresofmeritcan show more detailedinformationaboutthechannel-to- channelnoise. Figure34.Analysis:FFT :FFT Analysis:InputShortCondition User-DefinedDynamic Range: 4 Thissectionenablestheusertoexamine theSNR ofa specificchannelwithina givenfrequencyband definedby Low Frequencyand HighFrequency.The SNR displayedinthiswindow willalsoshow under theDynamic Range headingas Figure35 illustrates. 31SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EEG SpecificFeatures www.ti.com Figure35.Changing theUser-DefinedDynamic Range forChannel 1 InputAmplitude:5 Thisfieldisa userinputthatisimportantforaccuratelycalculatingtheCMRR ofeach channel.

7 EEG SpecificFeatures

Thissectiondescribessome oftheEEG specificfeaturessupportedby theEVM, includingthe reference/patientbiassignals,leadoffdetectionand calibration.

7.1 ReferenceSignaland PatientBias Signal

A typicalEEG systemhas multipleelectrodes(32up to256,herebycalledas the“normalelectrodes”) connectedtothescalpthatareused toacquireEEG signals.Inadditiontotheseelectrodesignals,an EEG systemalsouses two additionalsignals,a referencesignaland a patientbiassignal.The reference signalisused as thereferenceforthesingleended EEG measurements.The patientbiassignalisused forbiasingthepatienttosetthecommon mode oftheEEG signals(typicallymid supply). Dedicatedreferenceand patientbiaselectrodes Many EEG systemshave two dedicatedelectrodes,one used as thereferencesignalfortheEEG measurement (herebycalledas the“referenceelectrode”)and theotherused forthepatientbiassignal (herebycalledas the“biaselectrode”).The EVM has two signals(BIAS_ELEC, REF_ELEC) availableat theconnectorJP81 thatcorrespondtothesetwo electrodes.The BIAS_DRV signalissimilartothe BIAS_ELEC, butappearsas a separatesignalatJP80.InfutureversionsoftheEVM, BIAS_DRV willbe multiplexedthrougha jumpertoBIAS_ELEC. Programmable referenceand patientbiaselectrodes CertainEEG systemsprovidetheflexibilitytobe abletoroutethereferenceand/orthepatientbiassignals throughany ofthenormalelectrodes. The internalmultiplexeroftheADS1299 providesample flexibilityfor (a)Choosingthevoltageappliedtotheseelectrodes(Fixedorclosedloop), (b)Beingabletoroutethereferenceand patientbiassignalstoeitherthededicatedelectrodeorany other normalelectrode.

7.1.1 Using theDedicatedReferenceand PatientBias Electrodes

Thisisthesimplestoptionforelectrodeconnectionand isillustratedin.One dedicatedelectrodeis chosen as a biaselectrodeand a potentialisappliedtoittobiasthepatientataboutmid-supplyvoltage. Similarlya fixedelectrodeischosen as thereferenceelectrodeand alltheotherelectrodesaremeasured withrespecttothiselectrode.Below we discussdifferentoptionsavailableon theEVM boardtoconnect thebiaselectrodeBIAS_ELEC/BIAS_DRV and referenceelectrodeREF_ELEC.

32 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com EEG SpecificFeatures Figure36.DedicatedReferenceand Bias Electrode Reference:The referenceelectrode(REF_ELEC) inputisused todrivethenegativeinputsofthe channelthroughSRB1 pinon ADS1299 device.The referenceelectrodeisconnectedtothenegative inputsofallthechannels.Thisleadstoincreasedleakagecurrenton thereferenceelectrodesincecurrent ofallthechannelsgetsadded.The EVM providesan optiontobufferthereferenceelectrodetoreduce theleakage.The disadvantageofthebufferedapproachistheadditionalnoiseofthebufferamplifier.The tablebelowshows thejumpersettingsforthetwo options. Table9.DedicatedReferenceDriveOptions through REF_ELEC JP7 JP8 Un Buffered Don ’tcare 1-2 Buffered 1-2 2-3 Bias :Thereisan optiontoprovidethebiastoa fixedelectrodeeitherthroughBIAS_ELEC orthrough BIAS_DRV. BIAS_ELEC optionneeds an externalamplifierU11 tobufferthemid supply.Forthe BIAS_DRV optionthebufferisbuiltinsidetheADS1299 chip.The BIAS_DRV optionalsohelpsin improvingcommon mode rejectionby implementinga feedbackloop.The detailson selectingtheinputs 33SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EEG SpecificFeatures www.ti.com

7.1.2 Programmable Referenceand Bias Electrodes

The multiplexerinADS1299 allowsany electrodetobe chosen as thebiaselectrodeorreference electrode.ThisisillustratedinFigure37. Figure37.Programmable referenceand biaselectrode The referenceelectrodeselectionisdone usingSRB2 pin.The SRB2 bitinCHxSET registerissethigh fortheelectrodechosen as reference.Thisreferenceisroutedouton SRB2 pinand can be routedto SRB1 pinas a referenceforallotherchannels.On theEVM, a jumperbetween pin2 and pin3 ofJP7 and JP8 isneeded forthisconfiguration.InFigure37,thechannel1 electrodeisselectedas a reference electrodeand isroutedouttoSRB2 pin. The biasselectionisdone usingBIASIN pin.The voltageinthispincan be routedtopositiveinputofany channelby writingMUX = 110 on theCHxSET register.On theEVM a jumperbetween pin2 and pin3 of JP6 isrequired,toroutethemid supplytoBIASIN.IntheillustrationinFigure37 channel7 isused as a biaselectrode.

7.1.3 BiasingthePatientwitha Feedback Loop

Therearetwo optionson theEVM boardtobiasthepatient.Firstoptionistouse onboardBIAS_ELEC signaltodrivethepatientas explainedintheearliersection.Second option,whichisdescribedbelow,is todrivethebody withBIAS_DRV signalgeneratedby ADS1299 chip.The advantageofusingBIAS_DRV signalisthatittakesadvantageoffeedbacklooptogetbettercommon mode rejection.The bandwidthof theBIAS loopisdeterminedby R8 (390kΩ)and C20 (10nF).Userscan change thesevaluestosetthe bandwidthbased on thespecificapplication.The stabilityoftheloopisdeterminedby theuser’s specific system.Therefore,optimizationmay be needed on thefeedbackcomponent valuestoensurestabilityif additionalfilteringcomponents and longcablesareadded beforetheADS1299EEG-FE. The ADS1299 offersfullflexibilityby lettingtheuserselectany combinationoftheelectrodestogenerate thebiasvoltage.RefertotheADS1299 datasheet(SBAS499 )formore details.

34 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

Mux[2:0] = 001 0.75 x VDD Mux[2:0] = 011 Mux[2:0] = 100 0.25 x VDD Mux[2:0] = 101 TESTM Mux[2:0] = 101 Mux[2:0] = 110 Mux[2:0] = 111 Mux[2:0] = 001 To PGAN Mux[2:0] =010 AND BIAS_MEAS From LOFFM Mux[2:0] = 011 Mux[2:0] = 100 TEMPP INT_TEST (VREFP+VREFN) Mux[2:0] = 010 AND BIAS_MEAS SRB1SRB2 To Next Chans INT_TEST CHxSET[3] = 1 MAIN AND SRB1 To Next Chans MAIN AND SRB1 MAIN BIASREF_INT=0 BIASREF (AVDD+AVSS) BIASREF_INT=1 AC TEST NOTE: MAIN = Mux[2:0] =000 OR Mux[2:0] = 111 OR Mux[2:0] = 110 www.ti.com EEG SpecificFeatures The referencevoltagefortheon-chiprightlegdrivecan be drivenexternally.The on-chipvoltageissetto mid-supply.Iftheapplicationrequiresthecommon mode tobe settoany othervoltage,thisconfiguration can be accomplishedby settingtheappropriatebitintheConfiguration3 Register.The externalBIASREF voltageissetby resistorR1 and adjustableresistorR2. The followingprocedureneeds tobe appliedtoactivatetheBiasdrivecircuitry: Step1. SettheinputstoNormal Electrode,referFigure38 Figure38.SettingsforNormal Electrode Step2. Turnon thebiasdrivebufferand settheinternalbiasdrivereference;refertoFigure39. Figure39.ConfiguringBIASREF and Bias DriveBuffer Step3. Selecttheelectrodestobe chosen forthebiasdriveloop.Inthiscase,thechannel1 and 2 inputsignalsareused (asFigure40 shows). 35SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EEG SpecificFeatures www.ti.com Figure40.Settingup theBias DriveLoop Once thesestepsarecompleted,measure and verifythatthevoltageon eithersideofR8 isclosetomid- supply.Thismeasurement confirmswhethertheBiasdriveloopisfunctional.ApartfromtheBIAS_DRV signal,theADS1299EEG-FE alsooffersan optiontodrivethecableshield.The EEG cableshieldsignal can be connectedtoBIAS_SHD. The jumper(1-2)on JP17 must be shortedtoenabletheshielddrive. The footprintsforthecomponents needed fortheshielddrivecircuitryareavailableon theboard.Butthe components arenotinstalledatthefactory.

7.2 Lead-OffDetection

The ADS1299 providesmultipleschemes toimplementthelead-offdetectionfunction.These schemes includecurrentsourceatdc,at7.8Hz,31.2HzoratfDR/4.Thereisalsoa widerangeon theamplitudeof currentsavailable.RefertotheADS1299 productdatasheet(SBAS499 )foradditionaldetails. Whileattemptingtouse thelead-offdetection,caremust be takentoanalyzetheinputsignal.Iftheinput signalisdc-coupled,thedc lead-offscheme can be used.Iftheinputsignalisac-coupled,theac lead-off scheme must be used.When usingthedc lead-offscheme, be suretobiasthepatienttosettheinput common-mode beforeactivatinglead-offdetection.

7.2.1 DC Lead-Off

Atboardpower-up,thefirmwaresetstheappropriateregistersso thatdc lead-offisselected.Intheevent ofa resetsignal,theregistervaluesdefaulttothedevicedefaultsettings.Insuch a scenario,followthis proceduretoreactivatethelead-offcircuitry. Step1. Make suretheinputisdc-coupledand thatthebiasdrivecircuitisoperational,as explained inSection7.1.3 Step2. Choose thelead-offscheme by settingtherespectivebitsintheLOFF register(intheLOFF controltab).SelecttheDC Lead-OffDetect,6.25nA,CurrentSourcescheme, and setthe comparatorthresholdto95%. Selecttheappropriateinputsforlead-offdetectionby clicking thebitsoftheLOFF_SENSP and LOFF_SENSN Registers.The LOFF tabshouldappearas shown inFigure41.

36 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com EEG SpecificFeatures Figure41.SettingtheLOFF RegisterBits Step3. Turnon thelead-offcomparatorby settingthebitintheConfiguration4 RegisterintheGlobal Registerscontroltab,as Figure42 shows. Figure42.ConfiguringtheLead OffComparator Step4. The softwarehas an optionwhere theLOFF_STATP and LOFF_STATM Registersare continuouslypolled(settheRead StatusRegistersswitchas shown inshown inFigure43). Thisoptionallowstheusertosee thelead-offdetectionscheme work inrealtime.Figure44 shows a case forwhichonlypositiveelectrodesareconnected. Figure43.Lead offStatusRegisters 37SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EEG SpecificFeatures www.ti.com

7.2.2 AC Lead-OffDetection

AC leadoffdetectioncan be used inthreeways 1. To measure electrodeimpedance withinbandexcitationforone timeuse atelectrodeplacement. 2. To simultaneouslymeasure electrodeimpedance withEEG, by usingoutofband excitation. 3. To detectifa leadisoffforan AC coupledinput. These optionsareexplainedbelow. Inband Electrodeimpedance measurement ADS1299 providestwo frequencyoptions(7.8Hzand 31.25Hz)tomeasure theelectrodeimpedance withinthebandwidthofinterestforEEG. Therearefouramplitudeofcurrentsource(ILeadoff)options available6nA,24nA,6µA and 24µA.The electrodeimpedance measurement atthesefrequenciescannot be done simultaneouslywithEEG measurements.The voltagedevelopedatthe-inputsdepends on the impedance on each electrodeand thecurrentused forlead-offdetection.Ifwe denotethesource impedance on INP pinas Zinp and thesourceimpedance on INM pinas Zinm thepeak topeak voltage developedon channelinputis2×(ILeadoff×Zinp + ILeadoff×Zinm). As an example Figure44 shows thesnapshotofthescope with5K impedance on each sourcewith6µA oflead-offcurrentat31.25Hz.We expecta theoreticalpeak topeak voltageof120mV. The observed peak-to-peakvoltageis128mV whichiswithinthetolerancespecificationofcurrentsource.The results can alsobe analyzedinfrequencydomain usingtheFFT analysistabas shown inFigure45.The magnitudeofthefundamentalcomponent willbe directlyproportionaltotheelectrodeimpedance being measured. Figure44.Scope tabforImpedance Measurement at31.25Hz

38 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com EEG SpecificFeatures Figure45.FFT AnalysisforImpedance Measurement at31.25Hz Out ofband Lead offdetection ADS1299 alsoprovidesoptiontodo electrodeimpedance measurement atfrequenciesoutsidetheEEG bandwidthofinterest.The frequencyforthisAC currentsourceissetatfDR /4.Forexample todo an AC lead-offdetectionat1 kHz thedatarateforthedevicemust be setat4Ksps.These measurements can be done concurrentlywiththeEEG measurement.Figure46 shows thefftresultofAC leadoffdetectionat fDR/4withdatarateof4Ksps.The impedance component ispresentat1KHz and must be bandpass filtered.The EEG informationisatlowfrequenciesand thedatamust be lowpass filteredtoextractthe information.Itisrecommended touse onlynA rangecurrentsourcesforconcurrentmeasurement ofEEG and impedance.ForµA rangethenoisefromthecurrentsourcewillbe toolargeand itmay swamp the EEG signal. 39SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EEG SpecificFeatures www.ti.com Figure46.Scope Tab forImpedance Measurement atfDR/4(DR = 4ksps)

7.3 ExternalCalibration/TestSignals

ADS1299 generatesa squarewave testsignalthatcan be used tocheckthefunctionalityofthesignal chain(Refertothedatasheetfordetails).Italsogivestheuseran optiontoprovideexternaltestsignals forcalibration.ForevaluationpurposeswiththeEVM, thetestsignalscan be provideddirectlytothe jumpersofthecorrespondingsignals.SRB1 (pin2ofJP8),SRB2 (pin3ofJP7),BIASIN (Pin3ofJP6), BIASREF (doesnotappearata jumper,needs tobe solderedtoone sideofR5).

7.3.1 Channel InputsDisconnected

Itmay sometimesbe requiredtoprovidea calibrationortestsignaltoADS1299 channelwithoutthesignal beingroutedtothechannelinputpins(orelectrodes).Thiscan be accomplishedby applyingthepositive testsignaltoBIASIN pinand thenegativetestsignaltoBIASREF pin.The channelmultiplexermust be setas 010,BIASREF_INT bitinConfig3 registermust be setto0 tochoose externalBIASREF and BIAS_MEAS bitinConfig3 must be setto1.These multiplexersettingsareillustratedinFigure47.

40 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com EEG SpecificFeatures Figure47.MultiplexerSettingforCalibrationwithElectrodeDisconnected

7.3.2 Channel InputsConnected

Itmay sometimesbe requiredtoprovidea calibrationortestsignaltoADS1299 devicewiththepositive inputconnectedtothepinorelectrode.Thiscan be accomplishedby connectingthepositivetestsignalto SRB2 pinand thenegativetestsignaltoSRB1 pin.The channelinputmultiplexermust be setforNormal Electrode(000),SRB2 switchmust be closedand SRB1 switchmust be closed.Thismultiplexersettingis illustratedinFigure48. 41SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EEG SpecificFeatures www.ti.com Figure48.MultiplexerSettingwithPositiveElectrodeConnected toTestSignal Ifitisdesiredtohave boththeinputpinsconnectedduringcalibrationortest,thefollowingconnections must be made. The positivetestsignalmust be tiedtoSRB2 pinand thenegativetestsignalmust tieto BIASIN pin.The channelmultiplexermust be setfor111 and theSRB2 switchmust be closed.This multiplexersettingisillustratedinFigure49. Figure49.MultiplexerSettingwithBoth ElectrodesConnected toTestSignal

42 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com TestOptionson theEVM

8 TestOptions on theEVM

8.1 On Chip (ADS1299) InputShort

The channelinputcan be shortedinternallyby settingtheinputmultiplexeroftheindividualchannelto 001.The globalregistersmust be setas shown inFigure51.The channelcontrolregistersmust be setas shown inFigure50.Thistestgivesthenoiseinthechannel.Italsogivestheoffsetinthechannel.The resultcan be seen intheanalysistab.Figure52 shows a snapshotofthescope forinternalinputshort withgainsettingof24.The channeloffsetinthisexample is23uV and noiseislessthan1µVpp.5000pts at500sps istakenthereby givingdatafor10 seconds. Figure50.Channel SettingforInputShortTest Figure51.GlobalRegisterSettingsforInputShortTest 43SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

TestOptionson theEVM www.ti.com Figure52.Scope Tab forInputShortTest

8.2 ExternalInputShortwith5K Resistor

Thereisan optionon boardtotiethepositiveand negativeinputofthechanneltoa common voltage (VCM) on BIAS_ELEC through5K resistors.The followingjumpersettingsareneeded forthistest.On JP6 shortpin1 and pin2.On JP25 short(1-2)and (2-3).The connecterJ6 must have jumpersacross fromlefttorighttoconnecttheinputstotheADS1299 channels.The noisefromU11 whichisused to generatetheBIAS_ELEC appearsas common mode noiseforthistestand isrejected.Same istruefor noisefromresistorR10 inBIAS_ELEC path.The onlynoisesourcepresentaretwo 5K resistorsinthe inputpathand thechannelnoise.Thistestisusefultomeasure theeffectofinputbiascurrenton noise. The PGA inADS1299 has CMOS inputand thushas negligiblecurrentnoise.The inputbiascurrentisas a resultofchoppingthePGA toremove flickernoise.Thisbiascurrentdoesn’tmanifestitselfas noiseand appearslikea DC offsetinpresenceof5K inputimpedance.The Channelcontrolregistersmust be programmed as shown inFigure53.The resultsintheanalysistabareshown inFigure54.The average peak-to-peaknoiseforthistestis1.27µV.The increaseinnoiseisdue tothenoisefrom5K resistors.The two 5K resistorscontributeabout0.67µVpp in65Hz bandwidth.

44 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com TestOptionson theEVM Figure53.GlobalRegisterSettingsforExternalInputShortTest Figure54.Scope Showing Noise forInputShortwith5k Resistors 45SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

TestOptionson theEVM www.ti.com

8.3 Noise withCommon Referenceon NegativeInputs

Thereisan optioninADS1299 toconnectallthechannelsnegativeinputstoa common reference.This can be accomplishedby givinga signalon SRB1 pinand settingthebitSRB1 bitinMISC1 register.There isan optionon boardtotestoutthechannelnoiseperformancewiththissetting.On JP81 a jumperon (3- 4)and (5-6)isneeded.On JP8 a jumper(1-2)isrequired.These settingsroutesthecommon mode voltageVCM on BIAS_ELEC toallthepositiveinputs.ItalsoconnectsBIAS_ELEC toREF_ELEC viaR11 (5K).REF_ELEC isconnectedtoSRB1 pinon ADS1299. The noiseinthistestincludesnoiseoftwo 5K resistorsand thechannelnoise.The SRB1 controlswitchmust be setas shown inFigure55.The snapshotofthescope intheanalysistabisshown inFigure56.The averagepeak-to-peaknoiseforthis testis1.28µV. Figure55.MISC1 RegisterSettingforSRB1

46 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com TestOptionson theEVM Figure56.Noise withNegativeInputConnected toSRB1 Pin 47SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

TestOptionson theEVM www.ti.com

8.4 Noise withBufferedCommon ReferenceInput

Connectingallthenegativeinputstoone referenceelectrodecan leadtoexcessiveleakagecurrenton the electrode.The typicalleakagecurrenton ADS1299 channelis200pA.So fora 16 channelsystemtotal leakagemay be as largeas 3.2nA.Thisnumber willbecome progressivelyworse as channelcountis increased.Iftheleakagenumber isnotacceptablethereisan optiontobufferthecommon referenceinput beforeconnectedittoallthenegativeinputsofthechannel.On JP81 jumpers(3-4)and (5-6)are required.On JP8 a jumper(2-3)isrequiredand on JP7 a jumper(1-2)isneeded.The GUI settingsare same as inFigure56.Figure57 shows a snapshotofthenoisewithSRB1 drivenby a bufferedreference. The drawbackofusingthebufferintheSRB1 pathisincreasednoise.The noisecontributorsinthese settingsaretwo 5k resistors,op amp U4 and ADS1299 channel.As can be seen fromtheFigure57 the noisewiththisapproachislargerthannoiseinpreviousthreeapproaches.AtpresentOPA376 isinstalled on boardforU4. A lowernoiseop amp can be used ifneeded. Figure57.Noise withOPA376 inSRB1 Path

48 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com TestOptionson theEVM

8.5 InternallyGenerated TestSignaland Other MultiplexerInputs

ADS1299 internallygeneratesa testsignalthatcan be used forsignalintegritycheck.Alsothemultiplexer providesoptionstomeasure supplyvoltage,temperature,etc.Detailsoftheseinputscan be foundin Section5.3.

8.6 ArbitraryInputSignal

Any inputsignalcan be fedtothedeviceon connectorJ6 as describedinSection4.6.Figure58 shows theresultsobtainedwhen a singleended sinusoidalsignalisappliedtoAIN1 by followingthesteps describedinSection4.6.2. Figure58.Scope Tab withSinusoidalInputson AIN1 49SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

/RESET /PWDN SRB1 SRB2 1uF 100uF C10 10uF 1uF 1uF 1uF C20 0.01uF R3 0 VCAP4 VBG VCAP2 C13 0.1uF C14 0.1uF C12 0.1uF 1uF NI C16 0.1uF 1uF C15 NI NI C19 NI VREFP BIASINV BIASOUTBIASIN C33 NI VDD4 GND 2Output3 E/D 1 OSC1 HC735-2.048MHZ AVDD AVDDAVDD AVSS AVSS AVSS BIAS_DRV VREFP AVSS AVSS AVSS AVDD AVDD DVDD C11 1uF DVDD CLKSEL SPI_DRDY SPI_OUT GPIO2 SPI_CLK SPI_CS SPI_START AVDD SPI_IN GPIO1 10K 10K DVDD BIAS_DRV C22 NI C21 NI AVSS AVDD NI BIAS_SHD BIAS_SHD DVDD VCAP3 /RESET /PWDN SPI_DRDY GPIO4 SPI_OUT GPIO2 GPIO3 SPI_CLK SPI_CS SPI_START SPI_IN CLKSEL CLK AVSS C76 1uF AVSS AVSS C77 1uF AVSS JP5 C17 1uF C18 0.1uF AVDD NI /PWDN DAISY_IN GPIO3 GPIO4 DAISY_IN GPIO3 GPIO4 DAISY_IN 910 NI JP18 EXT_CLKEXT_CLK TP11 TP12TP1 TP2 AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND 392K TP3 IN8N1 IN8P2 IN7N3 IN7P4 IN6N5 IN6P6 IN5N7 IN5P8 IN4N9 IN4P10 IN3N11 IN3P12 IN2N13 IN2P14 IN1N15 IN1P16 SRB2 SRB1 VREFP VCAP4 AVSS RESV3/NC VREFN RESV2/NC /PWDN VCAP1 GPIO1 DAISY_IN VCAP2 /RESET DGND 33DIN 34START 38CLK 37/CS 39SCLK 40GPIO3 45GPIO2 44DOUT 43GPIO4 46/DRDY 47DVDD 48DGND 51AVSS 32DVDD 50DGND 49CLKSEL 52 AVSS1 AVDD1 VCAP3 AVDD AVDD AVSS AVSS AVSS AVDD AVDD BIASIN BIASINV BIASOUT RESV131 AVDD BIASREF RESERVED64 ADS1299 C95 0.1uF R75 10K DVDD C97 1uF C99 1uF JP7 REF_ELEC JP6 BIAS_ELEC R23 R24 AIN8N AIN8P AIN7N AIN7P AIN6N AIN6P AIN5N AIN5P AIN4N AIN4P AIN3N AIN3P AIN2N AIN2P AIN1N AIN1P C98 NI R25 AVDD AVSS BIAS_ELEC REF_ELEC R5 NI NI NI AVDD AVSS BIASREF JP19 OPA376 U11 OPA376 C23 1uF C24 1uF AVDD AVSS U4A NI AVDD AVSS U11A NI U11_3 U11_6 U11_6 U11_3 U4_6 U4_3 U4_6 U4_3 JP8 R18 NI R16 NI R17 NI R15 R13 R14 Optional 8-MSOP driver JP17 JP1 BIAS_ELEC BillofMaterials,Layoutsand Schematics www.ti.com

9 BillofMaterials,Layouts and Schematics

Thissectioncontainsthecompletebillofmaterials,printedcircuitboard(PCB) layouts,and schematic diagramsfortheADS1299EEG-FE. NOTE: Board layoutsarenottoscale.These areintendedtoshow how theboardislaidout;do not use formanufacturingADS1299EEG-FE PCBs.

9.1 ADS1299EEG-FE Front-EndBoard Schematics

Figure59 throughFigure63 shown theschematicdiagramsoftheADS1299EEG-FE. Figure59.ADS1299EEG-FC Schematic

50 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

REF_ELEC AIN8N AIN8P AIN7N AIN7P C80 4.7nF AIN6N R80 4.99K AIN6P R81 4.99K AIN5N AIN5P AIN4N AIN4P AIN3N AIN3P AIN2N AIN2P AIN1N AIN1P C82 4.7nF R82 4.99K R83 4.99K AGND C83 4.7nF AGND C81 4.7nF C84 4.7nF R84 4.99K R85 4.99K AGND C85 4.7nF C86 4.7nF R86 4.99K R87 4.99K AGND C87 4.7nF C88 4.7nF R88 4.99K R89 4.99K AGND C89 4.7nF C90 4.7nF R90 4.99K R91 4.99K AGND C91 4.7nF C92 4.7nF R92 4.99K R93 4.99K AGND C93 4.7nF C72 4.7nF R94 4.99K R95 4.99K AGND C73 4.7nF BIAS_ELEC BIAS_SHD AGND 2345 AIN1 R10 4.99K R11 4.99K C75 4.7nF AGND R12 4.99K 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 36PIN_IDC 1 2 3 4 5 6 JP25 1) External Input Short to VCM Jumper on (1-2), (3-4) 2) Ain+ to VCM, VCM drives SRB1 Jumper on (3-4), (5-6) 3) Ain- to VCM and Ain+ to SMA Jumper on (1-2) 4) Ain+ signal through header, VCM drives SRB1 Jumper on (5-6) JP81 Setting VCM: DC Bias from BIAS_ELEC www.ti.com BillofMaterials,Layoutsand Schematics Figure60.ADS1299EEG-FC Jumper Schematic 51SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

VCC_5v AVDD VCC_-5v CFLY- GND CFLY+ IN2 OUT 1 TPS60403 C45 10uF C46 10uF C47 1uF 3.3uH 3.3uHC50 10uF C49 1uF C51 10uF TP4 C48 1uF TP5 VCC_-5v AVSS C63 2.2uF C67 0.01uF C64 2.2uF 3.3uH C66 10uF TP6 C65 10uF C57 0.1uF R52 NI R53 NI JP20 JP2 C62 1uF C59 2.2uF 3.3uH C61 10uF C60 10uF EN3 NR/FB 4 OUT 5 GND2 IN1 TPS73225 R56 NI R57 NI C58 1uF TP13 EN3 NR/FB 4 OUT 5IN2 GND1 TPS72325 AGND AGND AGND AGND AGND -2.5V +2.5V AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND +5.0V BillofMaterials,Layoutsand Schematics www.ti.com Figure61.ECG Power Supplies

52 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

VCC_5v DVDD TP8 TP10 TP9 TP7 C70 0.1uF C69 0.1uF C71 100uF C68 100uF CLKSEL SPI_DRDY SPI_OUT GPIO2 SPI_CLKSPI_CS SPI_START SPI_IN GPIO1 Dummy Connector JP4 /RESET JP24JP21 JP22 NOTE: Populate J2, J3, and J4 female connectors from the bottom EXT_CLK R67 10K JP23 DVDD AGND AGND AGND VCC_1.8V VCC_3.3V R74 0 A0 1 A1 2 GND 4SDA5 SCL6 WP7 VCC8 A2 3 U10 24AA256-I/ST C94 0.1uF VCC_3.3V R68 NI VCC_3.3V R69 NI R70 NI R71 R72 R73 SCL SDA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 J3 12 910 R51 NI VREFP R50 NI C40 NI NI AVDD AVSS R47 NI C38 NI C39 NI R48 NI C42 NI C41 NI R49 NI JP3 NI VIN2 GND4 OUT 6 TRIM 5 TEMP3 N/C1 N/C N/C 8 U3 NI C34 NI AVDD AVSS C43 NI C35 NI AVSS AGND AGND www.ti.com BillofMaterials,Layoutsand Schematics Figure62.ExternalReferenceDrivers(NotInstalled) Figure63.ECG MDK Board InterfaceAdapter

9.2 PrintedCircuitBoard Layout

BillofMaterials,Layoutsand Schematics www.ti.com Figure64.ADS1299EEG-FE Top Assembly Figure65.ADS1299EEG-FE Top Layer

54 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com BillofMaterials,Layoutsand Schematics Figure66.ADS1299EEG-FE InternalLayer (1) Figure67.ADS1299EEG-FE InternalLayer (2) 55SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

BillofMaterials,Layoutsand Schematics www.ti.com Figure68.ADS1299EEG-FE Bottom Layer Figure69.ADS1299EEG-FE Bottom Assembly

56 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com BillofMaterials,Layoutsand Schematics

9.3 BillofMaterials

Table10 liststhebillofmaterialsfortheADS1299ECG-FE. Table10.BillofMaterials Qty Ref Des Description MFR PartNumber

1 NA PrintedWiringBoard TI 6541979

19 C1, C2, C3, C4, C5, C6, C11, C17, C23, C24, C47, C48, CAP CER 1UF 25V,10% X5R 0603 Murata GRM188R61E105KA12D C49, C58, C62, C76, C77, C97, C99

0 C7, C8, C15, C19, C21, C22, C34, C38, C40, C41, C42, Not Installed

C43, C98

3 C9, C68, C71 CAP CER 100UF 10V,20% X5R 1210 TaiyoYuden LMK325BJ107MM-T

9 C10, C45, C46, C50, C51, C60, C61, C65, C66 CAP CER 10UF 10V,10% X5R 0805 Murata GRM219R61A106KE44D

10 C12, C13, C14, C16, C18, C57, C69, C70, C94, C95 CAP CER 0.1UF 50V,10% X7R 0603 Murata GRM188R71H104KA93D

2 C20, C67 CAP CER 10000PF 50V,10% X7R 0603 Murata GRM188R71H103KA01D

0 C33, C35 Not Installed

0 C39 Not Installed

3 C59, C63, C64 CAP CER 2.2UF 6.3V,10% X5R 0603 Murata GRM185R60J225KE26D 17 C72, C73, C75, C80, C81, C82, C83, C84, C85, C86, C87, CAP CER 4700PF 50V,10% X7R 0603 Murata GRM188R71H472KA01D C88, C89, C90, C91, C92, C93

1 AIN1 CONN SMA JACK STRAIGHT PCB Amphenol 132134

1 J3 (Top) 10 Pin,DualRow, SM Header (20Pos.) Samtec TSM-110-01-T-DV-P 2 J2,J3 (Bottom) 10 Pin,DualRow, SM Header (20Pos.) Samtec SSW-110-22-F-D-VS-K 1 J4 (Bottom) 5 Pin,DualRow, SM Header (10Pos.) Samtec SSW-105-22-F-D-VS-K

0 J5 Not Installed

1 J6 18 Pin,DualRow, Header (36Pos.) Samtec SSW-118-21-F-D 11 JP1,JP2,JP6,JP7,JP8,JP18,JP20,JP21,JP22,JP23, 3 PositionJumper 0.1"spacing Samtec TSW-103-07-T-S JP24

0 JP3 Not Installed

4 JP4,JP5,JP17,JP19 2 Pin0.1inch,Header Samtec TSW-102-07-T-S 1 JP25 3 Pin,DualRow, Header (6Pos.) Samtec TSW-103-07-T-D 4 L1,L2,L4,L5 INDUCTOR MULTILAYER 3.3UH 0805 TDK MLZ2012A3R3W 1 OSC1 OSC 2.0480MHZ 3.3V,HCMOS SMT Fox FXO-HC735-2.048MHZ

0 R1, R4, R5, R47, R48, R49, R50, R51, R52, R53, R56, R57, Not Installed

R68, R69, R70

0 R2 Not Installed

6 R3, R25, R71, R72, R73, R74 RES 0.0OHM 1/10W 5% 0603 SMD Yageo RC0603JR-070RL 4 R6, R7, R67, R75 RES 10.0KOHM 1/10W 1% 0603 SMD Yageo RC0603FR-0710KL

1 R8 RES 392K OHM 1/10W 1% 0603 SMD Yageo RC0603FR-07392KL

19 R10, R11, R12, R80, R81, R82, R83, R84, R85, R86, R87, RES 4.99KOHM 1/10W 1% 0603 SMD Yageo RC0603FR-074K99L R88, R89, R90, R91, R92, R93, R94, R95 3 R13, R14, R15 RES 0.0OHM 1/16W 0402 SMD Yageo RC0402JR-070RL

0 R16, R17, R18 Not Installed

BillofMaterials,Layoutsand Schematics www.ti.com Table10.BillofMaterials(continued) Qty Ref Des Description MFR PartNumber 5 TP1, TP2, TP8, TP11, TP12 TEST POINT PC MINI .040"D BLACK Keystone 5001 8 TP3, TP4, TP5, TP6, TP7, TP9, TP10, TP13 TEST POINT PC MINI .040"D RED Keystone 5000

1 U1 ADS1299, Low-Noise,8-Channel,24-bitanalogFront-EndforBiopotential TI ADS1299CPAG

0 U2 Not Installed

0 U3, U5 Not Installed

2 U4, U11 IC OP AMP GP 5.5MHZ SGL 8SOIC TI OPA376AID

0 U4A, U11A Not Installed

1 U6 IC UNREG CHRG PUMP V INV SOT23-5 TI TPS60403DBVT

1 U8 IC LDO REG NEG 200MA 2.5V,SOT23 TI TPS72325DBVT 1 U9 IC LDO REG 250MA 2.5V,SOT23-5 TI TPS73225DBVT

1 U10 IC EEPROM 256KBIT 400KHZ 8TSSOP Microchip 24AA256-I/ST

30 NA 0.100Shunt-BlackShunts 3M 969102-0000-DA

1 NA MMB0 Motherboard TI 6462011

58 EEG Front-EndPerformanceDemonstrationKit SLAU443 –May 2012

www.ti.com BillofMaterials,Layoutsand Schematics

9.4 ADS1299EEG-FE Power-Supply Recommendations

Figure70 shows a +6V power-supplycable(notprovidedintheEVM kit)connectedtoa batterypack with four1.5Vbatteriesconnectedinseries.Connectingtoa wall-poweredsource(providedintheEVM kit) makes theADS1299EEG-FE more susceptibleto50Hz/60Hz noisepickup;therefore,forbest performance,itisrecommended topower theADS1299EEG-FE witha batterysource.Thisconfiguration minimizestheamount ofnoisepickupseen atthedigitizedoutputoftheADS1299. Figure70.Recommended Power Supply forADS1299EEG-FE 59SLAU443 –May 2012 EEG Front-EndPerformanceDemonstrationKit SubmitDocumentationFeedback Copyright© 2012,Texas InstrumentsIncorporated

EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments(TI)providestheenclosedEvaluationBoard/Kit/Module(EVM) underthefollowingconditions: The userassumes allresponsibilityand liabilityforproperand safehandlingofthegoods.Further,theuserindemnifiesTIfromallclaims arisingfromthehandlingoruse ofthegoods. Shouldthisevaluationboard/kitnotmeet thespecificationsindicatedintheUser’s Guide,theboard/kitmay be returnedwithin30 days from thedateofdeliveryfora fullrefund.THE FOREGOING LIMITED WARRANTY ISTHE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND ISIN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED,OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. PleasereadtheUser's Guide and,specifically,theWarningsand RestrictionsnoticeintheUser's Guide priortohandlingtheproduct.This noticecontainsimportantsafetyinformationabouttemperaturesand voltages.Foradditionalinformationon TI's environmentaland/orsafety programs,pleasevisitwww.ti.com/eshorcontactTI. No licenseisgrantedunderany patentrightorotherintellectualpropertyrightofTIcoveringorrelatingtoany machine,process,or combinationinwhichsuch TIproductsorservicesmightbe orareused.TIcurrentlydealswitha varietyofcustomersforproducts,and thereforeourarrangementwiththeuserisnotexclusive.TIassumes no liabilityforapplicationsassistance,customerproductdesign, softwareperformance,orinfringementofpatentsorservicesdescribedherein. REGULATORY COMPLIANCE INFORMATION As notedintheEVM User’s Guide and/orEVM itself,thisEVM and/oraccompanyinghardwaremay ormay notbe subjecttotheFederal CommunicationsCommission (FCC) and IndustryCanada (IC)rules. ForEVMs not subjecttotheabove rules,thisevaluationboard/kit/moduleisintendedforuse forENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and isnotconsideredby TItobe a finishedend productfitforgeneralconsumer use.Itgenerates,uses,and can radiateradiofrequencyenergyand has notbeen testedforcompliancewiththelimitsofcomputing devicespursuanttopart15 ofFCC orICES-003 rules,whicharedesignedtoprovidereasonableprotectionagainstradiofrequency interference.Operationoftheequipmentmay cause interferencewithradiocommunications,inwhichcase theuserathisown expense will be requiredtotakewhatevermeasures may be requiredtocorrectthisinterference. GeneralStatementforEVMs includinga radio User Power/FrequencyUse Obligations:Thisradioisintendedfordevelopment/professionaluse onlyinlegallyallocatedfrequencyand power limits.Any use ofradiofrequenciesand/orpower availabilityofthisEVM and itsdevelopmentapplication(s)must complywithlocal lawsgoverningradiospectrumallocationand power limitsforthisevaluationmodule.Itistheuser’s soleresponsibilitytoonlyoperatethis radioinlegallyacceptablefrequencyspace and withinlegallymandated power limitations.Any exceptionstothisarestrictlyprohibitedand unauthorizedby Texas Instrumentsunlessuserhas obtainedappropriateexperimental/developmentlicensesfromlocalregulatory authorities,whichisresponsibilityofuserincludingitsacceptableauthorization. For EVMs annotatedas FCC – FEDERAL COMMUNICATIONS COMMISSION Part15 Compliant Caution Thisdevicecomplieswithpart15 oftheFCC Rules.Operationissubjecttothefollowingtwo conditions:(1)Thisdevicemay notcause harmfulinterference,and (2)thisdevicemust acceptany interferencereceived,includinginterferencethatmay cause undesiredoperation. Changes ormodificationsnotexpresslyapprovedby thepartyresponsibleforcompliancecouldvoidtheuser's authoritytooperatethe equipment. FCC InterferenceStatementforClass A EVM devices Thisequipmenthas been testedand foundtocomplywiththelimitsfora ClassA digitaldevice,pursuanttopart15 oftheFCC Rules. These limitsaredesignedtoprovidereasonableprotectionagainstharmfulinterferencewhen theequipmentisoperatedina commercial environment.Thisequipmentgenerates,uses,and can radiateradiofrequencyenergyand,ifnotinstalledand used inaccordancewiththe instructionmanual,may cause harmfulinterferencetoradiocommunications.Operationofthisequipmentina residentialareaislikelyto cause harmfulinterferenceinwhichcase theuserwillbe requiredtocorrecttheinterferenceathisown expense.

FCC InterferenceStatementforClass B EVM devices Thisequipmenthas been testedand foundtocomplywiththelimitsfora ClassB digitaldevice,pursuanttopart15 oftheFCC Rules. These limitsaredesignedtoprovidereasonableprotectionagainstharmfulinterferenceina residentialinstallation.Thisequipment generates,uses and can radiateradiofrequencyenergyand,ifnotinstalledand used inaccordancewiththeinstructions,may cause harmfulinterferencetoradiocommunications.However,thereisno guaranteethatinterferencewillnotoccurina particularinstallation.If thisequipmentdoes cause harmfulinterferencetoradioortelevisionreception,whichcan be determinedby turningtheequipmentoffand on,theuserisencouragedtotrytocorrecttheinterferenceby one ormore ofthefollowingmeasures:

Reorientorrelocatethereceivingantenna.
Increasetheseparationbetween theequipmentand receiver.
Connecttheequipmentintoan outleton a circuitdifferentfromthattowhichthereceiverisconnected.
Consultthedealeroran experiencedradio/TVtechnicianforhelp. For EVMs annotatedas IC – INDUSTRY CANADA Compliant ThisClassA orB digitalapparatuscomplieswithCanadianICES-003. Changes ormodificationsnotexpresslyapprovedby thepartyresponsibleforcompliancecouldvoidtheuser’s authoritytooperatethe equipment. Concerning EVMs includingradiotransmitters ThisdevicecomplieswithIndustryCanada licence-exemptRSS standard(s).Operationissubjecttothefollowingtwo conditions:(1)this devicemay notcause interference,and (2)thisdevicemust acceptany interference,includinginterferencethatmay cause undesired operationofthedevice. Concerning EVMs includingdetachableantennas Under IndustryCanada regulations,thisradiotransmittermay onlyoperateusingan antennaofa typeand maximum (orlesser)gain approvedforthetransmitterby IndustryCanada. To reducepotentialradiointerferencetootherusers,theantennatypeand itsgainshould Thisradiotransmitterhas been approvedby IndustryCanada tooperatewiththeantennatypeslistedintheuserguidewiththemaximum permissiblegainand requiredantennaimpedance foreach antennatypeindicated.Antennatypesnotincludedinthislist,havinga gain greaterthanthemaximum gainindicatedforthattype,arestrictlyprohibitedforuse withthisdevice. Cet appareilnum ériquede laclasseA ou B estconformeà lanorme NMB-003 du Canada. Les changements ou lesmodificationspas expressément approuvés parlapartieresponsablede laconformité ontpu viderl’autorité de l'utilisateurpouractionnerl'équipement. Concernant lesEVMs avec appareilsradio Le présentappareilestconformeaux CNR d'IndustrieCanada applicablesaux appareilsradioexempts de licence.L'exploitationest autorisée aux deux conditionssuivantes:(1)l'appareilne doitpas produirede brouillage,et(2)l'utilisateurde l'appareildoitacceptertout brouillageradioélectriquesubi,m ême silebrouillageestsusceptibled'en compromettrelefonctionnement. Concernant lesEVMs avec antennes détachables Conformément à laréglementationd'IndustrieCanada, leprésentémetteurradiopeutfonctionneravec une antenned'un typeetd'un gain maximal(ouinférieur)approuvé pourl'émetteurparIndustrieCanada. Dans lebutde réduirelesrisquesde brouillageradioélectriqueà l'intentiondes autresutilisateurs,ilfautchoisirletyped'antenneetson gainde sorteque lapuissanceisotroperayonnée équivalente Le présentémetteurradioa été approuvé parIndustrieCanada pourfonctionneravec lestypesd'antenneénum érés dans lemanuel d’usage etayantun gainadmissiblemaximaletl'impédance requisepourchaque typed'antenne.Les typesd'antennenon inclusdans cetteliste,ou dontlegainestsupérieurau gainmaximalindiqué,sontstrictementinterditspourl'exploitationde l'émetteur. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER

【【ImportantNoticeforUsers ofthisProduct inJapan】】 Thisdevelopment kitisNOT certifiedas ConfirmingtoTechnicalRegulationsofRadio Law ofJapan Ifyou use thisproductinJapan,you arerequiredby RadioLaw ofJapan tofollowtheinstructionsbelowwithrespecttothisproduct: 1. Use thisproductina shieldedroom orany othertestfacilityas definedinthenotification#173 issuedby MinistryofInternalAffairsand Communicationson March 28,2006,based on Sub-section1.1ofArticle6 oftheMinistry’s RuleforEnforcementofRadioLaw of Japan, 2. Use thisproductonlyafteryou obtainedthelicenseofTestRadioStationas providedinRadioLaw ofJapan withrespecttothis product,or 3. Use ofthisproductonlyafteryou obtainedtheTechnicalRegulationsConformityCertificationas providedinRadioLaw ofJapan with respecttothisproduct.Also,pleasedo nottransferthisproduct,unlessyou givethesame noticeabove tothetransferee.Pleasenote thatifyou couldnotfollowtheinstructionsabove,you willbe subjecttopenaltiesofRadioLaw ofJapan. Texas InstrumentsJapan Limited (address)24-1,Nishi-Shinjuku6 chome, Shinjuku-ku,Tokyo, Japan http://www.tij.co.jp 【ご使用にあたっての注】本開発キットは技術基準適合証明を受けておりません。本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。日本テキサス・インスツルメンツ株式会社東京都新宿区西新宿６丁目２４番１号西新宿三井ビル http://www.tij.co.jp SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER

EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For FeasibilityEvaluationOnly,inLaboratory/DevelopmentEnvironments.Unlessotherwiseindicated,thisEVM isnota finished electricalequipmentand notintendedforconsumer use.Itisintendedsolelyforuse forpreliminaryfeasibilityevaluationin laboratory/developmentenvironmentsby technicallyqualifiedelectronicsexpertswho arefamiliarwiththedangersand applicationrisks associatedwithhandlingelectricalmechanicalcomponents,systemsand subsystems.Itshouldnotbe used as allorpartofa finishedend product. Your SoleResponsibilityand Risk.You acknowledge,representand agreethat: 1. You have uniqueknowledgeconcerningFederal,Stateand localregulatoryrequirements(includingbutnotlimitedtoFood and Drug Administrationregulations,ifapplicable)whichrelatetoyourproductsand whichrelatetoyouruse (and/orthatofyouremployees, affiliates,contractorsordesignees)oftheEVM forevaluation,testingand otherpurposes. 2. You have fulland exclusiveresponsibilitytoassurethesafetyand complianceofyourproductswithallsuch lawsand otherapplicable regulatoryrequirements,and alsotoassurethesafetyofany activitiestobe conductedby you and/oryouremployees,affiliates, contractorsordesignees,usingtheEVM. Further,you areresponsibletoassurethatany interfaces(electronicand/ormechanical) between theEVM and any human body aredesignedwithsuitableisolationand means tosafelylimitaccessibleleakagecurrentsto minimizetheriskofelectricalshockhazard. 3. You willemploy reasonablesafeguardstoensurethatyouruse oftheEVM willnotresultinany propertydamage, injuryordeath,even iftheEVM shouldfailtoperformas describedorexpected. 4. You willtakecareofproperdisposaland recyclingoftheEVM ’s electroniccomponents and packingmaterials. CertainInstructions.ItisimportanttooperatethisEVM withinTI’s recommended specificationsand environmentalconsiderationsperthe userguidelines.ExceedingthespecifiedEVM ratings(includingbutnotlimitedtoinputand outputvoltage,current,power,and environmentalranges)may cause propertydamage, personalinjuryordeath.Iftherearequestionsconcerningtheseratingspleasecontact a TIfieldrepresentativepriortoconnectinginterfaceelectronicsincludinginputpower and intendedloads.Any loadsappliedoutsideofthe specifiedoutputrangemay resultinunintendedand/orinaccurateoperationand/orpossiblepermanentdamage totheEVM and/or interfaceelectronics.PleaseconsulttheEVM User's Guide priortoconnectingany loadtotheEVM output.Ifthereisuncertaintyas tothe loadspecification,pleasecontacta TIfieldrepresentative.Duringnormaloperation,some circuitcomponents may have case temperatures greaterthan60°C as longas theinputand outputaremaintainedata normalambientoperatingtemperature.These components include butarenotlimitedtolinearregulators,switchingtransistors,pass transistors,and currentsense resistorswhichcan be identifiedusingthe EVM schematiclocatedintheEVM User's Guide.When placingmeasurement probesnearthesedevicesduringnormaloperation,please be aware thatthesedevicesmay be verywarm tothetouch.As withallelectronicevaluationtools,onlyqualifiedpersonnelknowledgeable inelectronicmeasurement and diagnosticsnormallyfoundindevelopmentenvironmentsshoulduse theseEVMs. Agreement toDefend,Indemnifyand Hold Harmless.You agreetodefend,indemnifyand holdTI,itslicensorsand theirrepresentatives harmlessfromand againstany and allclaims,damages, losses,expenses,costsand liabilities(collectively,"Claims")arisingoutoforin connectionwithany use oftheEVM thatisnotinaccordancewiththetermsoftheagreement.ThisobligationshallapplywhetherClaims ariseunderlawoftortorcontractorany otherlegaltheory,and even iftheEVM failstoperformas describedorexpected. Safety-Criticalor Life-CriticalApplications.Ifyou intendtoevaluatethecomponents forpossibleuse insafetycriticalapplications(such as lifesupport)where a failureoftheTIproductwouldreasonablybe expectedtocause severepersonalinjuryordeath,such as devices whichareclassifiedas FDA ClassIIIorsimilarclassification,thenyou must specificallynotifyTIofsuch intentand enterintoa separate Assuranceand IndemnityAgreement. MailingAddress:Texas Instruments,PostOfficeBox 655303,Dallas,Texas 75265 Copyright© 2012,Texas InstrumentsIncorporated

EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety programs, please visitwww.ti.com/eshor contact TI. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. REGULATORY COMPLIANCE INFORMATION As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal Communications Commission (FCC) and Industry Canada (IC) rules. For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. General Statement for EVMs including a radio User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization. For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant Caution This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense.

FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help. For EVMs annotated as IC – INDUSTRY CANADA Compliant This Class A or B digital apparatus complies with Canadian ICES-003. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Concerning EVMs including radio transmitters This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concerning EVMs including detachable antennas Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada. Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de l'utilisateur pour actionner l'équipement. Concernant les EVMs avec appareils radio Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER

【【Important Notice for Users of this Product in Japan】】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, 2. Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product, or 3. Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp 【ご使用にあたっての注】本開発キットは技術基準適合証明を受けておりません。本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。日本テキサス・インスツルメンツ株式会社東京都新宿区西新宿６丁目２４番１号西新宿三井ビル http://www.tij.co.jp SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER

EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments.Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end product. Your Sole Responsibility and Risk. You acknowledge, represent and agree that: 1. You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees, affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes. 2. You have full and exclusive responsibility to assure the safety and compliance of your products with all such laws and other applicable regulatory requirements, and also to assure the safety of any activities to be conducted by you and/or your employees, affiliates, contractors or designees, using the EVM. Further, you are responsible to assure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. 3. You will employ reasonable safeguards to ensure that your use of the EVM will not result in any property damage, injury or death, even if the EVM should fail to perform as described or expected. 4. You will take care of proper disposal and recycling of the EVM’s electronic components and packing materials. Certain Instructions. It is important to operate this EVM within TI’s recommended specifications and environmental considerations per the user guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, and environmental ranges) may cause property damage, personal injury or death. If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than 60°C as long as the input and output are maintained at a normal ambient operating temperature. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors which can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during normal operation, please be aware that these devices may be very warm to the touch. As with all electronic evaluation tools, only qualified personnel knowledgeable in electronic measurement and diagnostics normally found in development environments should use these EVMs. Agreement to Defend, Indemnify and Hold Harmless.You agree to defend, indemnify and hold TI, its licensors and their representatives harmless from and against any and all claims, damages, losses, expenses, costs and liabilities (collectively, "Claims") arising out of or in connection with any use of the EVM that is not in accordance with the terms of the agreement. This obligation shall apply whether Claims arise under law of tort or contract or any other legal theory, and even if the EVM fails to perform as described or expected. Safety-Critical or Life-Critical Applications.If you intend to evaluate the components for possible use in safety critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, such as devices which are classified as FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated

Texas InstrumentsIncorporatedand itssubsidiaries(TI)reservetherighttomake corrections,enhancements,improvementsand other changes toitssemiconductorproductsand servicesperJESD46, latestissue,and todiscontinueany productorserviceperJESD48, latest issue.Buyersshouldobtainthelatestrelevantinformationbeforeplacingordersand shouldverifythatsuch informationiscurrentand complete.Allsemiconductorproducts(alsoreferredtohereinas “components”)aresoldsubjecttoTI’s termsand conditionsofsale suppliedatthetimeoforderacknowledgment. TIwarrantsperformanceofitscomponents tothespecificationsapplicableatthetimeofsale,inaccordancewiththewarrantyinTI’s terms and conditionsofsaleofsemiconductorproducts.Testingand otherqualitycontroltechniquesareused totheextentTIdeems necessary tosupportthiswarranty.Exceptwhere mandated by applicablelaw,testingofallparametersofeach component isnotnecessarily performed. TIassumes no liabilityforapplicationsassistanceorthedesignofBuyers’products.Buyersareresponsiblefortheirproductsand applicationsusingTIcomponents.To minimizetherisksassociatedwithBuyers’productsand applications,Buyersshouldprovide adequatedesignand operatingsafeguards. TIdoes notwarrantorrepresentthatany license,eitherexpressorimplied,isgrantedunderany patentright,copyright,mask work right,or otherintellectualpropertyrightrelatingtoany combination,machine,orprocessinwhichTIcomponents orservicesareused.Information publishedby TIregardingthird-partyproductsorservicesdoes notconstitutea licensetouse such productsorservicesora warrantyor endorsementthereof.Use ofsuch informationmay requirea licensefroma thirdpartyunderthepatentsorotherintellectualpropertyofthe thirdparty,ora licensefromTIunderthepatentsorotherintellectualpropertyofTI. ReproductionofsignificantportionsofTIinformationinTIdatabooks ordatasheetsispermissibleonlyifreproductioniswithoutalteration and isaccompaniedby allassociatedwarranties,conditions,limitations,and notices.TIisnotresponsibleorliableforsuch altered documentation.Informationofthirdpartiesmay be subjecttoadditionalrestrictions. ResaleofTIcomponents orserviceswithstatementsdifferentfromorbeyond theparametersstatedby TIforthatcomponent orservice voidsallexpressand any impliedwarrantiesfortheassociatedTIcomponent orserviceand isan unfairand deceptivebusinesspractice. TIisnotresponsibleorliableforany such statements. Buyeracknowledgesand agreesthatitissolelyresponsibleforcompliancewithalllegal,regulatoryand safety-relatedrequirements concerningitsproducts,and any use ofTIcomponents initsapplications,notwithstandingany applications-relatedinformationorsupport thatmay be providedby TI.Buyerrepresentsand agreesthatithas allthenecessaryexpertisetocreateand implementsafeguardswhich anticipatedangerousconsequencesoffailures,monitorfailuresand theirconsequences,lessenthelikelihoodoffailuresthatmightcause harm and takeappropriateremedialactions.BuyerwillfullyindemnifyTIand itsrepresentativesagainstany damages arisingoutoftheuse ofany TIcomponents insafety-criticalapplications. Insome cases,TIcomponents may be promotedspecificallytofacilitatesafety-relatedapplications.Withsuch components,TI’s goalisto helpenablecustomerstodesignand createtheirown end-productsolutionsthatmeet applicablefunctionalsafetystandardsand requirements.Nonetheless,such components aresubjecttotheseterms. No TIcomponents areauthorizedforuse inFDA ClassIII(orsimilarlife-criticalmedicalequipment)unlessauthorizedofficersoftheparties have executeda specialagreementspecificallygoverningsuch use. OnlythoseTIcomponents whichTIhas specificallydesignatedas militarygradeor“enhanced plastic”aredesignedand intendedforuse in military/aerospaceapplicationsorenvironments.Buyeracknowledgesand agreesthatany militaryoraerospaceuse ofTIcomponents whichhave not been so designatedissolelyattheBuyer's risk,and thatBuyerissolelyresponsibleforcompliancewithalllegaland regulatoryrequirementsinconnectionwithsuch use. TIhas specificallydesignatedcertaincomponents whichmeet ISO/TS16949 requirements,mainlyforautomotiveuse.Components which have notbeen so designatedareneitherdesignednorintendedforautomotiveuse;and TIwillnotbe responsibleforany failureofsuch components tomeet such requirements. Products Applications Audio www.ti.com/audio Automotiveand Transportationwww.ti.com/automotive Amplifiers amplifier.ti.com Communicationsand Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP ® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energyand Lighting www.ti.com/energy Clocksand Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space,Avionicsand Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Videoand Imaging www.ti.com/video RFID www.ti-rfid.com OMAP ApplicationsProcessors www.ti.com/omap TIE2E Community e2e.ti.com WirelessConnectivity www.ti.com/wirelessconnectivity MailingAddress:Texas Instruments,PostOfficeBox 655303,Dallas,Texas 75265 Copyright© 2012,Texas InstrumentsIncorporated

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