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Technical content

Features

 Bi-Directional Interface betw een Any Tw o Levels: 1.65 V to 5.5 V  Direction Control not Needed  System GPIO Resources Not Required w hen OE Tied to V CCA  I2C 400 pF Buffer / Repeater  I2C Bus Isolation  A/B Port V OL = 175 mV (Typical), V IL = 150 mV , IOL = 6 mA  Open-Drain Inputs / Outputs  Accommodates Standard-Mode and Fast -Mode I2C-Bus Devices  Supports I2C Clock Stretching & Multi-Master  Fully Configurable: Inputs and Outputs Track V CC  Control Input (/OE) Referenced to V CCA.  Non-Preferential Pow er-Up; Either V CC May Be Pow ered-Up First  Outputs Sw itch to 3-State if Either V CC is at GND  Tolerant Output Enable: 5 V  Packaged in 8-Terminal Leadless MicroPak™ (1.6 mm x 1.6 mm) and Ultrathin MLP (1.2 mm x 1.4 mm)  ESD Protection Exceeds: - 8 kV HBM ESD (per JESD22-A114) - 2 kV CDM (per JESD22-C101)

Description

The FXMA2102 is a high- performance configurable dual-voltage-supply translator for bi -directional voltage translation over a w ide range of input and output voltages levels. Intended for use as a voltage translator betw een I 2C- Bus® complaint masters and slaves . The device is designed so that the A port tracks the VCCA level and the B port tracks the V CCB level. This allow s for bi -directional A/B port voltage translation betw een any tw o levels from 1.65 V to 5.5 V. V CCA can equal V CCB from 1.65V to 5.5V. The OE pin is referenced to V CCA. Either VCC can be pow ered-up first. Internal pow er-dow n control circuits place the device in 3- state if either V CC is removed. The tw o ports of the device have automatic direction sense capability. Either port may sense an input signal and transfer it as an output signal to the other port.

Ordering Information

-40 to +85°C XN 8-Lead MicroPak™, 1.6 mm Wide 5000 Units on Tape and Reel FXMA2102UMX 8-Lead Ultrathin MLP, 1.2 mm x 1.4 mm

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications Block Diagram VCCB VCCA A B OE Dynamic Driver (With Time Out) Dynamic Driver (With Time Out) VbiasA VbiasB Internal Direction Generator & Ctrl Internal Direction Generator & Ctrl F igure 1. Block Diagram, 1 of 2 Channels

Figure 2. MicroPak™ (Top -Through View) Figure 3. UMLP (Top -Through View)

1 VCCA A-Side Pow er Supply

4 GND Ground

5 OE Output Enable Input (Referenced to VCCA )

8 VCCB B-Side Pow er Supply

  1. If the OE pin is driven LOW, the FXMA2102 is disabled and the A0, A1, B0, and B1 pins (including dynamic

drivers) are forced into 3-state.

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCCA, VCCB Supply Voltage –0.5 7.0 V VIN DC Input Voltage A Por t –0.5 7.0 B Por t –0.5 7.0 Control Input (OE) –0.5 7.0 VO Output Voltage(2) An Outputs 3-State –0.5 7.0 V Bn Outputs 3-State –0.5 7.0 An Outputs Active –0.5 VCCA + 0.5V Bn Outputs Active –0.5 VCCB + 0.5V IIK DC Input Diode Current At VIN < 0 V –50 mA IOK DC Output Diode Current At VO < 0 V –50 mA At VO > VCC +50 IOH / IOL DC Output Source/Sink Current –50 +50 mA ICC DC VCC or Ground Current per Supply Pin ±100 mA PD Pow er Dissipation At 400 KHz 0.129 mW TSTG Storage Temperature Range –65 +150 °C ESD Electrostatic Discharge Capability Human Body Model, JESD22-A114 8 kV Charged Device Mode, JESD22-C101 2 Note : 2. IO absolute maximum rating must be observed. R ecommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit VCCA, VCCB Pow er Supply Operating 1.65 5.50 V VIN Input Voltage A Por t 0 5.5 V B Por t 0 5.5 Control Input (OE) 0 VCCA ΘJA Thermal Resistance 8-Lead MicroPak™ 279.0 C°/W 8-Lead Ultrathin MLP 301.5 TA Free Air Operating Temperature –40 +85 °C Note : 3. All unused inputs and I/O pins must be held at V CCI or GND.

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications Functional Description Power -Up/Power-Down Sequencing FXM translators offer an advantage in that either V CC may be pow ered up first. This benefit derives from the chip design. When either V CC is at 0 V, outputs are in a high-impedance state. The control input (OE) is designed to track the V CCA supply. A pull -dow n resistor tying OE to GND should be used to ensure that bus contention, excessive currents, or oscillations do not occur during pow er-up/pow er-dow n. The size of the pull- dow n resistor is based upon the current -sinking capability of the device driving the OE pin. The recommended pow er -up sequence is: 1. Apply pow er to the first VCC. 2. Apply pow er to the second VCC. 3. D rive the OE input HIGH to enable the device. The recommended pow er -dow n sequence is: 1. D rive OE input LOW to disable the device. 2. Remove pow er from either VCC. 3. Remove pow er from other VCC. Note : 4. Alternatively, the OE pin can be hardw ired to V CCA t o save GPIO pins. If OE is hardw ired to V CCA, ei ther V CC can be pow ered up or dow n first. Application Circuit VCCA VCCB OE GND RPU RPU RPU RPU 0.1µF0.1µF RPD VCCA VCCB F igure 4. Application Circuit

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications Buffer / Repeater Performance The FXMA2102 dynamic drivers have enough current sourcing capability to drive a 400 pF capacitive bus. This is beneficial for instances w hen an I 2C buffer / repeater is required. The I 2C specification stipulates a maximum bus capacitance of 400 pF. If an I 2C segment exceeds 400 pF, an I 2C buffer / repeater is required to split the segment into tw o segments, each of w hich is less than 400 pF. Figure 5 is a scope shot of an FXMA2102 driving a lumped load of 600 pF. Notice the (30% - 70%) rise time is only 112 ns (RPU = 2.2 K). This is w ell below the maximum edge rate of 300 ns. Not only does the FXMA2102 drive 400 pF, but it also provides excellent headroom below the I 2C specification maximum edge rate of 300 ns. VOL vs. IOL The I 2C specification mandates a maximum V IL (IOL of 3 mA ) of VCC • 0.3 and a maximum VOL of 0.4 V. If there is a master on the A port of an I 2C translator w ith a V CC of 1.65 V and a slave on the I 2C translator B port w ith a VCC of 3.3 V, the maximum VIL of the master is (1.65 V x 0.3) 495 mV. The slave could legally transmit a valid logic LOW of 0.4 V to the master. If the I 2C translator’s channel resistance is too high, the voltage drop across the translator could present a V IL to the master greater than 495 mV. To complicate matters, the I 2C specification states that 6 mA of I OL is recommended for bus capacitances approaching 400 pF. More I OL increases the voltage drop across the I2C translator. The I 2C application benefits w hen I 2C translators exhibit low V OL performance. Figure 6 depicts typical FXMA2102 V OL performance vs. the competition, given a 0.4 V VIL. F igure 6. V OL vs. IOL 0.4 0.45 0.5 0.55 0.6 0.65 0 2 4 6 8 10 VOL (V): IOL (mA): VOL: FXMA2102 vs. Device B, VIL = 0.4V Device B VIL = 0.4V

forever; how ever, this condition shuts dow n the I 2C bus. betw een the master and slave #1. Figure 7. Bus Isolation

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications TA = –40°C to +85°C. Symbol Parameter Condition VCCA (V) VCCB (V) Min. Max. Unit VIHA High Level Input Voltage A V VIHB High Level Input Voltage B Data Inputs B VILA Low Level Input Voltage A V VCCA VILB Low Level Input VOL Low Level Output Voltage VIL = 0.15 V 4 V IOL = 6 mA IL Input Leakage Current Control Input OE, IOFF Pow er Off Leakage Current An VIN or VO = 0 V to 5.5 V 0 5.50 ±2.0 µA Bn VIN or VO = 0 V to 5.5 V 5.50 0 ±2.0 IOZ 3-State Output Leakage(6) An, Bn VO = 0 V to 5.5 V, OE = VIL 5.50 5.50 ± 2.0 µA An VO = 0 V to 5.5 V, OE = Don’t Care 5.50 0 ± 2.0 Bn VO = 0 V to 5.5 V, OE = Don’t Care 0 5.50 ± 2.0 ICCA/B Quiescent Supply Current (7,8) ICCZ Quiescent Supply Current(7) VIN = VCCI or GND, IO = 0, ICCA Quiescent Supply Current(6) VIN = 5.5 V or GND, IO = 0, OE = Don’t Care, Bn to An 0 1.65–5.50 –2.0 µA 1.65–5.50 0 2.0 ICCB Quiescent Supply Current (6) VIN = 5.5 V or GND, IO = 0, OE = Don’t Care, An to Bn 1.65–5.50 0 –2.0 µA 0 1.65–5.50 2.0 N otes: 5. This table contains the output voltage for static conditions. Dynamic dri ve specifications are given in Dynamic Output Electrical Characteristics. 6. “Don’t Care” indicates any valid logic level. 7. VCCI is the VCC associated w ith the input side. 8. Reflects current per supply, V CCA or VCCB.

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications Dynamic Output Electrical Characteristics Output Rise / Fall Time Output load: CL = 50 pF, RPU = 2.2 kΩ, push / pull driver, and T A = -40°C to +85°C. Symbol Parameter VCCO (10) Typ. Typ. Typ. Typ. trise Output Rise Time; A Port, B Por t(11) 3 4 5 7 ns tfall Output Fall Time; A Por t, B Por t(12) 1 1 1 1 ns N otes: 9. Output rise and fall times guaranteed by design simulation and characterization; not production tested. 10. VCCO is the VCC associated w ith the output side. 11. See Figure 12. 12. See Figure 13. Maximum Data Rate(13) Output load: CL = 50 pF, RPU = 2.2 kΩ, push / pull driver, and T A = -40°C to +85°C. VCCA Direction VCCB Min. Min. Min. Min. 4.5 V to 5.5 V A to B 37 26 19 10 MHz B to A 37 36 35 32 3.0 V to 3.6 V A to B 36 25 18 10 MHz B to A 25 25 25 24 2.3 V to 2.7 V A to B 35 25 18 10 MHz B to A 18 18 18 17 1.65 V to 1.95 V A to B 32 24 17 10 MHz B to A 10 10 10 10 Note : 13. F-toggle guaranteed by design simulation; not production tested.

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications AC Characteristics Output Load: CL = 50 pF, RPU = 2.2 kΩ, and TA = -40°C to +85°C. Symbol Parameter VCCB VCCA = 4.5 to 5.5 V tPLH A to B 1 3 1 3 1 3 1 3 ns B to A 1 3 2 4 3 5 4 7 tPHL A to B 2 4 3 5 4 6 5 7 ns B to A 2 4 2 5 2 6 5 7 tPZL OE to A 4 5 6 10 5 9 7 15 ns OE to B 3 5 4 7 5 8 10 15 tPLZ OE to A 65 100 65 105 65 105 65 105 ns OE to B 5 9 6 10 7 12 9 16 VCCA = 3.0 to 3.6 V tPZL tPLZ OE to A 100 115 100 115 100 115 100 115 ns OE to B 5 10 4 8 5 10 9 15 VCCA = 2.3 to 2.7 V tPZL tPLZ OE to A 100 115 100 115 100 115 100 115 ns OE to B 65 110 65 110 65 115 12 25 VCCA = 1.65 to 1.95 V tPLH A to B 4 7 4 7 5 8 5 10 tPHL A to B 5 8 3 7 3 7 3 7 ns B to A 4 8 3 7 3 7 3 7 tPZL OE to A 11 15 11 14 14 28 14 23 ns OE to B 6 14 6 12 6 12 9 16 tPLZ OE to A 75 115 75 115 75 115 75 115 ns OE to B 75 115 75 115 75 115 75 115 Note : 14. Skew is the variation of propagation delay betw een output signals and applies only to output signals on the sam e por t (A n or Bn) and sw itching w ith the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 15). Skew is guaranteed, but not tested.

Figure 8. AC Test Circuit Table 1. Propagation Delay Table Table 2. AC Load Table

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications 8-Lead Ultrathin MLP Product-Specific Dimensions Symbol from JEDEC MO-220 Description NOM Value A Overall Height 0.55 A1 PKG Standoff 0.012 A3 Lead Thickness 0.15 b Lead Width 0.2 D Body Length (X) 1.4 E Body Width (Y) 1.2 L Lead Length 0.3 e Lead Pitch 0.4 Package drawings are provided as a service to custom ers considering ON Sem iconductor com ponents. Drawings m ay change in any m anner without notice. Please note the revision and/or date on the drawing and contact an ON Sem iconductor representativ e to verify or obtain the m ost recent revision. Package specifications do not expand the terms of ON Semi conductor’s worldwide terms and conditions, specifically the warranty therein, which covers ON Semi conductor products.

w ww.onsemi.com FXMA2102 — Dual-Supply, 2-Bit Voltage Translator / Buffer / Repeater / Isolator for I2C Applications Physical Dimensions F igure 16. 8-Lead MicroPak ™, 1.6 mm W ide P ackage drawings are provided as a service to custom ers considering ON Sem iconductor com ponents. Drawings m ay change in any m anner without notice. Please note the revision and/or date on the drawing and contact an ON Sem iconductor representativ e to verify or obtain the m ost recent revision. Package specifications do not expand the terms of ON Semi conductor’s worldwide terms and conditions, specifically the warranty therein, which covers ON Semi conductor products. C SEATING PLANE 0.05 C SIDE VIEW 0.05 C A B 1.60 1.60 0.05 C TOP VIEWPIN#1 IDENT NOTES: A. ACKAGE CONFORMS TO JEDEC MO−255 VARIATION UAAD. B. DIMENSION ARE IN MILLIMETERS. C. DIMENSION AND TOLERANCES PER ASME Y14.5M, 2009. D. LAND ATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN. 0.025±0.025 1 32 567 8 0.30±0.05 (0.15) (0.20) 0.30±0.05 0.05 C 0.50±0.05 BOTTOM VIEW 1.60±0.05 1.60±0.05 1.00±0.05 0.30±0.05 (7X)

0.10 C A B

0.05 C (0.20)3X (0.09) DETAIL A DETAIL A SCALE : 2X (0.10) RECOMMENDED LAND PATTERN 1.60 0.45 (2X) 0.40 (6X) 1.61 0.25 (8X) 0.50

Figure 17. 8-Lead Ultrathin MLP, 1.2 mm x 1.4 mm

0.05 CBOTTOM VIEW

B. D IMENSIONS ARE IN MILLIMETERS. EXISTING INDUSTRY LAND PATTERN. E. D RAWING FILENAME: MKT-UMLP08Arev4.

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