FXLA102 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
Bi-Directional Interface betw een Tw o Levels: from 1.1 V to 3. 6V Fully Configurable: Inputs and Outputs Track V CC Level Non-Preferential Pow er-Up; Either V CC May Be Pow ered Up First Outputs Sw itch to 3-State if Either V CC is at GND Pow er-Off Protection Bus-Hold on Data Inputs Eliminates the N eed for Pull-Up Resistors; Do Not Use Pull-Up Resistors on A or B Ports Control Input ( /OE) Referenced to V CCA Voltage Packaged in MicroPak TM 8 (1.6 mm x 1.6 mm) Direction Control Not Necessary 100 Mbps Throughput w hen Translating Betw een 1.8 V and 2.5 V ESD Protection Exceeds: - 15 kV HBM ((B Port I/O to GND) per JESD22- A114 & Mil Std 883e 3015.7) - 8 kV HBM ((A Port I/O to GND) per JESD22-A114 & Mil Std 883e 3015.7) - 2 kV CDM (per ESD STM 5.3)
Description
The FXLA102 is a configurable dual -voltage supply translator for both uni -directional and bi -directional voltage translation betw een tw o logic levels. The device allow s translation betw een voltages as high as 3.6 V to as low as 1.1 V. The A port tracks the V CCA level and the B port tracks the V CCB level. This allow s for bi-directional voltage translation over a variety of voltage levels: The device remains in three-state as long as either VCC=0 V, allow ing either VCC to be pow ered up first. Internal pow er-dow n control circuits place the device in 3-state if either V CC is removed. The /OE input, w hen HIGH, disable s both the A and B ports by placing them in a 3 -state condition. The /OE input is supplied by V CCA. The FXLA102 supports bi -directional translation w ithout the need for a direction control pin. The tw o ports of the device have a uto-direction sense capabili ty. Either port may sense an input signal and transfer it as an output signal to the other port.
Ordering Information
FXLA102L8X XF -40 to 85°C 8-Lead MicroPak TM 1.6 mm x 1.6 mm Package 5 K Units Tape and Reel
Figure 1. Pin Configuration (Top Through View)
1 VCCA A-Side Pow er Supply
2 A0 A Side Input or 3 -State Output
3 A1 A Side Input or 3 -State Output
4 GND Ground
6 B1 B Side Input or 3 -State Output
7 B0 B Side Input or 3 -State Output
8 VCCB B Side Pow er Supply
Figure 2. Functional Diagram
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Conditions Min. Max. Unit VCC Supply Voltage VCCA -0.5 4.6 V VCCB -0.5 4.6 VI DC Input Voltage I/O Ports A and B -0.5 4.6 V Control Input ( /OE) -0.5 4.6 VO Output Voltage(2) Output 3-State -0.5 4.6 V Output Active (A n) -0.5 VCCA +0.5 Output Active ( Bn) -0.5 VCCB +0.5 IIK DC Input Diode Current VI<0V -50 mA IOK DC Output Diode Current VO<0V -50 mA VO>VCC +50 IOH/IOL DC Output Source/Sink Current -50 +50 mA ICC DC VCC or Ground Current (per Supply Pin) ±100 mA TSTG Storage Temperature Range -65 +150 °C PD Pow er Dissipation 5 mW ESD Human Body Model, JESD22-A114 B Port I/O to GND 15 kV A Port I/O to GND 8 Charged Device Model, JESD22-C101 2 Notes: 1. IO absolute maximum ratings must be observed. 2. All unused inputs and input/outputs must be held at V CCi or GND. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Conditions Min. Max. Unit VCC Pow er Supply Operating V CCA or VCCB 1.1 3.6 V VIN Input Voltage Ports A and B 0 3.6 V Control Input ( /OE) 0 VCCA V Dynamic Output Current IOH/IOL VCC = 3.0 V to 3.6 V ±12 mA VCC = 2.3 V to 2.7 V ±8 VCC = 1.65 V to 1.95 V ±5 VCC = 1.40 V to 1.65 V ±3 VCC =1.1 V to 1.4 V ±2 Static Output Current VCC =1.1 V to 3.6 V ±4 µA TA Operating Temperature, Free Air -40 +85 °C dt/dV Maximum Input Edge Rate VCCA/B = 1.1 to 3.6 V 10 ns/V JA Thermal Resistance 280 °C/W
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator Power-Up/Power-Down Sequence FXL translators offer an advantage in that either V CC may be pow ered up first. This benefit derives from the chip design. When either V CC is at 0 V, outputs are in a high-impedance state. The control input ( /OE) is designed to track the V CCA supply. A pull -up resistor tying /OE to V CCA should be used to ensure that bus contention, excessive curr ents, or oscillatio ns do not occur during pow er -up or pow er-dow n. The size of the pull-up resistor is based upon the current -sinking capability of the device driving the /OE pin. The recommended pow er -up sequence is: 1. Apply pow er to the first VCC. 2. Apply pow er to the second VCC. 3. Drive the /OE input LOW to enable the device. The recommended pow er -dow n sequence is: 1. Drive /OE input HIGH to disable the device. 2. Remove pow er from either VCC. 3. Remove pow er from other VCC. Pull-Up/Pull-Down Resistors Do not use p ull-up or pull -dow n resistors. This device has bus -hold circuits: pull -up or pull -dow n resistors are not recommended because they interfere w ith the output state. The current through these resistors may exceed the hold drive, I I(HOLD) and/or I I(OD) bus-hold currents. The bus -hold feature eliminates the need for extra resistors.
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator TA=-40 to 85°C. Symbol Parameter Conditions VCCA (V) VCCB (V) Min. Typ. Max. Units VIHA High-Level Input Voltage Data Inputs An Control Pin /OE 2.70 to 3.60 1.10 to 3.60 2.00 V 2.30 to 2.70 1.60 1.65 to 2.30 .65xVCCA 1.40 to 1.65 .65xVCCA 1.10 to 1.40 .90xVCCA VIHB Data Inputs Bn 1.10 to 3.60 2.70 to 3.60 2.00 V 2.30 to 2.70 1.60 1.65 to 2.30 .65xVCCB 1.40 to 1.65 .65xVCCB 1.10 to 1.40 .90xVCCB VILA Low -Level Input Voltage Data Inputs An Control Pin /OE 2.70 to 3.60 1.10 to 3.60 .80 V 2.30 to 2.70 .70 1.65 to 2.30 .35xVCCA 1.40 to 1.65 .35xVCCA 1.10 to 1.40 .10xVCCA VILB Data Inputs Bn 1.10 to 3.60 2.70 to 3.60 .80 V 2.30 to 2.70 .70 1.65 to 2.30 .35xVCCB 1.40 to 1.65 .35xVCCB 1.10 to 1.40 .10xVCCB VOHA High-Level Output Voltage(3) V VOLA Low -Level Output Voltage(3) V II(HOLD) Bus-Hold Input Minimum Drive Current VIN=0.80 V 3.00 3.00 75.0 µA VIN=2.00 V 3.00 3.00 -75.0 VIN=0.70 V 2.30 2.30 45.0 VIN=1.60 V 2.30 2.30 -45.0 VIN=0.57 V 1.65 1.65 25.0 VIN=1.07 V 1.65 1.65 -25.0 VIN=0.49 V 1.40 1.40 11.0 VIN=0.91 V 1.40 1.40 -11.0 VIN=0.11 V 1.10 1.10 4.0 VIN=0.99 V 1.10 1.10 -4.0 Continued on following page…
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator TA=-40 to 85°C. Symbol Parameter Conditions VCCA (V) VCCB (V) Min. Max. Units II(ODH) Bus-Hold Input Overdrive High Current(4) Data Inputs An, Bn 3.60 3.60 450.00 µA 2.70 2.70 300.00 1.95 1.95 200.00 1.60 1.60 120.00 1.40 1.40 80.00 II(ODL) Bus-Hold Input Overdrive Low Current(5) Data Inputs An, Bn 3.60 3.60 -450.00 µA 2.70 2.70 -300.00 1.95 1.95 -200.00 1.60 1.60 -120.00 1.40 1.40 -80.00 II Input Leakage Current Control Inputs /OE, VI=VCCA or GND 1.10 to 3.60 3.60 ±1.0 µA IOFF Pow er-Off Leakage Current An Port VO=0V to 3.6 V 0 3.6 ±2.0 µA Bn Port VO=0V to 3.6 V 3.60 0 ±2.0 IOZ 3-State Output Leakage Data Outputs An, Bn VO=0 V or 3.6 V, /OE=VIH 3.60 3.60 ±5.0 µA Data Outputs Data Outputs An VO=0 V or
3.6 V, /OE=GND
3.60 0 ±5.0 Data Outputs Bn VO=0 V or 3.6 V, /OE=GND 0 3.60 ±5.0 ICCA/B Quiescent Supply Current(6, 7) VI=VCCI or GND; IO=0, ICCZ VI=VCCI or GND; IO=0, ICCA Quiescent Supply Current VI=VCCB or GND; IO=0 B-to-A Direction, /OE=GND 0 1.10 to 3.60 -10.0 µA 1.10 to 3.60 0 10.0 ICCB VI=VCCA or GND; IO=0, A-to-B Direction, /OE=GND 1.10 to 3.60 0 -10.0 µA 0 1.10 to 3.60 10.0 Notes: 3. This is the output voltage for static conditions. Dynamic drive specifications are given in the Dynamic Output Electrical Characteristics table. 4. An external drive must source at least the specified current to sw itch LOW-to-HIGH. 5. An external drive must source at least the specified current to sw itch HIGH-to-LOW. 6. VCCI is the VCC associated w ith the input side. 7. Reflects current per supply, V CCA or VCCB.
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator Dynamic Output Electrical Characteristic A Port (An) Output Load: CL=15 pF, RL M (CI/O=4 pF), TA=-40 to 85°C Symbol Parameter VCCA=3.0 V to 3.6 V VCCA=2.3 V to 2.7 V VCCA=1.65 V to 1.95 V VCCA=1.4 V to 1.6 V VCCA=1.1 V to 1.3 V Units trise Output Rise tfall Output Fall Time A Port(10) IOHD Dynamic Output Current High(9) IOLD Dynamic Output Current Low (10) B Port (Bn) Output Load: CL=15 pF, RL M (CI/O=5 pF), TA=-40 to 85°C Symbol Parameter VCCB=3.0 V to 3.6 V VCCB=2.3 V to 2.7 V VCCB=1.65 V to 1.95 V VCCB=1.4 V to 1.6 V VCCB=1.1 V to 1.3 V Units trise Output Rise tfall Output Fall Time B Port(10) IOHD Dynamic Output Current High(9) IOLD Dynamic Output Current Low (10) Notes: 8. Dynamic output characteristics are guaranteed , but not tested. 9. See Figure 7. 10. See Figure 8.
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator AC Characteristics VCCA = 3.0 V to 3.6 V, TA=-40 to 85°C Symbol Parameter VCCB=3.0 V to 3.6 V VCCB=2.3 V to 2.7 V VCCB=1.65 V to 1.95 V VCCB=1.4 V to 1.6 V VCCB=1.1 V to 1.3 V Units tPLH,tPHL tPZL,tPZH /OE to A, tSKEW A Port, VCCA = 2.3 V to 2.7 V, TA=-40 to 85°C Symbol Parameter VCCB=3.0 V to 3.6 V VCCB=2.3 V to 2.7 V VCCB=1.65 V to 1.95 V VCCB=1.4 V to 1.6 V VCCB=1.1 V to 1.3 V Units tPLH,tPHL tPZL,tPZH /OE to A, tSKEW A Port, VCCA = 1.65 V to 1.95 V, TA=-40 to 85°C Symbol Parameter VCCB=3.0 V to 3.6 V VCCB=2.3 V to 2.7 V VCCB=1.65 V to 1.95 V VCCB=1.4 V to 1.6 V VCCB=1.1 V to 1.3 V Units tPLH,tPHL tPZL,tPZH /OE to A, tSKEW A Port, Note: 11. Skew is the variation of propagation delay betw een output signals and applies only to output signals on the same port (An or Bn) and sw itching w ith the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 10). Skew is guaranteed, but not tested.
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator AC Characteristics (Continued) VCCA = 1.4 V to 1.6 V, TA=-40 to 85°C Symbol Parameter VCCB=3.0 V to 3.6 V VCCB=2.3 V to 2.7 V VCCB=1.65 V to 1.95 V VCCB=1.4 V to 1.6 V VCCB=1.1 V to 1.3 V Units tPLH,tPHL tPZL,tPZH /OE to A, tSKEW A Port, VCCA = 1.1 V to 1.3 V, TA=-40 to 85°C Symbol Parameter VCCB=3.0 V to 3.6 V VCCB=2.3 V to 2.7 V VCCB=1.65 V to 1.95 V VCCB=1.4 V to 1.6 V VCCB=1.1 V to 1.3 V Units tPLH,tPHL Note: 12. Skew is the variation of propagation delay betw een output signals and applies only to output signals on the same port (An or Bn) and sw itching w ith the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 10). Skew is guaranteed, but not tested.
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator Maximum Data Rate TA=-40 to 85°C. VCCA VCCB=3.0 V to 3.6 V VCCB=2.3 V to 2.7 V VCCB=1.65 V to 1.95 V VCCB=1.4 V to 1.6 V VCCB=1.1V to
1.3 V Units
VCCA=3.00 V to 3.60 V 140 120 100 80 40 Mbps VCCA=2.30 V to 2.70 V 120 120 100 80 40 Mbps VCCA=1.65 V to 1.95 V 100 100 80 60 40 Mbps VCCA=1.40 V to 1.60 V 80 80 60 60 40 Mbps VCCA=1.10 V to 1.30 V 40 40 40 40 40 Mbps Notes: 13. Maximum data rate is guaranteed, but not tested. 14. Maximum data rate is specified in megabits per second (see Figure 9). It is equivalent to tw o times the F-toggle frequency, specified in megahertz. For example, 100 Mbps is equivalent to 50 MHz. Capacitance Symbol Parameter Conditions TA=+25°C Typical Units CIN Input Capacitance Control Pin ( /OE) VCCA=VCCB=GND 3 pF CI/O Input / Output Capacitance An VCCA=VCCB=3.3 V, /OE=VCCA pF Bn 5 Cpd Pow er Dissipation Capacitance VCCA=VCCB=3.3 V, VI=0 V or VCC, f=10 MHz 25 pF
www.onsemi.com FXLA102 — Low-Voltage Dual-Supply 2-Bit Voltage Translator I/O Architecture Benefit The FXLA102 I/O architecture benefits the end user, beyond level translation, in the follow ing three w ays: Auto Direction w ithout an external direction pin. Drive Capacitive Loads . Automatically shifts to a higher current drive mode onl y during “Dynamic Mode” or HL / LH transitions. Lower Power Consumption . Automatically shifts to low-pow er mode during “Static Mode” (no transitions), low ering pow er consumption. The FXLA102 does not require a direction pin. Instead, the I/O architectur e detects input transitions on both side and automatically transfers the data to the corresponding output. For example, for a given channel, if both A and B side are at a static LOW, the direction has been established as A B, and a LH transition occurs on the B port; the FXLA102 internal I/O architecture automatically changes direction from A B to B A. During HL / LH transitions, or “Dynamic Mode,” a strong output driver drives the output channel in parallel w ith a w eak output driver. After a typical delay of approximately 10 ns – 50 ns, the strong driver is turned off, leaving the w eak driver enabled for holding the logic state of the channel. This w eak driver is called the “bus hold.” “Static Mode” is w hen only the bus hold drives the channel. The bus hold can be over ridden in the event of a direction change. The strong driver allow s the FXLA102 to quickly charge and discharge capacitive transmission lines during dynamic mode. Static mode conserves pow er, w here ICC is typically < 5 µA. Bus Hold Minimum Drive Current Specifies the minimum amount of current the bus hold driver can source/sink. The bus hold minimum drive current ( IIHOLD) is V CC dependent and guaranteed in the output state in a static mode, but that can be overridden w hen an input data transition occurs. Bus Hold Input Overdrive Drive Current Specifies the minimum amount of current required (by an external device) to overdrive the bus hold in the event of a direction change. The bus hold overdrive (IIODH, IIODL) is V CC dependent and guaranteed in the DC Electrical tables. Dynamic Output Current The strength of the output dri ver during LH / HL transitions is referenced on page 8, Dynamic Output Electrical Characteristics, I OHD, and IOLD.
Figure 11. 8-Lead, MicroPak™, 1.6mm Wide conditions, specifically the warranty therein, which covers ON Sem iconductor products.
- DRAWING CONFORMS TO ASME Y.14M-1994
- DIMENSIONS ARE IN MILLIMETERS
- PACKAGE CONFORMS TO JEDEC MO-255 VARIATION UAAD
- PIN 1 FLAG, END OF PACKAGE OFFSET
0.10 C A B
0.55 MAX
- DRAWING FILE NAME: MKT-MAC08AREV4
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