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Technical content
Features
Built-in Avalanche Rugged SenseFET: 650 V Fixed Operating Frequency: 50 kHz No-Load Power Consumption: < 25 mW at 230 VAC with External Bias; <120 mW at 230 VAC without External Bias No Need for Auxiliary Bias Winding Frequency Modulation for Attenuating EMI Pulse-by-Pulse Current Limiting Ultra-Low Operating Current: 250 µA Built-in Soft-Start and Startup Circuit Adjustable Peak Current Limit Built-in Transconductance (Error) Amplifier Various Protections: Overload Protection (OLP), Over-Voltage Protection (OVP), Feedback Open Loop Protection (FB_OLP), AOCP (Abnormal Over- Current Protection), Thermal Shutdown (TSD) Fixed 650 ms Restart Time for Safe Auto-Restart Mode of All Protections
Applications
SMPS for Home Appliances and Industrial SMPS for Auxiliary Power
Description
The FSL306LR integrate Pulse Width Modulator (PWM) and SenseFET is specifically designed for high- performance offline buck, buck-boost, and non-isolation flyback Switched Mode Power Supplies (SMPS) with minimal external components. This device integrates a high-voltage power regulator that enables operation without auxiliary bias winding. An internal transconductance amplifier reduces external components for the feedback compensation circuit. The integrated PWM controller includes: 10 V regulator for no external bias circuit, Under-Voltage Lockout (UVLO), Leading-Edge Blanking (LEB), an optimized gate turn-on / turn-off driver, EMI attenuator, Thermal Shutdown (TSD), temperat ure-compensated precision current sources for loop compensation, and fault- protection circuitry. Protections include: Overload Protection (OLP), Over-Voltage Protection (OVP), Feedback Open Loop Protection (FB_OLP), and Abnormal Over-Current Protection (AOCP). FSL306LR offers good soft-start performance during startup. The internal high-voltage startup switch and the Burst- Mode operation with very lo w operating current reduce the power loss in Standby Mode. As the result, it is possible to reach power loss of 120 mW without external bias and 25 mW with external bias when input voltage is 230 V AC.
Ordering Information
Typical Output Power(1) Current Limit RDS(ON),MAX
85 VAC ~ 265 VAC
& Open Frame(2) Buck Application(3) Flyback Application FSL306LRN -40°C ~125°C 7-DIP Rail
0.45 A 18 Ω 3 W 7 W
FSL306LRLX 7-LSOP Tape & Reel Notes: 1. The junction temperature can lim it the maximum output power. 2. Maximum practical continuous power in an open-frame design at 50°C ambient. 3. Based on 15 V output voltage condition. Out put voltage can limit the maximum output power.
Figure 4. Pin Configuration 1 GND Ground. SenseFET source terminal on the primary side and internal control ground.
2 V CC
3 I LIMIT
and any external resistor to GND on this pin to determine the peak current limit.
4 V FB
reference voltage and the output voltage divided by external resistors. placed between the VCOMP and GND pins to achieve stability and good dynamic performance. that, the internal high-voltage regulator turns on and off regularly to maintain VCC at 10 V.
© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL306LRN / FSL306LRL • Rev.1.0.3 4 FSL306LR — Green Mode Fairchild Buck Switch Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dam age the device. The device may not function or be operable above the recommended operating conditions and stressi ng the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25 °C, unless otherwise specified. Symbol Parameter Min. Max. Unit VDS Drain Pin Voltage -0.3 650.0 V VCC Supply Voltage -0.3 26.0 V VCOMP V COMP Pin Voltage -0.3 Internally Clamped Voltage (4) V VFB Feedback Voltage -0.3 12.0 V ILIMIT Current Limit Pin Voltage -0.3 12.0 V IDM Drain Current Pulsed (5) 2.8 A EAS Single Pulsed Avalanche Energy (6) 10.5 mJ PD Total Power Dissipation 1.25 W TJ Operating Junction Temperature(7) -40 125 °C Maximum Junction Temperature 150 °C TSTG Storage Temperature -55 150 °C Notes: 4. V COMP is clamped by internal clamping diode (11 V, ICLAMP_MAX < 100 μA) 5. Repetitive rating: pulse width is limited by maximum junction temperature. 6. L=10 mH, starting T J=25C. 7. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics. Thermal Impedance TA=25°C unless otherwise specified. Symbol Parameter Value Unit θJA Junction-to-Ambient Thermal Impedance (8) 100 °C/W Note: 8. JEDEC recommended environment, JESD51-2, and test board, JESD51-3, with minimum land pattern. ESD Capability Symbol Parameter Value Unit ESD Human Body Model, JESD22-A114(9) 4 kV Charged Device Model, JESD22-C101(9) 2 Note: 9. Meets JEDEC standards JESD 22-A114 and JESD 22-C101.
© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL306LRN / FSL306LRL • Rev.1.0.3 5 FSL306LR — Green Mode Fairchild Buck Switch
Electrical Characteristics
TA = 25C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit SenseFET Section BVDSS Drain Source Breakdown Voltage V CC = 0 V, ID = 250 µA 650 V IDSS Zero Gate Voltage Drain Current V DS = 520 V, TA = 125°C 250 µA RDS(ON) Drain-Source On-State Resistance V GS = 10 V, ID = 0.3 A 12 18 Ω CISS Input Capacitances V GS = 0 V, VDS = 25 V, f = 1 MHz 97 pF COSS Output Capacitance V GS = 0 V, VDS = 25 V, f = 1 MHz 13.6 pF CRSS Reverse Transfer Capacitance V GS = 0 V, VDS = 25 V, f = 1 MHz 2.4 pF tr Rise Time V DD = 325 V, ID = 0.7 A 7.6 ns tf Fall Time V DD = 325 V, ID = 0.7 A 26.1 ns Control Section fOSC Switching Frequency V COMP = 2.5 V 45 50 55 kHz fM Frequency Modulation (10) V COMP = 2.5 V, Randomly ±3 kHz VSTART UVLO Threshold Voltage VCOMP = 0 V, VCC Sweep 7.2 8.0 8.8 V VSTOP After Turn On 6.3 7.0 7.7 V IPK Current Limit Source Current V COMP = 2.5 V 35 50 65 µA tSS Soft-Start Time V COMP = 2.5 V 7 10 13 ms Burst Mode Section VBURH Burst-mode HIGH Threshold Voltage V CC = 15 V, VCOMP Increase 0.58 0.65 0.72 V VBURL Burst-mode LOW Threshold Voltage V CC = 15 V, VCOMP Decrease 0.52 0.59 0.66 V HYSBUR Burst-mode Hysteresis 60 mV Protection Section ILIM Peak Current Limit V COMP = 2.5 V, di/dt = 300 mA/µs, 0.40 0.45 0.50 A tCLD Current Limit Delay (10) 200 ns VOLP Overload Protection V COMP Increase 2.7 3.0 3.3 V VAOCP Abnormal Over-Current Protection (10) VCOMP = 2.5 V 0.8 1.0 1.2 V tLEB Leading-Edge Blanking Time (10) 200 ns VFB_OLP FB Open Loop Protection V FB Decrease 0.4 0.5 0.6 V VOVP Over-Voltage Protection V CC Increase 23.0 24.5 26.0 V TSD Thermal Shutdown Temperature (10) 125 135 150 °C HYSTSD TSD Hysteresis Temperature (10) 60 °C tDELAY Over Load Protection Delay (10) V COMP > 3 V 40 ms tRESTART Restart Time After Protection (10) 650 ms Transconductance Amplifier Section Gm Transconductance of Error Amplifier 190 240 290 µmho VREF Voltage Feedback Reference 2.45 2.50 2.55 V IEA.SR Output Sourcing Current V FB = VREF - 0.05 V -12 µA IEA.SK Output Sink Current V FB = VREF + 0.05 V 12 µA Continued on the following page…
© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL306LRN / FSL306LRL • Rev.1.0.3 6 FSL306LR — Green Mode Fairchild Buck Switch TA = 25C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit High-Voltage Regulator Section VHVREG HV Regulator Voltage V COMP = 0 V, VDRAIN = 40 V 9 10 11 V Total Device Section IOP1 Operating Supply Current (Control Part Only, without Switching) 0 V < VCOMP < VBURL 0.25 0.35 mA IOP2 Operating Supply Current (While Switching) VBURL < VCOMP < VOLP 0.8 1.3 mA ICH Startup Charging Current V CC = 0 V, VDRAIN > 40 V 6 mA ISTART Startup Current V CC = Before VSTART, VCOMP = 0 V 120 155 µA VDRAIN Minimum Drain Supply Voltage V CC = VCOMP = 0 V, VDRAIN Increase 35 V Notes: 10. Though guaranteed by design, they are not 100% tested in production.
- Startup and High-Voltage Regulator
- This internal high-volta ge current source is enabled
disabled when the external bias is higher than 10 V. Figure 17. Startup and HVREG Block FSL306LR have random frequency fluctuation functions. satisfy world-wide EMI requirements. Figure 18. Frequency Fluctuation Waveform recommended on the VCOMP pin to control output voltage. Figure 19. Pulse Width Modulation (PWM) Circuit
3.1 Transconductance Amplifier (gm Amplifier)
2.5 V; the transconductance amplifier sinks the current
330 pF are used for CC1, RC1, and CC2, respectively. Figure 20. Characteristics of gm Amplifier
3.2 Pulse-by-pulse Current Limit
- Assuming that 50 µA current source flows only
voltage of the cathode of D2 is clamped at this voltage.
3.3 Leading Edge Blanking (LEB)
switching is terminated and the SenseFET remains off. passive and active components during Auto-Restart. SenseFET until the fault condition is eliminated.
4.1 Overload Protection (OLP)
O) decreases below it s rated voltage. terminated, as shown in Figure 22. Figure 21. Overload Protection Internal Circuit Figure 22. Overload Protection (OLP) Waveform
4.2 Abnormal Over-Current Protection (AOCP)
can inhibit mis-triggering due to the leading-edge spike. Figure 23. AOCP Circuit Figure 24. AOCP Waveform
4.3 Thermal Shutdown (TSD)
are restarted after the temperature decreases to 60°C.
4.4 Over-Voltage Protection (OVP)
VCC should be designed below 24.5 V (see Figure 25). Figure 25. Over Voltage Protection Circuit
4.5 Feedback Open Loop Protection (FB_OLP)
situation, but V FB starts to drop to IC ground level. higher than rated voltage before OLP or OVP trigger. startup, this function is disabled during soft-start time. Figure 26. Feedback Open-loop Protection Circuit conditions for transformers, inductors, and capacitors. saturation and reduces stress on the secondary diode. Figure 27. Internal Soft-Start drop at a rate dependent on the standby current load. Figure 28. Burst Mode Operation
12 V (150 mA)
are placed for good EMI performance. Figure 31. Schematic Table 1. Bill of Materials
1 A / 1000 V General-Purpose Rectifier
1 A / 600 V Ultra-Fast Recovery Rectifier
0.1 A / 5 V Positive Voltage Regulator
Figure 32. 7-Lead, Molded Dual Inline Package (MDIP), JEDEC MS-001, .300 inch Wide warranty therein, which covers Fairchild products.
0.508 MIN
B. DIMENSIONS ARE IN MILLIMETERS. BA EXCEPT FOR NUMBER OF LEADS. MOLD FLASH AND TIE BAR EXTRUSIONS.
Figure 33. 7-Lead, .300" Wide, Surface Mount Package (LSOP) warranty therein, which covers Fairchild products.
© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL306LRN / FSL306LRL • Rev.1.0.3 16 FSL306LR — Green Mode Fairchild Buck Switch