FSL206MR

FSL206MR ONSEMI | Alldatasheet

Document overview

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Technical content

Features

• Internal Avalanche−Rugged SENSEFET 650 V
• Precision Fixed Operating Frequency: 67 kHz
• No−Load < 150 mW at 265 Vac without Bias Winding; <25 mW with Bias Winding for FSL206MR, < 30 mW with Bias Winding for FSL206MRBN
• No Need for Auxiliary Bias Winding
• Frequency Modulation for Attenuating EMI
• Line Under−V oltage Protection (LUVP)
• Pulse−by−Pulse Current Limiting
• Low Under−V oltage Lockout (UVLO)
• Ultra−Low Operating Current: 300 /C0109A
• Built−In Soft−Start and Startup Circuit
• Various Protections: Overload Protection (OLP), Over−V oltage Protection (OVP), Thermal Shutdown (TSD), Abnormal Over−Current Protection (AOCP) Auto−Restart Mode for All Protections

Applications

• SMPS for STB, DVD & DVCD Players
• SMPS for Auxiliary Power Related Resources
• https://www.onsemi.com/PowerSolutions/home.do
• https://www.onsemi.com/pub/Collateral/AN−4137.pdf.pdf
• https://www.onsemi.com/pub/Collateral/AN−4141.pdf.pdf
• https://www.onsemi.com/pub/Collateral/AN−4150.pdf.pdf www.onsemi.com PDIP8 9.42x6.38, 2.54P CASE 646CM MARKING DIAGRAM $Y = ON Semiconductor Logo &E = Designated Space &Z = Assembly Plant Code &2 = 2 −Digit Date code format &K = 2 −Digits Lot Run Traceability Code FSL206MR = Specific Device Code Data See detailed ordering and shipping information on page 2 of this data sheet.

ORDERING INFORMATION

PDIP8 9.59x6.6, 2.54P CASE 646CN $Y&Z&2&K L206MRB $Y = ON Semiconductor Logo &Z = Assembly Plant Code &2 = 2 −Digit Date code format &K = 2 −Digits Lot Run Traceability Code L206MRB = Specific Device Code Data

www.onsemi.com Temperature Top Mark PKG Packing Method Output Power Table (Note 1) Current Limit RDS(ON),MAX

230 Vac

/C004315% (Note 2) 85 ∼265 Vac Open Frame (Note 3) Open Frame (Note 3) FSL206MRN −40 ∼ 115°C FSL206MR 8−DIP Tube 0.6 A 19 /C0087 12 W 7 W FSL206MRBN L206MRB FSL206MRL FSL206MR 8−LSOP Tube FSL206MRLX Tape & Reel 1. The junction temperature can limit the maximum output power. 2. 230 Vac or 100/115 Vac with doubler. The maximum power with CCM operation. 3. Maximum practical continuous power in an open −frame design at 50°C ambient. APPLICATION DIAGRAM Figure 1. Typical Application Figure 2. Internal Block Diagram

Figure 3. Pin Configuration 1 GND Ground. SENSEFET source terminal on the primary side and internal control ground. the internal startup switch opens and device power is supplied via the auxiliary transformer winding. conditions, but allows the protection mechanism to operate under true overload conditions. range. If this pin is not used, connect to ground. 650 V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance.

www.onsemi.com ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Symbol Parameter Min Max Unit VSTR VSTR Pin Voltage −0.3 650 V VDS Drain Pin Voltage −0.3 650 V VCC Supply Voltage − 26 V VLS LS Pin Voltage − Internally Clamped Voltage (Note 4) V VFB Feedback Voltage Range −0.3 Internally Clamped Voltage (Note 4) V IDM Drain Current Pulsed (Note 5) − 1.5 A EAS Single−Pulsed Avalanche Energy (Note 6) − 11 mJ PD Total Power Dissipation − 1.3 W TJ Operating Junction Temperature −40 +150 °C TA Operating Ambient Temperature −40 +125 °C TSTG Storage Temperature −55 +150 °C ESD Human Body Model, JESD22−A114 − 4 kV Charged Device Model, JESD22−C101 − 2 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 4. V FB is clamped by internal clamping diode (13 V ICLAMP_MAX < 100 /C0109A). After Shutdown, before VCC reaching VSTOP, VSD < VFB < VCC. 5. Repetitive rating: pulse −width limited by maximum junction temperature. 6. L = 21 mH, starting T J = 25°C THERMAL IMPEDANCE (TA = 25°C unless otherwise specified) Symbol Parameter Value Unit /C0113JA Junction−to−Ambient Thermal Impedance (Note 7) 93 °C/W 7. JEDEC recommended environment, JESD51 −2 and test board, JESD51 −10 with minimum land pattern for 8DIP and JESD51 −3 with minimum land pattern for 8LSOP. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Symbol Parameter Test Condition Min Typ Max Unit SENSEFET SECTION BVDSS Drain−Source Breakdown Voltage VCC = 0 V, ID = 250 /C0109A 650 − − V IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V − − 50 /C0109A VDS = 520 V, VGS = 0 V, TA = 125°C (Note 8) − − 250 /C0109A RDS(ON) Drain−Source On−State Resistance (Note 9) VGS = 10 V, ID = 0.3 A − 14 19 /C0087 CISS Input Capacitance VGS = 0 V, VDS = 25 V, f = 1 MHz − 162 − pF COSS Output Capacitance VGS = 0 V, VDS = 25 V, f = 1 MHz − 14.9 − pF CRSS Reverse Transfer Capacitance VGS = 0 V, VDS = 25 V, f = 1 MHz − 2.7 − pF tr Rise Time VDS = 325 V, ID = 0.5 A, RG = 25 /C0087 − 6.1 − ns tf Fall Time VDS = 325 V, ID = 0.5 A, RG = 25 /C0087 − 43.6 − ns CONTROL SECTION fOSC Switching Frequency VFB = 4 V, VCC = 10 V 61 67 73 KHz /C0068fOSC Switching Frequency Variation −25°C < TJ < 85°C − ±5 ±10 % fM Frequency Modulation (Note 8) − ±3 − kHz DMAX Maximum Duty Cycle VFB = 4 V, VCC = 10 V 66 72 78 % DMIN Minimum Duty Ratio VFB = 0 V, VCC = 10 V 0 0 0 %

www.onsemi.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) (continued) Symbol UnitMaxTypMinTest ConditionParameter VSTART UVLO Threshold Voltage VFB = 0 V, VCC Sweep 7 8 9 V VSTOP After Turn−on 6 7 8 V IFB Feedback Source Current VFB = 0, VCC = 10 V 90 110 130 /C0109A tS/S Internal Soft−Start Time VFB = 4 V, VCC = 10 V 10 15 20 ms BURST−MODE SECTION VBURH Burst−Mode HIGH Threshold Voltage VCC = 10 V VFB Increase FSL206MR 0.66 0.83 1.00 V FSL206MRB 0.40 0.50 0.60 V VBURL Burst−Mode LOW Threshold Voltage VCC = 10 V VFB Decrease FSL206MR 0.59 0.74 0.89 V FSL206MRB 0.28 0.35 0.42 V HYSBUR Burst−Mode Hysteresis FSL206MR − 90 − mV FSL206MRB − 150 − mV PROTECTION SECTION ILIM Peak Current Limit VFB = 4 V, di/dt = 300 mA//C0109s, VCC = 10 V 0.54 0.60 0.66 A tCLD Current Limit Delay Time (Note 8) − 100 − ns VSD Shutdown Feedback Voltage VCC = 10 V 4.5 5.0 5.5 V IDELAY Shutdown Delay Current VFB = 4 V 2.1 2.7 3.3 /C0109A tLEB Leading Edge Blanking Time (Note 8) 250 − − ns VAOCP Abnormal Over−Current Protection (Note 8) − 0.7 − V VOVP Over−Voltage Protection VFB = 4 V, VCC Increase 23.0 24.5 26.0 V VLS_OFF Line−Sense Protection On to Off VFB = 3 V, VCC = 10 V, VLS Decrease 1.9 2.0 2.1 V VLS_ON Line−Sense Protection Off to On VFB = 3 V, VCC = 10 V, VLS Increase 1.4 1.5 1.6 V TSD Thermal Shutdown Temperature (Note 8) 125 135 150 °C HYSTSD TSD Hysteresis Temperature (Note 8) − 60 − °C HIGH VOLTAGE REGULATOR SECTION HHVR HV Regulator Voltage VFB = 0 V, VSTR = 40 V − 7.8 − V TOTAL DEVICE SECTION IOP1 Operating Supply Current (Control Part Only, without Switching) VCC = 15 V, 0 V < VFB < VBURL − 0.3 0.5 mA IOP2 Operating Supply Current (Control Part Only, without Switching) VCC = 8 V, 0 V < VFB < VBURL − 0.25 0.45 mA IOP3 Operating Supply Current (Note 8) (While Switching) VCC = 15 V, VBURL < VFB < VSD − − 1.3 mA ICH Startup Charging Current VCC = 0 V, VSTR > 40 V 1.6 1.9 2.4 mA ISTART Startup Current VCC = Before VSTART, VFB = 0 V − 100 150 /C0109A VSTR Minimum VSTR Supply Voltage VCC = VFB = 0 V, VSTR Increase − 26 − V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 8. Though guaranteed by design, it is not 100% tested in production. 9. Pulse test: pulse width = 300 ms, duty cycle = 2%.

Figure 18. Auto−Restart Protection Waveforms protection circuit should be activated to protect the SMPS.

5 V , when the switching operation is terminated, as shown

FB from 2.4 V to 5 V with 2.7 /C0109A current source. Figure 19. Overload Protection (OLP) Figure 20. When the gate turn −on signal is applied to the Figure 20. Abnormal Over−Current Protection designed to be below 24.5 V .

PDIP8 9.42x6.38, 2.54P CASE 646CM ISSUE O DATE 31 JUL 2016

5.08 MAX

0.33 MIN

(0.56) 3.683 3.200 3.60 3.00 2.54 1.65 1.27 7.62 0.560 0.355 9.83 9.00 6.670 6.096 9.957 7.870 0.356 0.200 8.255 7.610 7.62 SIDE VIEW NOTES: A. CONFORMS TO JEDEC MS−001, VARIATION BA B. ALL DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONS AND TOLERANCES PER ASME Y14.5M−2009 FRONT VIEW TOP VIEW MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON13468GDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1PDIP8 9.42X6.38, 2.54P © Semiconductor Components Industries, LLC, 2019 www.onsemi.com

PDIP8 9.59x6.6, 2.54P CASE 646CN ISSUE O DATE 31 JUL 2016 NOTES: A)THIS PACKAGE CONFORMS TOJEDEC MS−001 VARIATION BA WHICH DEFINES B) CONTROLING DIMS ARE IN INCHES C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M−2009 0.400 0.355[ 10.160 9.017 ] 0.280 0.240 7.112 6.096] 0.195 0.115 4.965 2.933] MIN 0.015 [0.381] MAX 0.210 [5.334] 0.100 [2.540] 0.070 0.045 1.778 1.143 0.022 0.014 0.562 0.358 0.150 0.115 3.811 2.922] C 0.015 [0.389] GAGE PLANE 0.325 0.300 8.263 7.628 0.300 [7.618] 0.430 [10.922] MAX (0.031 [0.786])4X 4X FOR 1/2 LEAD STYLE FULL LEAD STYLE 4XHALF LEAD STYLE 4X 0.10 C SEATING PLANE PIN 1 INDICATOR 0.031 [0.786] MIN 0.010 [0.252] MIN 8X FOR FULL LEAD STYLE 2 VERSIONS OF THE PACKAGE TERMINAL STYLE WHICH ARE SHOWN HERE. MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS http://onsemi.com © Semiconductor Components Industries, LLC, 2002 October, 2002 − Rev. 0 Case Outline Number: XXX DOCUMENT NUMBER: STATUS: NEW STANDARD: DESCRIPTION: 98AON13470G ON SEMICONDUCTOR STANDARD PDIP8 9.59X6.6, 2.54P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2

DOCUMENT NUMBER: 98AON13470G PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION FROM FAIRCHILD N08M TO ON SEMICONDUCTOR. REQ. BY I. CAMBALIZA.

31 JUL 2016

© Semiconductor Components Industries, LLC, 2016 July, 2016 − Rev. O Case Outline Number: 646CN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

http://onsemi.com © Semiconductor Components Industries, LLC, 2002 October, 2002 − Rev. 0 Case Outline Number: XXX DOCUMENT NUMBER: STATUS: NEW STANDARD: DESCRIPTION: 98AON13756G ON SEMICONDUCTOR STANDARD PDIP8 GW Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2

DOCUMENT NUMBER: 98AON13756G PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION FROM FAIRCHILD MKT−MLSOP08A TO ON SEMICONDUCTOR. REQ. BY D. TRUHITTE.

31 JAN 2017

© Semiconductor Components Industries, LLC, 2017 January, 2017 − Rev. O Case Outline Number: 709AJ ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

www.onsemi.com ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries i n the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . A listing of ON Semiconductor’s product/patent ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the right s of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative