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Document overview
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Technical content
Features
Advanced Soft Burst-Mode Operation for Low Standby Power and Low Audible Noise Random Frequency Fluctuation for Low EMI Pulse-by-Pulse Current Limit Various Protection Functions: Overload Protection (OLP), Over-Voltage Protection (OVP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD) with Hysteresis, Output-Short Protection (OSP), and Under-Voltage Lockout (UVLO) with Hysteresis Low Operating Current (0.4mA) in Burst Mode Internal Startup Circuit Internal High-Voltage SenseFET: 650V Built-in Soft-Start: 15ms Auto-Restart Mode
Applications
Power Supply for LCD Monitor, STB, and DVD Combination
Description
The FSL176MRT is an in tegrated Pulse Width Modulation (PWM) controller and SenseFET specifically designed for offline Switched-Mode Power Supplies (SMPS) with minimal external components. The PWM controller includes an in tegrated fixed-frequency oscillator, Under-Voltage Lockout (UVLO), Leading- Edge Blanking (LEB), optimized gate driver, internal soft-start, temperature-co mpensated precise current sources for loop compensation, and self-protection circuitry. Compared with a discrete MOSFET and PWM controller solution, the FSL176MRT can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. This device provides a basic platform for cost-effective design of a flyback converter.
Ordering Information
RDS(ON) (Max.) Output Power Table(2) Replaces Device 230VAC ±15%(3) 85~265VAC Adapter(4) Open Frame(5) Adapter(4) Open Frame(5) FSL176MRTUDTU TO-220 6-Lead(1) Forming -40°C ~ +125°C 3.50A 1.6 Ω 80W 90W 48W 70W FSGM0765R Notes: 1. Pb-free package per JEDEC J-STD-020B. 2. The junction temperature can limit the maximum output power. 3. 230V AC or 100/115VAC with voltage doubler. 4. Typical continuous power in a non-v entilated enclosed adapter measured at 50C ambient temperature. 5. Maximum practical continuous power in an open-frame design at 50C ambient temperature.
Figure 3. Pin Configuration (Top View) 1 Drain SenseFET Drain. High-voltage power SenseFET drain connection. 2 GND Ground. This pin is the control ground and the SenseFET source. current for both startup and steady-state operation. Feedback. This pin is internally connected to t he inverting input of the PWM comparator. protection triggers, which shuts down the FPS.
5 NC No Connection
6 V STR
Startup. This pin is connected directly, or thr ough a resistor, to the high-voltage DC link.
operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
- Repetitive peak switching current when the inductive load is assumed: Limited by maximum duty (DMAX=0.74)
and junction temperature (see Figure 4. ).
- L=45mH, starting T J=25C.
- Infinite cooling condition (refer to the SEMI G30-88).
- Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics.
Figure 4. Repetitive Peak Switching Current TA=25°C unless otherwise specified.
- Free standing without heat sink under natural convection condition, per JEDEC 51-2 and 1-10.
- Infinite cooling condition per Mil Std. 883C method 1012.1.
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL176MRT • Rev. 1.0.0 5 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
TJ = 25C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit SenseFET Section BVDSS Drain-Source Breakdown Voltage VCC = 0V, ID = 250A 650 V IDSS Zero-Gate-Voltage Drain Current VDS = 520V, TA = 125C 250 A RDS(ON) Drain-Source On-State Resistance V GS=10V, ID =1A 1.3 1.6 Ω CISS Input Capacitance (12) V DS = 25V, VGS = 0V, f=1MHz 674 pF COSS Output Capacitance (12) V DS = 25V, VGS = 0V, f=1MHz 93 pF tr Rise Time V DS = 325V, ID = 4A, RG=25Ω 30 ns tf Fall Time V DS = 325V, ID = 4A, RG=25Ω 26 ns td(on) Turn-On Delay V DS = 325V, ID = 4A, RG=25Ω 16 ns td(off) Turn-Off Delay V DS = 325V, ID= 4A, RG=25Ω 39 ns Control Section fS Switching Frequency(12) V CC = 14V, VFB = 4V 61 67 73 kHz fS Switching Frequency Variation(12) -25C < TJ < 125C ±5 ±10 % DMAX Maximum Duty Ratio V CC = 14V, VFB = 4V 61 67 73 % DMIN Minimum Duty Ratio V CC = 14V, VFB = 0V % IFB Feedback Source Current V FB=0V 65 90 115 A VSTART UVLO Threshold Voltage VFB = 0V, VCC Sweep 11 12 13 V VSTOP After Turn-On, VFB = 0V 7.0 7.5 8.0 V tS/S Internal Soft-Start Time V STR = 40V, VCC Sweep 15 ms Burst-Mode Section VBURH Burst-Mode Voltage V CC = 14V, VFB Sweep 0.39 0.45 0.51 V VBURL 0.26 0.30 0.34 V VHys 150 mV Protection Section ILIM Peak Drain Current Limit di/dt = 300mA/s 3.15 3.50 3.85 A VSD Shutdown Feedback Voltage V CC = 14V, VFB Sweep 6.45 7.00 7.55 V IDELAY Shutdown Delay Current V CC = 14V, VFB = 4V 1.2 2.0 2.8 A tLEB Leading-Edge Blanking Time(12)(14) 300 ns VOVP Over-Voltage Protection V CC Sweep 23.0 24.5 26.0 V tOSP Output-Short Protection(12) Threshold Time OSP Triggered when tON<tOSP & VFB>VOSP (Lasts Longer than tOSP_FB) 0.7 1.0 1.3 s VOSP Threshold V FB 1.8 2.0 2.2 V tOSP_FB V FB Blanking Time 2.0 2.5 3.0 s TSD Thermal Shutdown Temperature(12) Shutdown Temperature 130 140 150 C THys Hysteresis 60 C Continued on the following page…
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL176MRT • Rev. 1.0.0 6 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Electrical Characteristics (Continued) TJ = 25C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit Total Device Section IOP Operating Supply Current, (Control Part in Burst Mode) VCC = 14V, VFB = 0V 0.3 0.4 0.5 mA IOPS Operating Switching Current, (Control Part and SenseFET Part) VCC = 14V, VFB = 2V 1.1 1.5 1.9 mA ISTART Start Current VCC=11V (Before VCC Reaches VSTART) 85 120 155 A ICH Startup Charging Current V CC = VFB = 0V, VSTR = 40V 0.7 1.0 1.3 mA VSTR Minimum VSTR Supply Voltage V CC = VFB = 0V, VSTR Sweep 26 V Notes: 12. Although these param eters are guaranteed, they are not 100% tested in production. 13. Average value. 14. t LEB includes gate turn-on time. Comparison of FSGM0765R and FSL176MRT Function FSGM0765R FSL176MRT Advantages of FSL176MRT Random Frequency Fluctuation Built-in Low EMI Operating Current 1.6mA 0. 4mA Very low standby power
- Startup: At startup, an inter nal high-voltage current
CC goes below the stop voltage of 7.5V. Figure 17. Startup Block
- Soft-Start: The internal soft-start circuit increases the
secondary diode during startup.
- Feedback Control : This device employs current-
input voltage is increased or the output load is decreased.
3.1 Pulse-by-Pulse Current Limit : Because current-
FB*), as shown in Figure 18. the current through the SenseFET is limited.
3.2 Leading-Edge Blanking (LEB) : At the instant the
LEB (300ns) after the SenseFET is turned on. Figure 18. Pulse Width Modulation Circuit
- Protection Circuits : The FSL176MRT has several
power SenseFET until the faul t condition is eliminated. improved without increasing cost. Figure 19. Auto-Restart Protection Waveforms
4.1 Overload Protection (OLP) : Overload is defined
protection circuit should tri gger to protect the SMPS. transient situation or a true overload situation. implemented in auto-restart mode. Figure 20. Overload Protection
4.2 Abnormal Over-Current Protection (AOCP) :
- When the gate turn-on signal is applied to the
S-R latch, resulting in the shutdown of the SMPS. Figure 21. Abnormal Over-Current Protection
stress on the drain of the SenseFET when turned off. output short is shown in Figure 22. Figure 22. Output-Short Protection
4.4 Over-Voltage Protection (OVP): If the
be designed to be below 24.5V.
4.5 Thermal Shutdown (TSD) : The SenseFET and
thermal shutdown is tri ggered and stops operation.
- Soft Burst-Mode Operation : To minimize power
SenseFET, reducing switching loss in Standby Mode. Figure 23. Burst-Mode Operation
- Random Frequency Fluctuation (RFF) : Fluctuating
switching frequency variation, which is limited internally. EMI requirements (e.g. EN55022). Figure 24. Random Frequency Fluctuation
- The delay for overload protecti on (OLP) is designed to be about 30ms with C105 (8.2nF). OLP time between
39ms (12nF) and 46ms (15nF) is recommended.
- The SMD-type capacitor (C106) must be placed as close as possible to the VCC pin to avoid malfunction by
Figure 25. Schematic
Figure 26. Transformer Specification Table 1. Winding Specification Table 2. Electrical Characteristics
Table 3. Bill of Materials
A) NO PACKAGE STANDARD APPLIES. MOLD FLASH, AND TIE BAR EXTRUSIONS. C) DIMENSIONS ARE IN MILLIMETERS. Figure 28. 6-Lead, TO220, Fullpack, U-Forming, 2 DAP warranty therein, which covers Fairchild products.
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL176MRT • Rev. 1.0.0 16 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™)