FSDM311 FAIRCHILD | Alldatasheet
Document overview
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Technical content
Features
- Internal Avalanche Rugged Sense FET
- Precision Fixed Operating Frequency (67KHz)
- Consumes Under 0.2W at 265V AC & No Load with Advanced Burst-Mode Operation
- Internal Start-up Circuit
- Pulse-by-Pulse Current Limiting
- Over V oltage Protection (OVP)
- Over Load Protection (OLP)
- Internal Thermal Shutdown Function (TSD)
- Auto-Restart Mode
- Under V oltage Lockout (UVLO) with Hysteresis
- Built-in Soft Start
- Secondary Side Regulation
Applications
- Charger & Adapter for Mobile Phone, PDA & MP3
- Auxiliary Power for White Goods, PC, C-TV & Monitor Related Application Notes
- AN-4137, 4141, 4147(Flyback) / AN-4134(Forward) / AN-4138(Charger)
Description
The FSDM311 consists of an integrated Pulse Width Modu- lator (PWM) and Sense FET, and is specifically designed for high performance off-line Switch Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high voltage power switching regulator which combines an VDMOS Sense FET with a voltage mode PWM control block. The integrated PWM controller features include: a fixed oscillator, Under V oltage Lock Out (UVLO) protection, Leading Edge Blanking (LEB), an optimized gate turn-on/turn-off driver, Thermal Shut Down (TSD) protec- tion and temperature compensated precision current sources for loop compensation and fault protection circuitry. When compared to a discrete MOSFET and controller or RCC switching converter solution, the FSDM311 device reduces total component count, design size, weight while increasing efficiency, productivity and system reliability. This device provides a basic platform that is well suited for the design of cost-effective flyback converters. Notes: 1. Maximum practical continuous power in an open frame design with sufficient drain pattern as a heat sinker, at 50°C ambient. 2. 230 VAC or 100/115 VAC with doubler. Typical Circuit Figure 1. Typical Flyback Application
Figure 2. Functional Block Diagram of FSDM311
Figure 3. Pin Configuration (Top View) 1 GND Sense FET source terminal on primary side and internal control ground. vice power is supplied via the auxiliary transformer winding. mechanism to operate under true overload conditions. 9V, the internal switch is opened.
(Ta=25°C, unless otherwise specified) Note: 1. Repetitive rating: Pulse width is limited by maximum junction temperature 2. L = 24mH, starting Tj = 25°C Thermal Impedance (Ta=25°C, unless otherwise specified) Note: 1. Free standing with no heatsink; Without copper clad. / Measurement Condition : Just before junction temperature TJ enters into OTP. 2. Measured on the DRAIN pin close to plastic interface. - all items are tested with the standards JESD 51-2 and 51-10 (DIP). Characteristic Symbol Value Unit Drain Pin Voltage V DRAIN 650 V Vstr Pin Voltage V STR 650 V Drain-Gate Voltage V DG 650 V Gate-Source Voltage V GS ±2 0 V Drain Current Pulsed(1) IDM 1.5 A Continuous Drain Current (Tc=25℃) ID 0.5 A Continuous Drain Current (Tc=100℃) ID 0.32 A Single Pulsed Avalanche Energy(2) EAS 10 mJ Supply Voltage V CC 20 V Feedback Voltage Range V FB -0.3 to VSTOP V Total Power Dissipation P D 1.40 W Operating Junction Temperature T J Internally limited °C Operating Ambient Temperature T A -25 to +85 °C Storage Temperature T STG -55 to +150 °C Parameter Symbol Value Unit 8DIP Junction-to-Ambient Thermal(1) θJA 88.84 °C/W Junction-to-Case Thermal(2) θJC 13.94 °C/W
Electrical Characteristics
(Ta = 25°C unless otherwise specified) Note: 1. Pulse test: Pulse width ≤ 300us, duty ≤ 2% 2. These parameters, although guaranteed, are tested in EDS (wafer test) process 3. These parameters, although guaranteed, are not 100% tested in production Parameter Symbol Condition Min. Typ. Max. Unit SENSE FET SECTION Zero-Gate-Voltage Drain Current I DSS VDS=650V, VGS=0V - - 25 µA VDS=520V, VGS=0V, TC=125°C - - 200 Drain-Source On-State Resistance(1) RDS(ON) VGS=10V, ID=0.5A - 14 19 Ω Forward Trans-Conductance g fs VDS=50V, ID=0.5A 1.0 1.3 - S Input Capacitance C ISS VGS=0V, VDS=25V, f=1MHz - 162 - pFOutput Capacitance C OSS -1 8- Reverse Transfer Capacitance C RSS -3 . 8- Turn-On Delay Time t d(on) VDS=325V, ID=1.0A -9 . 5- nsRise Time t r -1 9- Turn-Off Delay Time t d(off) -3 3- Fall Time t f - 42 - Total Gate Charge Q g VGS=10V, ID=1.0A, VDS=325V -7 . 0- nCGate-Source Charge Q gs -3 . 1- Gate-Drain (Miller) Charge Q gd -0 . 4- CONTROL SECTION Switching Frequency f OSC 61 67 73 KHz Switching Frequency Variation(2) ∆fOSC -25°C ≤ Ta ≤ 85°C - ±5 ±10 % Maximum Duty Cycle D MAX 60 67 74 % UVLO Threshold Voltage VSTART V FB=GND 8 9 10 V VSTOP V FB=GND 6 7 8 V Feedback Source Current I FB 0V ≤ VFB ≤3 V 0.35 0.40 0.45 mA Internal Soft Start Time t S/S 10 15 20 ms Reference Voltage(3) VREF 4.2 4.5 4.8 V Reference Voltage Varaiation with Temperature(2)(3) ∆VREF/∆T- 2 5 °C ≤ Ta ≤ 85°C- 0 . 3 0 . 6 m V / °C BURST MODE SECTION Burst Mode Voltage VBURH Tj=25°C 0.6 0.7 0.8 V VBURL 0.45 0.55 0.65 V VBUR(HYS) Hysteresis - 150 - mV PROTECTION SECTION Peak Current Limit I LIM 0.475 0.55 0.625 A Thermal Shutdown Temperature(3) TSD 125 145 - °C Shutdown Feedback Voltage V SD 4.0 4.5 5.0 V Over Voltage Protection V OVP 20 - - V Shutdown Delay Current I DELAY 3 V≤V FB ≤ VSD 4 5 6 µA TOTAL DEVICE SECTION Operating Supply Current (control part only) IOP V CC ≤ 16V - 1.5 3.0 mA Start-Up Charging Current I CH V CC=0V , VSTR=50V 450 550 650 µA
Comparison Between FSDH0165 and FSDM311 Function FSDH0165 FSDM311 FSDM311 Advantages Soft-Start not applicable 15ms • Gradually increasing current limit during soft-start further reduces peak current and voltage stresses
- Eliminates external components used for soft-start in most applications
- Reduces or eliminates output overshoot Burst Mode Operation not applicable Built into controller • Improves light load efficiency
- Reduces power consumption at no- load
- Transformer audible noise reduction Drain Creepage at Package 1.02mm 3.56mm DIP 3.56mm LSOP
- Greater immunity to arcing provoked by dust, debris and other contami- nants
Typical Performance Characteristics (Control Part) (These characteristic graphs are normalized at Ta = 25°C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Vref Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Vstart Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Vstop Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Fosc Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Dmax Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Iop Temperature('C) Reference Voltage (VREF) vs. Ta Operating Supply Current (I OP) vs. Ta Start Threshold Voltage (VSTART) vs. Ta Stop Threshold Voltage (V STOP) vs. Ta Operating Frequency (FOSC) vs. Ta Maximum Duty Cycle (D MAX) vs. Ta
Typical Performance Characteristics (Continued) Peak Current Limit (ILIM) vs. Ta Feedback Source Current (I FB) vs. Ta Shutdown Delay Current (IDELAY) vs. Ta Shutdown Feedback Voltage (VSD) vs. Ta Over Voltage Protection (VOVP) vs. Ta -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Ifb Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Idelay Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Vovp Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Vsd Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 Iover Temperature('C) -50 0 50 100 150 0.85 0.90 0.95 1.00 1.05 1.10 1.15 ILIM Temperature('C)
- Leading Edge Blanking (LEB) : At the instant the inter-
LEB) after the Sense FET is turned on.
- Protection Circuit : The FSDM311 has several protective
nents, the reliability is improved without increasing cost. Sense FET until the fault condition is eliminated. Figure 7. Protection Block
4.1 Over Load Protection (OLP) : Overload is defined as
3V to 4.5V with 5uA current source. Figure 8. Over Load Protection (OLP)
4.2 Thermal Shutdown (TSD) : The Sense FET and the
Package Dimensions (Continued) 8LSOP
Ordering Information
Product Number Package Marking Code BV DSS fOSC RDS(ON) FSDM311 8DIP DM311 650V 67KHz 14 Ω FSDM311L 8LSOP DM311 650V 67KHz 14 Ω
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