FSD200

FSD210 FAIRCHILD | Alldatasheet

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Technical content

Figure 5. Pin Configuration (Top View) 1, 2, 3 GND Sense FET source terminal on primary side and internal control ground. opens and device power is supplied via the auxiliary transformer winding. regulator provides a constant supply voltage.

FSD210, FSD200 Absolute Maximum Ratings (Ta=25°C unless otherwise specified) Thermal Impedance Note: 1. Free standing without heat sink. 2. Measured on the GND pin close to plastic interface. 3. Soldered to 100mm 2 copper clad. 4. Soldered to 300mm2 copper clad. Parameter Symbol Value Unit Maximum Supply Voltage (FSD200) V CC,MAX 10 V Maximum Supply Voltage (FSD210) V CC,MAX 20 V Input Voltage Range V FB −0.3 to VSTOP V Operating Junction Temperature. T J +150 °C Operating Ambient Temperature T A −25 to +85 °C Storage Temperature Range T STG −55 to +150 °C Parameter Symbol Value Unit 7DIP Junction-to-Ambient Thermal θJA(1) 74.07(3) °C/W θJA(1) 60.44(4) °C/W Junction-to-Case Thermal θJC(2) 22.00 °C/W 7LSOP Junction-to-Ambient Thermal θJA(1) - °C/W θJA(1) - °C/W Junction-to-Case Thermal θJC(2) - °C/W

FSD210, FSD200

Electrical Characteristics

(Ta=25°C unless otherwise specified) Note: 1. These parameters, although guaranteed, are not 100% tested in production 2. This parameter is derived from characterization Parameter Symbol Condition Min. Typ. Max. Unit Sense FET SECTION Drain-Source Breakdown Voltage BV DSS VCC = 0V, ID = 100µA 700 - - V Startup Voltage (Vstr) Breakdown BV STR 700 - - V Off-State Current I DSS VDS = 560V - - 100 µA On-State Resistance R DS(ON) Tj = 25°C, ID = 25mA - 28 32 Ω Tj = 100°C, ID = 25mA - 42 48 Ω Rise Time T R VDS = 325V, ID = 50mA - 100 - ns Fall Time T F VDS = 325V, lD = 25mA - 50 - ns CONTROL SECTION Output Frequency F OSC Tj = 25°C 126 134 142 kHz Output Frequency Modulation F MOD Tj = 25°C- ± 4 - k H z Feedback Source Current I FB Vfb = 0V 0.22 0.25 0.28 mA Maximum Duty Cycle D MAX Vfb = 3.5V 60 65 70 % Minimum Duty Cycle D MIN Vfb = 0V 0 0 0 % UVLO Threshold Voltage (FSD200) VSTART 6 . 377 . 7V VSTOP After turn on 5.3 6 6.7 V UVLO Threshold Voltage (FSD210) VSTART 8.0 8.7 9.4 V VSTOP After turn on 6.0 6.7 7.4 V Supply Shunt Regulator (FSD200) V CCREG -- 7 - V Internal Soft Start Time T S/S -3- m s BURST MODE SECTION Burst Mode Voltage VBURH Tj = 25°C 0.58 0.64 0.7 V VBURL 0.5 0.58 0.64 V Hysteresis - 60 - mV PROTECTION SECTION Drain to Source Peak Current Limit I OVER 0.275 0.320 0.365 A Current Limit Delay(1) TCLD Tj = 25°C - 220 - ns Thermal Shutdown Temperature (Tj)(1) TSD 125 145 160 °C Shutdown Feedback Voltage V SD - 3.5 4.0 4.5 V Feedback Shutdown Delay Current I DELAY Vfb = 4.0V 3 5 7 µA Leading Edge Blanking Time(2) TLEB 200 - - ns TOTAL DEVICE SECTION Operating Supply Current (FSD200) I OP Vcc = 7V - 600 - µA Operating Supply Current (FSD210) I OP Vcc = 11V - 700 - µA Start Up Current (FSD200) I START Vcc = 0V - 1 1.2 mA Start Up Current (FSD210) I START Vcc = 0V - 700 900 µA Vstr Supply Voltage Vcc = 0V 20 - - V

FSD210, FSD200 Comparison Between FSDH565 and FSD210 Function FSDH0565 FSD210 FSD210 Advantages Soft-Start not applicable 3mS • Gradually increasing current limit during soft-start further reduces peak current and voltage component stresses

• Eliminates external components used for soft-start in most applications
• Reduces or eliminates output overshoot Switching Frequency 100kHz 134kHz • Smaller transformer Frequency Modulation not applicable ±4kHz • Reduced conducted EMI Burst Mode Operation not applicable Yes-built into controller
• Improve light load efficiency
• Reduces no-load consumption
• Transformer audible noise reduction Drain Creepage at Package 1.02mm 3.56mm DIP 3.56mm LSOP
• Greater immunity to acting as a result of build-up of dust, debris and other contaminants

FSD210, FSD200 Typical Performance Characteristics (These characteristic graphs are normalized at Ta=25℃) Frequency vs. Temp Operating Current vs. Temp Peak Current Limit vs. Temp Feedback Source Current vs. Temp Vstop Voltage vs. Temp 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) Feedback SOurce Current (A)0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) Peak Current Limit (A) 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) Operating Current (A) 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) Fosc (kHz) 0. 00 0. 20 0. 40 0. 60 0. 80 1. 00 1. 20 -25 0 25 50 75 100 125 Junction Temperature ( ℃) Vstart (V) 0. 00 0. 20 0. 40 0. 60 0. 80 1. 00 1. 20 -25 0 25 50 75 100 125 Junction Temperature ( ℃) Vstop (V) Vstart Voltage vs. Temp

FSD210, FSD200 Typical Performance Characteristics (Continued) (These characteristic graphs are normalized at Ta=25℃) On State Resistance vs. Temp Breakdown Voltage vs. Temp 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) Vcc Regulation Voltage (V) 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 1. 4 1. 6 1. 8 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) On State Resistance (Ω) 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) BVdss (V) 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) VSD (V) Vcc Regulation Voltage vs. Temp (for FSD200) Shutdown Feedback Voltage vs. Temp Start Up Current vs. Temp (for FSD210) 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 1. 4 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) Istart (A) 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 -25 0 25 50 75 100 125 Junction Tem perature ( ℃) Istart (A) Start Up Current vs. Temp (for FSD200)

Figure 9. Protection block

4.1 Over Load Protection (OLP) : Over load protection

short term load transient can occur under normal operation. in turn reduces the photo-transistor current (see figure 9). charge Cfb from 3Vto 4Vwith 5uA as shown in Fig. 10.

4.2 Thermal Shutdown (TSD) : The Sense FET and the

Figure 10. Over load protection delay

1. Soft Start : FSD200/210 has an internal soft start circuit

Figure 11. Internal Soft Start

1. Burst operation : In order to minimize the power dissipa-

BURH(0.64V) switching starts again.

FSD210, FSD200 Typical application circuit

Features

• High efficiency (>67% at Universal Input)
• Low zero load power consumption (<100mW at 240Vac) with FSD210
• Low component count
• Enhanced system reliability through various protection functions
• Internal soft-start (3ms)
• Frequency Modulation for low EMI Key Design Notes
• The constant voltage (CV) mode control is implemented with resistors, R8, R9, R10 and R11, shunt regulator, U2, feedback capacitor, C9 and opto-coupler, U3.
• The constant current (CC) mode control is designed with resistors, R8, R9, R15, R16, R17 and R19, NPN transistor, Q1 and NTC, TH1. When the voltage across current sensing resistors, R15,R16 and R17 is 0.7V , the NPN transistor turns on and the current through the opto coupler LED increases. This reduces the feedback voltage and duty ratio. Therefore, the output voltage decreases and the output current is regulated.
• The NTC(negative thermal coefficient) is used to compensate the temperature characteristics of the transistor Q1. 1. Schematic Application Output power Input voltage Output voltage (Max current) Cellular Phone Charger 3.38W Universal input (85-265Vac) 5.2V (650mA) For FSD21xFor FSD21xFor FSD21xFor FSD21x 4uH 330uF 16V L1 330uH R19 510R 510R 1N4148 47k TH1 10k Vo R15 3R0 39R KSP2222A TL431 1N4007 R16 3R0 C9 470nF TX1 R10 2.2k 4.7uF 400V 100nF H11A817B R1 4.7k 4.7UF 400V 33uF 50V 7Fuse 1W, 10R C6 152M-Y, 250Vac 1N4007 H11A817B 4.7M, 1/4W AC R17 3R0 1N4007 1N4007 56R UF4007 AC R12 330uF 16V (5.2V/0.65A) 47k C10 4.7uF 50V FSD210 Vstr VccDrain GND VfbGND GND SB260 4.7M 1/4W 0 102k 1kV

FSD210, FSD200 2. Demo Circuit Part List 3. Transformer Schematic Diagram 4. Winding Specification 5. Electrical Characteristics TO-92 Type, LM431Vref=2.495V(Typ.)1KA431AZU2 Iover=0.3A, Fairchildsemi0.5A/700V1FSD210 (FSD200) -CTR 80~160%1H11A817AU3 DO41 Type1A/1000V Ultra Fast Diode1UF4007D5 D0-213 Type10mA/100V Junction Diode11N4148D6 D0-41 Type2A/60V Schottky Diode1SB260D7 Quantity Ic=600mA, Vce=30V 1A/1000V Junction Rectifier

Description

DO41 Type1N4007D1,D2,D3,D4 Requirement/CommentPart #Reference TO-92 Type, LM431Vref=2.495V(Typ.)1KA431AZU2 Iover=0.3A, Fairchildsemi0.5A/700V1FSD210 (FSD200) -CTR 80~160%1H11A817AU3 DO41 Type1A/1000V Ultra Fast Diode1UF4007D5 D0-213 Type10mA/100V Junction Diode11N4148D6 D0-41 Type2A/60V Schottky Diode1SB260D7 Quantity Ic=600mA, Vce=30V 1A/1000V Junction Rectifier DO41 Type1N4007D1,D2,D3,D4 Requirement/CommentPart #Reference CORE : EE1616 BOBBIN : EE1616(H) 2mm 2mm 2mm 2mm 1111 2222 3333 4444 8888 7777 6666 5555 1111 2222 3333 4444 8888 7777 6666 5555 INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts SOLENOID WINDING9 Ts0.40ΦΧ 18 → 7W4 INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts SOLENOID WINDING50 Ts0.16ΦΧ 11 → openW3 INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts CENTER SOLENOID WINDING 18 Ts0.16ΦΧ 14 → 3W2 INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts SOLENOID WINDING99 Ts0.16ΦΧ 11 → 2W1 Winding MethodWinding MethodTurnsTurnsWireWirePin (S Pin (S →→→→→→→→ F)F)No.No. INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts SOLENOID WINDING9 Ts0.40ΦΧ 18 → 7W4 INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 3Ts SOLENOID WINDING50 Ts0.16ΦΧ 11 → openW3 INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts CENTER SOLENOID WINDING 18 Ts0.16ΦΧ 14 → 3W2 INSULATION : POLYESTER TAPE t=0.025mm / 10mm, 2Ts SOLENOID WINDING99 Ts0.16ΦΧ 11 → 2W1 Winding MethodWinding MethodTurnsTurnsWireWirePin (S Pin (S →→→→→→→→ F)F)No.No. 3,4,7,8 short 100kHz, 1V 50uH1 – 2LEAKAGE L 1kHz, 1V1.6 mH1 – 2INDUCTANCE REMARKSREMARKSSPECIFICATIONSPECIFICATIONTERMINALTERMINALIT EMIT EM 3,4,7,8 short 100kHz, 1V 50uH1 – 2LEAKAGE L 1kHz, 1V1.6 mH1 – 2INDUCTANCE REMARKSREMARKSSPECIFICATIONSPECIFICATIONTERMINALTERMINALIT EMIT EM 3,4,7,8 short 100kHz, 1V 50uH1 – 2LEAKAGE L 1kHz, 1V1.6 mH1 – 2INDUCTANCE REMARKSREMARKSSPECIFICATIONSPECIFICATIONTERMINALTERMINALIT EMIT EM 3,4,7,8 short 100kHz, 1V 50uH1 – 2LEAKAGE L 1kHz, 1V1.6 mH1 – 2INDUCTANCE REMARKSREMARKSSPECIFICATIONSPECIFICATIONTERMINALTERMINALIT EMIT EM

FSD210, FSD200 Typical application circuit

• Non isolation buck converter
• Low component count
• Enhanced system reliability through various protection functions Key Design Notes
• The output voltage(12V) is regulated with resistors, R1, R2 and R3, zener diode, D3, the transistor, Q1 and the capacitor, C2. While the FSD210 is off diodes, D1 and D2, are on. At this time the output voltage, 12V , can be sensed by the feedback components above. This output is also used with bias voltage for the FSD210.
• R, 680K, is to prevent the OLP(over load protection) at startup.
• R, 8.2K, is a dummy resistor to regulate output voltage in light load. 1. Schematic 2. Demo Circuit Part List Application Output power Input voltage Output voltage (Max current) Non Isolation Buck 1.2W Universal dc input (100 ~ 375Vac) 12V (100mA) R 680K 110 4.7uF/400V R 8.2K 750 D3(ZD) 1N759A GND KSP2222A 1000uF 16V 47nF/50V GND R1 110 FSD21x Vstr VccDrain GND VfbGND GND 47uF 50V UF4004 VINDC UF4004 VOUT(12V/100mA)L1 1mH TO-92 Type1Q1 DO-35 Type12VZD/0.5W11N759AZD1 0.5A/700V1FSD210U1 Quantity 1A/1000V Ultra Fast Diode Des cripti on DO41 TypeUF4007D1,D2, R eq uirem ent/Comm entPart #Reference Ic=200m A, V cc=40V1KSP2222A Iover=0.3A1 Quantity Des cripti on DO41 TypeD1,D2 R eq uirem ent/Comm entPart #Reference

Figure 17. Layout Considerations for FSD2x0 using 7DIP

FSD210, FSD200 Package Dimensions 7-DIP

FSD210, FSD200 Package Dimensions (Continued) 7-LSOP

FSD210, FSD200 6/21/04 0.0m 001  2004 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

Ordering Information

Product Number Package Rating Topr ( °C) FSD210 7DIP 700V, 0.5A −25°C to +85°C FSD200 7DIP 700V, 0.5A −25°C to +85°C FSD210M 7LSOP 700V, 0.5A −25°C to +85°C FSD200M 7LSOP 700V, 0.5A −25°C to +85°C