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©2015 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FSB50260SF Rev. 1.1 FSB50260SF Motion SPM® 5 SuperFET® Series November 2015 FSB50260SF Motion SPM ® 5 SuperFET® Series

Features

  • UL Certified No. E209204 (UL1557)
  • 600 V RDS(on) = 2.4 Max  SuperFET MOSFET 3- Phase with Gate Drivers and Protection
  • Built-in Bootstrap Diodes Simplify PCB Layout
  • Separate Open-Source Pins from Low-Side MOS- FETS for Three-Phase Current-Sensing
  • Active-HIGH Interface, Works with 3.3 / 5 V Logic, Schmitt-trigger Input
  • Optimized for Low Electromagnetic Interference
  • HVIC Temperature-Sensing Built-in for Temperature Monitoring
  • HVIC for Gate Driving and Under-Voltage Protection
  • Isolation Rating: 1500 Vrms / 1 min.
  • RoHS Compliant

Applications

  • 3-Phase Inverter Driver for Small Power AC Motor Drives Related Source
  • RD-402 - Reference Design for Motion SPM 5 Super- FET Series
  • AN-9082 - Motion SPM5 Series Thermal Performance by Contact Pressure
  • AN-9080 - User’s Guide for Motion SPM 5 Series V2 General Description The FSB50260SF is an advanced Motion SPM ® 5 module providing a fully-featured, high-performance inverter output stage for AC Induction, BLDC and PMSM motors such as refrigerators, fans and pumps. These modules integrate optimized gate drive of the built-in MOSFETs(SuperFET ® technology) to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts and thermal monitoring. The built-in high-speed HVIC requires only a single supply voltage and translates the incoming logic-level gate inputs to the high-voltage, high-current drive signals required to properly drive the module's internal MOSFETs. Separate open-source MOSFET terminals are available for each phase to support the widest variety of control algorithms.

Figure 1. 3D Package Drawing (Click to Activate 3D Content)

FSB50260SF Motion SPM® 5 SuperFET® Series ©2015 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FSB50260SF Rev. 1.1 Absolute Maximum Ratings Inverter Part (each MOSFET unless otherwise specified.) Control Part (each HVIC unless otherwise specified.) Bootstrap Diode Part (each bootstrap diode unless otherwise specified.) Thermal Resistance Total System 1st Notes: 1. Marking “ * “ is calculation value or design factor. Symbol Parameter Conditions Rating Unit VDSS Drain-Source Voltage of Each MOSFET 600 V *ID 25 Each MOSFET Drain Current, Continuous TC = 25°C 1.7 A *ID 80 Each MOSFET Drain Current, Continuous TC = 80°C 1.3 A *IDP Each MOSFET Drain Current, Peak T C = 25°C, PW < 100 s 4.5 A *IDRMS Each MOSFET Drain Current, Rms T C = 80°C, FPWM < 20 kHz 0.92 A rms *PD Maximum Power Dissipation T C = 25°C, For Each MOSFET 12.8 W Symbol Parameter Conditions Rating Unit VCC Control Supply Voltage Applied Between V CC and COM 20 V VBS High-side Bias Voltage Applied Between V B and VS 20 V VIN Input Signal Voltage Applied Between IN and COM -0.3 ~ V CC + 0.3 V Symbol Parameter Conditions Rating Unit VRRMB Maximum Repetitive Reverse Voltage 600 V * IFB Forward Current T C = 25°C 0.5 A * IFPB Forward Current (Peak) T C = 25°C, Under 1ms Pulse Width 1.5 A Symbol Parameter Conditions Rating Unit R JC Junction to Case Thermal ResistanceInverter MOSFET part(per 1/6 module) 9.8 °C/W Symbol Parameter Conditions Rating Unit TJ Operating Junction Temperature -40 ~ 150 °C TSTG Storage Temperature -40 ~ 125 °C VISO Isolation Voltage 60 Hz, Sinusoidal, 1 Minute, Con- nect Pins to Heat Sink Plate 1500 V rms

Figure 2. Pin Configuration and Internal Block Diagram (Bottom View)

  1. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM® 5 product. External connections should be made as

1 COM IC Common Supply Ground

10 IN (VL) Signal Input for V-Phase Low-Side

11 V TS Output for HVIC Temperature Sensing

12 V B(W) Bias Voltage for W-Phase High-Side MOSFET Driving

13 V CC(W) Bias Voltage for W-Phase IC and Low-Side MOSFET Driving

14 IN (WH) Signal Input for W-Phase High-Side

15 IN (WL) Signal Input for W-Phase Low-Side

17 P Positive DC-Link Input

18 U, V S(U) Output for U-Phase & Bias Voltage Ground for High-Side MOSFET Driving

19 N U Negative DC-Link Input for U-Phase

20 N V Negative DC-Link Input for V-Phase

21 V, V S(V) Output for V-Phase & Bias Voltage Ground for High-Side MOSFET Driving

22 N W Negative DC-Link Input for W-Phase

23 W, V S(W) Output for W Phase & Bias Voltage Ground for High-Side MOSFET Driving

FSB50260SF Motion SPM® 5 SuperFET® Series ©2015 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FSB50260SF Rev. 1.1 Electrical Characteristics (TJ = 25°C, VCC = VBS = 15 V unless otherwise specified.) Inverter Part (each MOSFET unless otherwise specified.) Control Part (each HVIC unless otherwise specified.) Bootstrap Diode Part (each bootstrap diode unless otherwise specified.) 2nd Notes: 1. BVDSS is the absolute maximum voltage rating between drain and source terminal of each MOSFET inside Motion SPM® 5 product. VPN should be sufficiently less than this value considering the effect of the stray inductance so that VPN should not exceed BVDSS in any case. 2. tON and tOFF include the propagation delay of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field applications due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the switching time definition with the switching test circuit of Figure 8. 3. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please see Figure 8 for the RBSOA test circuit that is same as the switching test circuit. 4. Vts is only for sensing-temperature of module and cannot shutdown MOSFETs automatically. 5. Built-in bootstrap diode includes around 15Ω resistance characteristic. Please refer to Figure 3. Symbol Parameter Conditions Min Typ Max Unit BV DSS Drain - Source Breakdown Voltage VIN = 0 V, ID = 1 mA (2nd Note 1) 600 - - V IDSS Zero Gate Voltage Drain Current VIN = 0 V, VDS = 600 V - - 1 mA R DS(on) Static Drain - Source Turn-On Resistance VCC = VBS = 15 V, VIN = 5 V, ID = 1 A - 2.0 2.4  VSD Drain - Source Diode Forward Voltage VCC = VBS = 15 V, VIN = 0 V, ID = -1 A - - 1.2 V tON Switching Times VPN = 300 V, VCC = VBS = 15 V, ID = 1 A VIN = 0 V  5 V, Inductive Load L = 3 mH High- and Low-Side MOSFET Switching (2nd Note 2) - 680 - ns tOFF - 400 - ns trr - 220 - ns EON -8 0- J EOFF -1 0- J RBSOA Reverse Bias Safe Oper- ating Area VPN = 400 V, VCC = VBS = 15 V, ID = IDP, VDS = BVDSS , TJ = 150°C High- and Low-Side MOSFET Switching (2nd Note 3) Full Square Symbol Parameter Conditions Min Typ Max Unit IQCC Quiescent VCC Current VCC = 15 V, VIN = 0 V Applied Between VCC and COM - - 200 A IQBS Quiescent VBS Current VBS = 15 V, VIN = 0 V Applied Between VB(U) - U, VB(V) - V, VB(W) - W - - 100 A UV CCD Low-Side Under-Voltage Protection (Figure 8) VCC Under-Voltage Protection Detection Level 7.4 8.0 9.4 V UV CCR VCC Under-Voltage Protection Reset Level 8.0 8.9 9.8 V UV BSD High-Side Under-Voltage Protection (Figure 9) VBS Under-Voltage Protection Detection Level 7.4 8.0 9.4 V UV BSR VBS Under-Voltage Protection Reset Level 8.0 8.9 9.8 V VTS HVIC Temperature Sens- ing Voltage Output VCC = 15 V, THVIC = 25°C (2nd Note 4) 600 790 980 mV VIH ON Threshold Voltage Logic HIGH Level Applied between IN and COM -- 2 .9 V VIL OFF Threshold Voltage Logic LOW Level 0.8 - - V Symbol Parameter Conditions Min Typ Max Unit VFB Forward Voltage I F = 0.1 A, TC = 25°C (2nd Note 5) - 2.5 - V trrB Reverse Recovery Time IF = 0.1 A, TC = 25°C - 80 - ns

Figure 3. Built-in Bootstrap Diode Characteristics (Typical)

Figure 4. Recommended MCU Interface and Bootstrap Circuit with Parameters

  1. Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
  2. RC-coupling (R5 and C5) and C4 at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be used to prevent improper signal due to surge-noise.
  3. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge-voltage. Bypass capacitors such as C1, C2

and C3 should have good high-frequency characteristics to absorb high-frequency ripple-current. Figure 5. Case Temperature Measurement

  1. Attach the thermocouple on top of the heat-sink of SPM 5 package (between SPM 5 package and heatsink if applied) to get the correct temperature measurement.

Figure 6. Temperature Profile of VTS (Typical)

10 V DC High side FRFET On

Figure 11. Example of Application Circuit

  1. About pin position, refer to Figure 2.
  2. RC-coupling (R5 and C5, R4 and C6) and C4 at each input of Motion SPM® 5 product and MCU are useful to prevent improper input signal caused by surge-noise.
  3. The voltage-drop across R3 affects the low-side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the low-

side MOSFET. For this reason, the voltage-drop across R3 should be less than 1 V in the steady-state.

  1. Ground-wires and output terminals, should be thick and short in order to avoid surge-voltage and malfunction of HVIC.
  2. All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting high-frequency ripple current.

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