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Document overview
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Technical content
Features
High Output Voltage Accuracy: 2% Output Voltage: 5V Low Ground Current: < 2.0mA Ultra-Fast Line and Load Transient Response Hysteretic Thermal and Current-Limit Protections Over-Voltage and Under-Voltage Protections Ultra-Low Power Dissipation with No Load Universal Input Range: 80~265VRMS No Inductor Required Low Components and Cost
Applications
Non-Isolation AC/DC Converter Home Appliance
Description
FSAR001 is designed to re place capacitor-fed (“cap dropper”) non-isolated power supplies, offering better high-power conversion performance and high-energy efficiency than a cap dropper solution. The appliance needs no inductor, uses few components, and offers lower cost. FSAR001 integrates a 600V hi gh-power device, startup controller, voltage control ci rcuit, synchronous circuit, low dropout regulator, over-tem perature protector, over- voltage protector, under-voltage protector, and current- limit circuit onto a monolithic IC.
Ordering Information
Temperature Range Output Voltage Maximum Load Package Packing Method FSAR001BNY -40°C to +105°C 5V 35mA DIP-8 Tube
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FSAR001 • Rev. 1.0.0 4 FSAR001 — AC-DC Linear Regulator Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dam age the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VIN Input Voltage of VIN Pin 600 V VST Input Voltage of V ST Pin 500 V VDET Input Voltage of DET Pin 7 V VDD Input Voltage of V DD Pin 30 V VOUT Input Voltage of OUT Pin 30 V PD Power Dissipation (TA ≦ 50°C) 1.15 W ΘJA Thermal Resistance (Junction to Air) 95 °C/W TJ Operating Junction Temperature -40 +125 °C TSTG Storage Temperature Range -55 +150 °C TL Lead Temperature (Wave Soldering or IR, 10 Seconds) 260 °C ESD Human Body Model, JEDEC:JESD22-A114 All Pins Except HV Pin (3) 6 KV Charged Device Model, JEDEC:JESD22-C101 All Pins Except HV Pin (3) 2 Notes: 1. All voltage values, except differential voltages, are given with respect to the network ground terminal. 2. Stresses beyond those listed under Absolute Maximu m Ratings may cause permanent damage to the device. 3. ESD with HV pin CDM=1000V and HBM=500V. Recommended Operating Conditions Symbol Parameter Min. Max. Unit VIN 600V High-Voltage Input 600 V VST 500V High-Voltage Startup 500 V TA Operating Ambient Temperature -40 +105 °C Note: 4. For proper operation.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FSAR001 • Rev. 1.0.0 5 FSAR001 — AC-DC Linear Regulator
Electrical Characteristics
VIN=open, VDD=VOUT+1 V, CVDD=470 µF/ 25 V, COUT=10 µF/ 16 V, IOUT=1 mA, TA=25°C, unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Unit VDD Section VTH-ON Turn-on Threshold Voltage (VOUT=5V) VDD Pin 9 10 11 V VTH-OFF Turn-off Voltage (V OUT=5V) VDD Pin 3 4 5 V IDD-ST Startup Current of VDD Pin VDD Pin 10 30 µA IDD-OP Operating Supply Current I OUT=1mA 1.0 1.5 2.0 mA VDD-OVP Threshold of V DD OVP VOUT+3.0 V OUT+3.5 V OUT+4.0 V VDD-OVPHYS Threshold of V DD OVP Hysteresis 0.8 1.0 1.2 V tVDD-OVP Time Delay of V DD OVP 1.5 µs VIN Section VVIN Supply Voltage 600 V ST Section IST Supply Current from ST Pin VAC=90V (VDC=120V), VDD=10µF 2.50 3.75 5.00 mA IST-LC Supply Current After Startup HV=500V, VDD=VDD- OFF+1V 1 20 µA DET Section VDET_MAX Turn-Off Synchronous Voltage 0.90 0.95 1.00 V VDET_MAXHYS Turn-Off Synchronous Voltage Hysteresis 0.08 0.10 0.12 V VDET_MIN Turn-On Synchronous Voltage 0.08 0.14 0.20 V VDET_MINHYS Turn-Off Synchronous Voltage Hysteresis 0.08 0.14 0.20 V IDET DET Current 0.1 µA VOUT Section UVPVout Output Pin Under-Voltage Protection -10.0 -12.5 -15.0 % VACC Output Voltage Accuracy -2 2 % LR Load Regulation I OUT=1mA to Maximum -2 2 % ΔVOUT (VIN) Line Regulation dV OUT/dVIN -0.2 0.2 %/V ILIM Current Limit VDD=VOUT+3V 110 140 170 mA VDrop Dropout Voltage (V OUT=5V) IOUT=35mA 0.3 0.4 0.5 V IG Ground Pin Current (5) Output Current = Maximum Load 1.5 2.0 mA tDOUT-ST Output Voltage Rising Time (VOUT=12V) VDD to VOUT VOUT=0%~90% COUT=1µF 40 50 60 µs PSRR Ripple Rejection (6) f= 50Hz, COUT=10µF, IOUT =35mA 60 dB f =100Hz, COUT=10µF, IOUT =35mA TOTP Protection Junction Temperature (6) 150 °C THYS Restart Junction Temperature(6) T OTP-40 °C Notes: 5. For V Drop=1V of VOUT=3.3V version, the test condition is modified to V DD=VOUT+1.5V. 6. Guaranteed by design.
AC synchronous signal detect function (VDET). sense voltage), detailed in the following sections. Figure 17. Operating Principle the inner power MOSFET MV (VIN). and directly controls the output delivery current of LDO. drop until the UVP function occurs. against abnormal conditions and over-power operation.
Figure 18. Typical Waveforms After startup, FSAR001 turns on the OVP function. to properly set the conduction angle. by Equation 2; the selection chart is shown in Figure 19.
10 FunitmIC LOAD
Figure 19. V DD Capacitor vs. Output Current
Figure 20. Application Circuit
5.08 MAX
0.33 MIN
B) ALL DIMENSIONS ARE IN MILLIMETERS. MOLD FLASH, AND TIE BAR EXTRUSIONS. E) DRAWING FILENAME AND REVSION: MKT-N08FREV2. Figure 21. 8-Pin, DIP-8 Package the warranty therein, which covers Fairchild products.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FSAR001 • Rev. 1.0.0 12 FSAR001 — AC-DC Linear Regulator