FSA660 ONSEMI | Alldatasheet
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© 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FSA660 • Rev. 1.0 FSA660 — 2:1 MIPI C-PHY (5.7 Gbps) 1-Data Lane Switch FSA660—2:1 MIPI C-PHY (5.7 Gbps) 1-Data Lane Switch
Features
Switch Type: SPDT(3x) Signal Types: MIPI, C-PHY VCC: 1.5 to 5.0 V Input Signals: 0 to 2.1 V RON: 5.4 Ω Typical ΔRON: 0.1 Ω Typical RON_FLAT: 0.9 Ω Typical ICCZ:1 µA Maximum ICC: 12 µA Typical OIRR : -28 dB Typical Bandwidth: 5G Hz Typical IL: -1.0 dB Typical Xtalk: -44 dB Typical CON: 0.8 pF Typical
Description
The FSA660 is a one-data-lane MIPI, C-PHY switch. This Single-Pole, Double-Throw (SPDT) switch is optimized for switching between two high-speed or low- power MIPI sources. The FSA660 is designed for the MIPI specification and allows connection to a CSI or DSI module.
Applications
Smart phones Tablets Laptops Displays ProcessorC-PHY Lane Module MANAGE MENT MIPI Module#1 MIPI Module#2 /OE SEL VCC GND FSA660 C-PHY Lane Module MANAGE MENT C-PHY Lane Module MANAGE MENT A B C Figure 1. Typical Application
Ordering Information
Temperature Range Package Top Mark FSA660TMX -40 to +85°C 18-Lead, Quad, Ultra-ultrathin Molded Leadless Package (TMLP), 2.0 mm x 2.8 mm x 0.375 mm LS
Figure 2. Analog Symbol Figure 3. Pin Assignment(Top Through View)
© 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FSA660 • Rev. 1.0 FSA660 — 2:1 MIPI C-PHY (5.7 Gbps) 1-Data Lane Switch Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dama ge the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage -0.5 6.0 V VCNTRL DC Input Voltage (SEL, /OE)(1) -0.5 VCC V VSW DC Switch I/O Voltage(1,2) -0.3 2.1 V IIK DC Input Diode Current -50 mA Isw DC Switch Current 25 mA TSTG Storage Temperature -65 +150 °C MSL Moisture Sensitivity Level (JEDEC J-STD-020A) 1 ESD Human Body Model, JEDEC: JESD22-A114 All Pins 2 kV IEC 61000-2-4, Level 4, for Switch Pins Contact 8 Air 15 Charged Device Model, JESD22-C101 1 Notes: 1. The input and output negative ratings may be excee ded if the input and output diode current ratings are observed. 2. V SW refers to analog data switch paths. Recommended Operating Conditions The Recommended Operating Conditions table defines the condi tions for actual device operation. Recommended operating conditions are specified to ensure optimal perfo rmance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit VCC Supply Voltage 1.5 5.0 V VCNTRL Control Input Voltage (SEL, /OE)(3) 0 5.0 V VSW Switch I/O Voltage HS Mode 0 0.54 V LP Mode 0 1.3 TA Operating Temperature -40 +85 °C Note: 3. The control inputs must be held HIGH or LOW; they must not float.
© 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FSA660 • Rev. 1.0 FSA660 — 2:1 MIPI C-PHY (5.7 Gbps) 1-Data Lane Switch DC and Transient Characteristics All typical values are at TA=25°C unless otherwise specified. Symbol Parameter Condition VCC (V) TA= -40ºC to +85ºC Unit Min. Typ. Max. VIK Clamp Diode Voltage SEL, /OE IIN=-18 mA 1.5 -1.2 -0.6 V IIK Clamp Diode Current (Switch Pins) VIN=-0.3 V 0 18 µA VIH Control Input Voltage High SEL, /OE 1.5 1.3 V SEL, /OE 3.6 1.4 V SEL, /OE 5.0 1.5 V VIL Control Input Voltage Low SEL, /OE 1.5 0.4 V SEL, /OE 3.6 0.4 V SEL, /OE 5.0 0.4 V IIN Control Input Leakage VSW= 0 to 2.0 V VCNTRL=0 to VCC 5.0 -500 500 nA IOZ Off-State Leakage for Open Data Paths VSW= 0.0 DATA 2.0 V 5.0 -500 500 nA ICL On-State Leakage for Closed Data Paths(4) VSW= 0.0 DATA 2.0 V 5.0 -500 500 nA IOFF Power-Off Leakage Current (All I/O Ports) VSW= 0.0 V to 2.0 V 0 -500 500 nA RON Switch On Resistance VSW= 0 V, ION=-8 mA 1.5 5.4 8.0 ∆RON Difference in RON Between Positive-Negative VSW= 0 V, ION=-8 mA, 1.5 0.1 RONF_FLAT Flatness for RON VSW= 0 DATA 2.0 V, ION=-8 mA 1.5 0.9 ICC Quiescent Supply Current V/OE=0, VSEL=0 or VCC, IOUT=0 5.0 12 30 µA ICCZ Quiescent Supply Current (High Impedance) VSEL=X, V/OE= VCC, IOUT=0 5.0 1 µA ICCT Increase in Quiescent Supply Current VSEL=X, V/OE =1.5 V 5.0 5 15 µA Note: 4. For this test, the data switch is closed with the respective switch pin floating.
© 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FSA660 • Rev. 1.0 FSA660 — 2:1 MIPI C-PHY (5.7 Gbps) 1-Data Lane Switch All typical value are for VCC =3.6 V and TA=25°C unless otherwise specified. Symbol Parameter Condition VCC (V) TA= -40ºC to +85ºC Unit Min. Typ. Max. tON Turn-On Time, SEL to Output RL=50 Ω, CL=0 pF, VSW=0 V, VSW=0.6 V 1.5 to
5.0 V 350 600 ns
tOFF Turn-Off Time, SEL to Output RL=50 Ω, CL=0 pF, VSW=0 V, VSW=3.3 V 1.5 to
5.0 V 125 300 ns
tPD Propagation Delay(5) CL=, CL=0 pF, RL=50 Ω, 1.5 to 5.0 V 0.25 ns tBBM Break-Before-Make(5) RL=50 Ω, CL=0 pF, VSW1=0.6 V,VSW2= -0.6 V, 1.5 to
5.0 V 100 350 ns
tPEN Enable Time, /OE to Output RL=50 Ω, CL=0 pF, VSW=0.6 V 1.5 to
5.0 V 60 150 µs
tPDISEN Disable Time, /OE to Output RL=50 Ω, CL=0 pF, VSW=0.6 V 1.5 to
5.0 V 35 240 ns
OIRR Off Isolation(5) VS=0 dBm, R=50 Ω, f=2.5 GHz 3.6 V -28 dB Xtalk Channel Crosstalk(5) VS=0 dBm, R=50 Ω, f=2.5 GHz 3.6 V -44 dB IL Insertion Loss(5) VS=0 dBm, f=2.5 GHz, RL=50 Ω, CL=0 pF 3.6V -1.0 dB BW -3 db Bandwidth(5) VIN=1 Vpk-pk, RL=50 Ω, CL=0 pF (All Data Paths) 3.6 V 5 GHz tSK(P) Skew of Transitions of the Output(5) RPU=50 to VCC, f=2.5 GHz, CL=0 pF 3.6 V 6 ps CIN Control Pin Input Capacitance(5) VCC=0 V, f=1 MHz 2.7 pF CON On Capacitance(5) VCC=3.3 V, f=2.5 GHz 0.8 pF COFF Off Capacitance(5) VCC=3.3 V, f=2.5 GHz 0.6 pF Note: 5. Guaranteed by characterization and design. Not production teste d.
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