FPD33584 NSC | Alldatasheet
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Technical content
Features
n RSDS (Reduced Swing Differential Signaling) data bus for low power, reduced EMI and small PCB foot print n 85MHz maximum operating frequency at V DD1=3.0V (70MHz at VDD1=2.7V) n Pin compatible with Samsung S6C0666 n Ideal for XGA and SXGA applications n Supports notebook and monitor applications n Smart Charge Conservation for low power consumption n 64 Gray levels per color (18-bit color) n Supports both Dot and N-Line inversion n Four externally programmable gamma curves n Low offset, High voltage outputs for high contrast in a large range of display panel applications n Optional, high current, repair amplifiers System Diagram 20043201 January 2003 FPD33584 Low Power, Low EMI, TFT-LCD Column Driver with RSDS Inputs, 64 Grayshades, and
384 Outputs for XGA/SXGA Applications
© 2003 National Semiconductor Corporation DS200432 www.national.com
is a constraint of the test environment, not the performance of the part. Note 10: Current into device pins is defined as positive. Current out of device pins is defined as negative. |V OUT −V IN| > 500mV. FIGURE 1. RSDS Signal Definition
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Timing Diagrams (Continued) 20043204 20043205 20043217 FPD33584 www.national.com 6
The FPD33584 is a low power, low EMI, 384 output column driver with 64 gray level capability (6-bit). It provides direct drive for TFT-LCD displays, eliminating the need for V com modulation. Direct drive significantly reduces system power consumption and also reduces component count while pro- viding superior image quality and cross-talk margin. The FPD33584 utilizes National’sCharge Conservation Technol- ogy that recovers energy stored in the capacitance of the column lines to reduce power consumption further. The FPD33584 is designed for use in systems using dot inversion as the method of polarity inversion. Column inver- sion and N-line inversion are also supported. Other modes of polarity inversion including line inversion and frame inversion are not supported. Digital video data inputs to the FPD33584 are received via a low power, low EMI Reduced Swing Differential Signaling (RSDS) bus. The RSDS digital video commands one of 64 gray level voltages on each output. Output voltages are driven with individual high drive, low offset operational am- plifiers. Data loading and line buffering is accomplished by means of an internal, bi-directional shift register. GAMMA CORRECTION The FPD33584 is designed to offer compatibility with a wide range of panel gamma characteristics. The output voltage levels corresponding to each of the 64 gray level commands can be externally adjusted to match the desired gamma characteristics of the display by means of two internal resistor-string DACs (RDACs). One RDAC provides the high-polarity output voltages (voltages higher than V com) and the other provides the low-polarity output voltages (voltages lower than V com). The FPD33584 is available with several R-DAC resistance curve options, all of which have been carefully designed to accurately match the natural, inverse gamma of a twisted FPD33584 www.national.com7
Functional Description (Continued) When POL is low, odd numbered outputs (1, 3, 5 ,... 383) are controlled by VGMA6 through VGMA10 and even num- bered outputs are controlled by VGMA1 through VGMA5. When POL is high, odd numbered outputs are controlled by VGMA1 through VGMA5 and even numbered outputs are controlled by VGMA6 through VGMA10. The POL signal for line #n is sampled at the rising edge of CLK1 on line #n−1. DIO1/DIO2 — Data Loading Enable 1 and 2 (I/O) The DIO1 and DIO2 pins allow several FPD33584 column drivers to be daisy chained together. The start pulse (SP or STH) from the timing controller is connected to the input DIOx pin on the first column driver in the chain. The input DIO for the remaining column drivers in the chain are con- nected to the output DIO from the preceding column driver. The SHL pin controls whether DIO1 or DIO2 is configured as the input. If SHL is high, then the DIO1 pin is configured as an input and the DIO2 pin as an output. If SHL is low, the DIO2 pin is configured as an input and the DIO1 pin as an output. The input DIOx pulse is latched on the falling edge of CLKP DATPOL— Digital Data Invert (input) When DATPOL is high, RSDS data is inverted. The DATPOL pin can be tied either high or low through connection to a neighboring pin on a custom package eliminating the need to connect the pin to the PCB. SHL — Data Shift Direction (input) The SHL pin controls the data load direction. When SHL is high, the data is loaded from output 1 to output 384, DIO1 is configured as an input, and DIO2 is configured as an output. When SHL is low, the data is loaded from output 384 to output 1, DIO2 is configured as an input, and DIO1 is con- figured as an output. The SHL pin can be tied off in the custom package, eliminating the need to connect it to the PCB. RPI1/ RPI2— Repair Amp Input 1 and 2 (input) The input signal for the repair line buffers. These buffers are optional and when not used, the input should be tied to ground. RPI1 and RPI2 can be tied to ground with a connec- tion in the package, eliminating the need to connect them to the PCB. RPO1/ RPO2— Repair Amp Output 1 and 2 (output) The output of the repair line buffers. These outputs are current buffered copies of their respective inputs. When not in use, RPO1 and RPO2 can be left unconnected. TIME0/ TIME1— Charge Share Time Select Pins (input) The TIME0 and TIME1 pins define the length of charge share time. Table 1 lists the charge share time options defined by TIME0 and TIME1. Both of these pins have internal pull-down resistors and default to a logic low state. They can also be tied high in the package, eliminating the need to connect them to the PCB. V GMA1–VGMA10 — RDAC References (input) The reference voltages to the upper and lower RDACs used to control the inverse gamma transfer function of the driver. Option - Any or all of the inputs V GMA2 through VGMA4 and VGMA7 through VGMA9 can be left undriven (floating). VDD1 — Digital Voltage Supply (power) Positive supply voltage for the digital logic functions of the driver. Nominally 3.3V. VDD2 — Analog Voltage Supply (power) Positive supply voltage for the analog functions of the driver. Nominally between 8.0 and 10.0V VSS1 — Digital Ground (power) Digital ground reference voltage. Typically tied to V SS2 on the PCB. VSS2 — Analog Ground (power) Analog ground reference voltage. Typically tied to V SS1 on the PCB FPD33584 www.national.com9
FIGURE 4. FPD33584A R-DAC Configuration
FIGURE 5. FPD33584A Lower Gamma Voltages
FIGURE 6. FPD33584A Upper Gamma Voltages
FIGURE 7. FPD33584B R-DAC Configuration
FIGURE 8. FPD33584B Lower Gamma Voltages (compatible with Samsung S6C0666)
FIGURE 9. FPD33584B Upper Gamma Voltages (compatible with Samsung S6C0666)
FIGURE 10. FPD33584C R-DAC Configuration
FIGURE 11. FPD33584C Lower Gamma Voltages (compatible with NEC µPD17632A)
FIGURE 12. FPD33584C Upper Gamma Voltages (compatible with NEC µPD17632A)
FIGURE 13. FPD33584D R-DAC Configuration (compatible with Hitachi HD66323)
FIGURE 14. FPD33584D Lower Gamma Voltages (compatible with Hitach HD66323)
FIGURE 15. FPD33584D Upper Gamma Voltages (compatible with Hitach HD66323)
FIGURE 16. FPD33584F R-DAC Configuration
FIGURE 17. FPD33584F Lower Gamma Voltages
FIGURE 18. FPD33584F Upper Gamma Voltages
FIGURE 19. FPD33584G R-DAC Configuration
FIGURE 20. FPD33584G Lower Gamma Voltages
FIGURE 21. FPD33584G Upper Gamma Voltages
FIGURE 22. FPD33584 R-DAC Resistance Values
Note: This figure represents a FPD33584 die oriented pad side up. FIGURE 23. FPD33584 I/O Configuration
Ordering Information
Part Number Gamma Curve Custom Package # Package Suffix Package Type FPD33584 A, B, C, D, F, G XX CT TCP FPD33584 A, B, C, D, F, G XX CF COF Note 12: Custom Package # is assigned by National Semiconductor for each custom TCP or COF design LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Fax: 65-6250 4466 Email: ap.support@nsc.com Tel: 65-6254 4466 National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: nsj.crc@jksmtp.nsc.com Tel: 81-3-5639-7560 www.national.com FPD33584 Low Power, Low EMI, TFT-LCD Column Driver with RSDS Inputs, 64 Grayshades, and National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the righ t at any time without notice to change said circuitry and specifications.