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Technical content
Features
+12V Vcc Supply Voltage Feedback Reference Voltage: 0.8V (±2%) Fixed Frequency Oscillator: 300 / 600KHz Peak Output Driving Capability: 500mA Internal Soft Start Function High-Gain Voltage Mode PWM Control Over Current Protection by detecting Low-side MOS voltage drop Package: SOP8 (EP)
Applications
Graphic Card Telecom and Datacom Applications High Power DC-DC Regulators Typical Application Circuit
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Function Block Diagram Reference Regulator Soft-Start OCP / SCP Oscillator Driver Logic FB LGATE UGATE SW BOOT COMP GND 0.4V 0.8V UVLO Emor Amp 20µA PWM Compartor 0.4V 21.6K VCC 30uA VCC EN 0.8V
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Pin Descriptions SOP-8L (EP) LGATE BOOT UGATE GND SW COMP FB VCC 5101 9Fa86L EP Bottom View LGATE BOOT UGATE GND SW COMP FB VCC 5101A 9Fa86L EP Bottom View Name No. I/O Description BOOT 1 P Boosted Power Supply Pin for High Side MOS Gate Driving UGATE 2 O High Side Gate Driver Output GND 3 P Ground LGATE 4 O Low Side Gate Driver Output VCC 5 P IC Power Supply FB 6 I Error Amplifier Inverting Input COMP 7 O Error Amplifier Output SW 8 I Switch Signal Input EP 9 P Exposed PAD is GND
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Marking Information SOP-8L (EP) Halogen Free: Halogen free product indicator Lot Number: Wafer lot number’s last two digits For Example: 132386TB 86 Internal ID: Internal Identification Code Per-Half Month: Production period indicated in half month time unit For Example: January → A (Front Half Month), B (Last Half Month) February → C (Front Half Month), D (Last Half Month) Year: Production year’s last digit
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product .
Ordering Information
Part Number OSC Freq. Operating Temperature Package MOQ Description FP5101XR-LF 300KHz -40°C ~ +85°C SOP-8L (EP) 2500EA Tape & Reel FP5101AXR-LF 600KHz -40°C ~ +85°C SOP-8L (EP) 2500EA Tape & Reel Absolute Maximum Ratings Parameter Symbol Conditions Min. Typ. Max. Unit Power Supply Voltage VCC 15 V BOOT Supply Voltage VBOOT -0.6 30 V BOOT to SW (VBOOT-VSW) 15 V SW Voltage VSW -0.6 15 V UGATE Voltage VUGATE VSW -0.3 VBOOT + 0.3 V LGATE Voltage VLGATE -0.6 VCC + 0.3 V FB, COMP Voltage -0.6 6 V Allowable Power Dissipation SOP-8L (EP) 1.3 W Thermal Resistance (Junction to Ambient) θJA SOP-8L (EP) +50 °C / W Thermal Resistance (Junction to Case) θJC SOP-8L (EP) +10 °C / /W SOP8 (EP) Lead Temperature (soldering, 10sec) +260 °C IR Re-flow Soldering Curve
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Recommended Operating Conditions Parameter Symbol Conditions Min. Typ. Max. Unit Supply Voltage VCC 10.8 12 13.2 V Operating Temperature -40 +85 °C Operating Junction Temperature -40 +125 °C Parameter Symbol Conditions Min. Typ. Max. Unit Input Supply Current Standby Current ISHUTDOWN VCOMP=0V 640 µA Supply Current ISUPPLY UGATE and LGATE open 5 mA Enable / Disable UVLO Threshold Voltage VUVLO 8.8 9.6 10.4 V Hysteresis Voltage VHYS 0.4 0.8 1.6 V Oscillator Oscillation Frequency f FP5101 250 300 350 KHz FP5101A 500 600 700 KHz Ramp Amplitude ΔVOSC 1.5 VP-P
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Parameter Symbol Conditions Min. Typ. Max. Unit Reference Reference Voltage VFB 0.784 0.8 0.816 V VFB change with Voltage ΔVFB VCC=10.8V to 13.2V 5 20 mV VFB change with Temperature ΔVFB / ΔT TA = -40°C to 85°C 1 % Error Amplifier Unity Gain Bandwidth Product BW 15 MHz Open Loop DC Gain AVO 88 dB Gate Drivers Upper Gate Source Current IUGASR VBOOT ﹣VSW=12V VBOOT ﹣VUGATE=6V 300 mA Upper Gate Source Resistance RUGSR VBOOT ﹣VSW=12V VBOOT ﹣VUGATE=1V 7 10 Ω Upper Gate Sink Resistance RUGSN VBOOT ﹣VSW=12V VUGATE ﹣VSW=1V 4 8 Ω Lower Gate Source Current ILGSR VCC=12V, VLGATE =6V 500 mA Lower Gate Source Resistance RLGSR VCC=12V, VCC ﹣VLGATE=1V 4 6 Ω Lower Gate Sink Resistance RLGSN VCC=12V, VLGATE=1V 2 4 Ω Protection FB Under Voltage Protection VFBUV 0.3 0.4 0.5 V Over Current Threshold VOC -210 -250 -290 mV Soft-Start Interval TSS 2 3.2 4.2 ms
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . TYPICAL CHATACTERISTICS UGATE Rising Time UGATE Falling Time CH1:UGATE CH2:LGATE CH3: SW CH1:UGATE CH2:LGATE CH3: SW Load Transient Response Power On then Trigger OCP CH3:Vout CH4:I L CH1:UGATE CH4:I L OCP then Power On Power On then Shorted CH1:UGATE CH4:I L CH1:UGATE CH4:I L
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Shorted then Power On Power ON CH1:UGATE CH4:I L CH1:Vin CH2:HGATE CH3:Vout CH4:I L Power OFF CH1:Vin CH2:HGATE CH3:Vout CH4: IL
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Function Description Power On Reset The FP5101 / A automatically initializes upon input power V CC. The Power -On Reset (POR) function continually monitors the bias voltage at the V CC pin. The POR threshold level is typically 9.6V at VCC rising. VIN Detection After POR is outstripped, the FP5101 / A continuously generates a 10kHz pulse train with 1μs pulse width to turn on the upper MOSFET for detecting the existence of V IN. FP5101 / A keeps monitoring SW pin voltage during the detection period. When the SW voltage crosses 1.5V two times, VIN existence is recognized and the FP5101 / A initiates its soft start cycle as described in next section. Soft Start After the existence of V IN is detected, the soft -start (SS) begins automatically. The feedback voltage (VFB) is clamped by internal linear ramping up SS voltage during this period , causing PWM pulse width increasing slowly and thus inducing little surge current. The maximum load current is available after the soft-start cycle is completed. Soft-start completes when SS voltage exceeds internal reference voltage (0.8V), the time duration is about 3.2ms. Over Current Protection The FP5101 / A senses the current flowing through lower MOSFET for over current protection (OCP) by sensing the SW pin voltage as shown in the Functional Block Diagram. A 30μA current source flows through the internal resistor 21.6kΩ to SW pin causing 0.65V voltage drop across the resistor. OCP is triggered if the voltage at SW pin (drop of lower MOSFET VDS) is lower than -0.25V when low side MOSFET conducting. Accordingly inductor current threshold for OCP is a function of conducting resistance of lower MOSFET RDS (ON) as : )ON(DS OCSET R V25.0I If MOSFET with RDS (ON) = 10mΩ is used, the OCP threshold current is about 25A. Once OCP is triggered, the FP5101 / A enters hiccup mode and re -soft starts again. The FP5101 / A shuts down after OCP hiccups twice. To prevent the over current protection occurs in the normal operating load range, the drift of all
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . parameters in the above equation should be considered. -The RDS (ON) of MOSFET var ies with temperature and gate to source voltage, the user should determine the maximum RDS (ON) in manufacturer’s datasheet. -The parasitic series resistance in PCB’s trace must be considered and added to R DS (ON) in the above equation. -The minimum IOCSET (=-0.21V / RDS (ON)) should be considered over the above equation. Note that the IOCSET is the current flow through the low side MOSFET. IOCSET must be greater than maximum output current add the half of inductor ripple current. That is, I II )MAX(L )MAX(OOCSET LGATE>425ns LGATE=425ns LGATE<425ns LGATE<<425ns To avoid the gate transition noise and ringing on the SW pin, the actual monitoring of the bottom-side MOSFET's on -resistance starts 200ns (nominal) after the LGATE rising edge. The
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . monitoring ends when the LGATE goes low. The OCP can be detected anywhere within the above window. If the regulator is running at high UGATE duty cycles (around 75% for 600kHz or 87% for 300kHz operation), then the LGATE pulse width may be not wide enough for the OCP to properly sample the VSW. For those cases, if the LGATE is too narrow (or not there at all) for 3 consecutive pulses, then the third pulse will be stretch ed and/or inserted to the 425ns minimum width. This allows for OCP monitoring every three pulses under this kind of condition. This can introduce a small pulse-width error on the output voltage, which will be corrected on the next pulse; and the output ripple voltage will have an unusual 3-clock pattern, which may look like jitter.
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product .
Application Information
The FP5101 / A is a voltage-mode controller for a synchronous-rectified buck converter. Figure 1 highlights the voltage-mode control loop for a synchronous-rectified buck converter. The output voltage (VOUT) is regulated to the reference voltage level. The error amplifier (E RROR AMP) output (VCOMP) is compared with the oscillator (OSC) triangular wave to provide a pulse -width modulated (PWM) wave with an amplitude of VIN at the SW node. The PWM wave is smoothed by the output LC filter (LOUT and COUT). The modulator transfer function is the small -signal transfer function of VOUT / VCOMP. This function is dominated by a DC gain and the output filter (LOUT and COUT), with a double-pole break frequency at FLC and a zero at F ESR. The DC gain of the modulator is the input voltage (V IN) divided by the peak-to-peak oscillator voltage ( ΔVOSC). The following equations define the modulator bre ak frequencies as a function of the output LC filter: OUTOUT LC CL2 The ESR zero is contributed by the ESR associated with the output capacitance. Note that this requires the output capacitor should have enough ESR to satisfy stability requireme nts. The ESR zero of the output capacitor is expressed as following ESRC2 OUT ESR
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . OS C ΔVOSC ZFB ZIN VREF VIN DRIVER DRIVER PWM COMPARATO R Vcomp ERROR AMP COUT ESR VOUT LOUT VREF FBCOMP C2 R2 R3C3 ZFB ZIN VOUT DETAILED COMPENSATION COMPONENTS Figure 1 Voltage-mode Buck Converter Compensation Design The compensation network consists of the error amplifier (internal to the FP5101 / A) and the impedance networks Z IN and ZFB. The goal of the compensation network is to provide a closed -loop transfer function with the highest 0dB crossing frequency (F 0dB) and adequate phase margin. Phase margin is the difference between the closed loop phase at F0dB and 180 degrees. The equations below relate the compensation network’s poles, zeros, and gain to the components (R 1, R2, R3, C1, C2, and C3), shown in Figure 1. 1Z CR2 1F )CC CC(R2
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . )RR(C2 313 2Z 2P CR2 1F Use the following steps to locate the poles and zeros of the compensation network . 1. Pick gain (R2 / R1) for the desired converter bandwidth. Choose a value for R1, usually between 1K and 10K. Select the desired zero crossover frequency ESRSO FF)10/1~5/1(:F Use the following equation to calculate R2: LC O IN OSC 2 RF F V VR 2. Place the first zero below the filter’s double pole (~75% FLC). LC1Z F75.0F Calculate the C2 by the equation: 75.0FR2 LC2 3. Place the first pole at the ESR zero. ESR1P FF Calculate the C1 by the equation: 1FCR2 CC ESR22 4. Place the second zero at filter’s double pole. 5. Place the second pole at half the switching frequency. S2P F5.0F LC2Z FF Combine above two equations will get the following component equations 1F2 F RR LC S 3 FR 1C 6. Check the gain against the error amplifier’s open loop gain. 7. Estimate phase margin. Repeat if necessary.
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Component Selection Input capacitor Selection The voltage rating at maximum ambient temperature should be 1.25 to 1.5 times the maximum input voltage. More conservative approaches can bring the voltage rating up to 2 times the maximum input voltage. H igh frequency decoupling, which is highly recommended, is implemented through the use of ceramic capacitors in parallel with the bulk capacitor filtering. In switch mode, the input current is discontinuous in a buck converter. The source current of the high-side MOSFET is a square wave. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The RMS value of input capacitor current can be calculated by: IN O IN O MAX_ORMS V V1V VII It can be seen that when VO is half of VIN, CIN is under the worst current stress. The worst current stress on CIN is IO_MAX/2. Inductor Selection The value of the inductor is selected based on the desired ripple current. Large inductance gives low inductor ripple current and small inductance result in high ripple current. However, the larger value inductor has a larger physical size, higher series resistance, and/or lower saturation current. In experience, the value is to allow the peak -to-peak ripple current in the inductor to b e 10%~20% maximum load current. The inductance value can be calculated by: IN O O OIN IN O L OIN V V I%)20~%10(2f )VV( V V If )VV(L The inductor ripple current can be calculated by: IN OO L V V1Lf VI Choose an inductor that does not saturate under the worst -case load conditions e ven at the highest operating temperature. (The load current plus half the peak -to-peak inductor ripple current). The peak Inductor current is: III L OPEAK_L
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . MOSFET Selection There are three major aspects of power loss that are associated with th e MOSFET. These are conduction losses, switching losses, and gate drive power losses. gateswitchingconduction)MOSFET(D PPPP sGSGatesfrOIN)ON(DS O)MOSFET_HIigh(D fVQf)tt(IV2 sGSGatesfrOf)ON(DS O)MOSFET_HIigh(D fVQf)tt(IV2 INV = Input Voltage for fV = Lower side turn on VDS OI = Output Current D = Duty Cycle rt = MOSFET rising time ft = MOSFET rising time sf = Switching Frequency GateQ = MOSFET gate charge GSV = MOSFET gate voltage Output Capacitor Selection The output capacitor is required to maintain the DC output voltage. Low ESR capacitors are preferred to keep the output voltage ripple low. In a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. The output ripple is determined by: OUT COUTLO Cf8 1ESRIV Where f = operating frequency, COUT= output capacitance and ΔIL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔI L increases with input voltage. The most commonly used choice for output bulk capacitors is aluminum electrolytic capacitors because of their low cost and low ESR. Due to the capacitor ESR vari es with frequency, user should consider the ESR value rated at the PWM frequency. The output capacitance should also include a number of small capacitance value ceramic capacitors placed as close as possible to the chip; 0.1μF and 0.01μF are recommended values.
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . PC Board Layout Checklist The switching power converter layout is critical to achieve low power losses, clean waveforms, and stable operation. It needs careful attention. Following are specific recommendations for good board layout: 1. Keep the high current traces and load connections as short as possible. 2. Use thick copper plated PCB whenever possible to achieve higher efficiency. 3. Keep the loop area between the SW node, low -side MOSFET, Inductor, and the output capacitor as small as possible. 4. Route high DV / Dt signals, such as SW node, away from the error amplifier input/output pins. Keep both the high DV / Dt signals and the error amplifier input/output signals as short as possible. 5. Place VCC ceramic decoupling capacitors very close to VCC pin. 6. All input signals are referenced with respect to GND pin. Dedicate large copper area of t he PCB for a GND plane. 7. Minimize GND loops in the layout to avoid EMI-related issues. 8. Use wide traces for the lower gate drive to keep the drive impedances low. 9. Use wide land areas with appropriate thermal vias to effectively remove heat from the MOSFETs. 10. Preserve the snubber circuit to minimize high frequency ringing at SW node for EMI issues.
This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product . Package Outline SOP-8L (EP) UNIT: mm Exposed PAD Dimensions: Note: 1. Package dimensions are in compliance with JEDEC outline: MS-012 AA. 2. Dimension ”D” does not include molding flash, protrusions or gate burrs. 3. Dimension “E” does not include inter-lead flash or protrusions. Symbols Min. (mm) Max. (mm) A 1.346 1.752 A1 0.050 0.152 A2 1.498 D 4.800 4.978 E 3.810 3.987 H 5.791 6.197 L 0.406 1.270 θ° 0° 8° Symbols Min. (mm) Max. (mm) E1 2.184 REF D1 2.971 REF