FP1189 ETC1 | Alldatasheet
Document overview
- Manufacturer or author: www.DataSheet4U.com
- PDF pages: 10
Technical content
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM Product Features
- 50 4000 MHz
- +27 dBm P1dB
- +40 dBm Output IP3
- High Drain Efficiency
- 20.5 dB Gain @ 900 MHz
- MTTF >100 Years
- SOT-89 SMT Package
Applications
- Mobile Infrastructure
- CATV / DBS
- W-LAN / ISM
- RFID
- Defense / Homeland Security
- Fixed Wireless Product Description The FP1189 is a high performance ½-Watt HFET (Heterostructure FET) in a low-cost SOT-89 surface- mount package. This device works optimally at a drain bias of +8 V and 125 mA to achieve +40 dBm output IP3 performance and an output power of +27 dBm at 1-dB compression, while providing 20.5 dB gain at 900 MHz. The device conforms to WJ Communications long history of producing high reliability and quality components. The FP1189 has an associated MTTF of greater than 100 years at a mounting temperature of 85°C. All devices are 100% RF & DC tested. The product is targeted for use as driver amplifiers for wireless infrastructure where high performance and high efficiency are required. Functional Diagram Function Pin No. Input / Gate 1 Output / Drain 3 Ground 2, 4 Specifications DC Parameter Units Min Typ Max Saturated Drain Current, Idss (1) mA 220 290 360 Transconductance, Gm mS 155 Pinch Off Voltage, Vp (2) V -2.1 Thermal Resistance °C / W 68 Junction Temperature (3) °C 160 RF Parameter (4) Units Min Typ Max Frequency Range MHz 50 900 4000 Small Signal Gain dB 20.5 SS Gain (50 Ω , unmatched) dB 17 21 Maximum Stable Gain dB 24 Output P1dB dBm +27.4 Output IP3 (5) dBm +40 Noise Figure dB 2.7 1. Idss is measured with Vgs = 0 V, Vds = 3 V. 2. Pinch-off voltage is measured when Ids = 1.2 mA. 3. The junction temperature ensures a minimum MTTF rating of 1 million hours of usage. 4. Test conditions unless otherwise noted: T = 25ºC, V DS = 8 V, IDQ = 125 mA, frequency = 900 MHz in a tuned application circuit with ZL = ZLOPT, ZS = ZSOPT (optimized for output power). 5. 3OIP measured with two tones at an output power of +12 dBm/tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule. Typical Performance Parameter (6) Units Typical Frequency MHz 915 1960 2140 S21 dB 20.6 15.7 14.7 S11 dB -13 -26 -24 Output P1dB dBm +27.4 +27.2 +27.2 Output IP3 dBm +39.9 +40.4 +39.7 Noise Figure dB 2.7 3.7 4.3 Channel Power (7) @ -45 dBc ACPR dBm +21 +20.8 +18.4 Drain Voltage V +8 Drain Current mA 125 6. Typical parameters represent performance in an application circuit. 7. An IS-95 signal is used for 915 / 1960 MHz. A 3GPP W-CDMA signal is used for 2140 MHz. Absolute Maximum Rating Ordering Information Parameter Rating Part No. Description Operating Case Temperature -40 to +85 °C FP1189 ½ -Watt HFET Storage Temperature -55 to +125 °C FP1189-PCB900S 870 960 MHz Application Circuit DC Power 2.0 W FP1189-PCB1900S 1930 1990 MHz Application Circuit RF Input Power (continuous) 6 dB above Input P1dB FP1189-PCB2140S 2110 2170 MHz Application Circuit Drain to Gate Voltage, Vdg +14 V Junction Temperature +220° C Operation of this device above any of these parameters may cause permanent damage. RF IN GND RF OUT GND 1 2 3
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM Typical Device Data S-Parameters (VDS = +8 V, IDS = 125 mA, T = 25°C, calibrated to device leads) 0 1 2 3 4 5 6 Frequency (GHz) S21, Maximum Stable Gain vs. Frequency S21, MSG (dB) DB(|S[2,1]|) DB(MSG) 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 S11 Swp Max 6GHz Swp Min 0.05GHz 1.0 1.0-1.0 10.0 10.0 -10.0 5.0 5.0 -5.0 2.0 2.0 -2.0 3.0 3.0 -3.0 4.0 4.0 -4.0 0.2 0.2 -0.2 0.4 0.4 -0.4 0.6 0.6 -0.6 0.8 0.8 -0.8 S22 Swp Max 6GHz Swp Min 0.05GHz Note: Measurements were made on the packaged device in a test fixture with 50 ohm input and output lines. The S-parameters shown are the de-embedded data down to the device leads and represents typical performance of the device. Freq (MHz) S11 (mag) S11 (ang) S21 (mag) S21 (ang) S12 (mag) S12 (ang) S22 (mag) S22 (ang) Device S-parameters are available for download off of the website at: http://www.wj.com 1 2 3
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, Ids = 125 mA, 25°°°°C Frequency MHz 870 915 960 S21 Gain dB 20.9 20.6 19.8 S11 Input Return Loss dB -10 -13 -10 S22 Output Return Loss dB -5.2 -6.0 -7.6 Output P1dB dBm +27.5 +27.4 +27.5 Output IP3 (+12 dBm / tone, 1 MHz spacing) dBm +39.9 Noise Figure dB 2.7 2.7 2.6 IS-95 Channel Power @ -45 dBc ACPR dBm +21 RES ID=
10 Ohm
ID= 12 nH CAP ID= 3.9 pF C13 IND ID= 47 nH RES ID=
20 Ohm
ID= 68 pF CAP ID= 18 pF CAP ID= 68 pF CAP ID= 10 0 0 p F CAP ID= DNP pF C10 RES ID=
0 Ohm
ID= DNP pF C12 IND ID= 47 nH CAP ID= 18 pF CAP ID= 68 pF C7 CAP ID= 1000 pF CAP ID= 1e5 pF C11 CAP ID= DNP pF CAP ID = 68 pF SUBCKT NET= ID= "FP1189" PO RT
50 Ohm
-Vgg Vds = 8 V @ 125 mA 14 mil GETEKTM ML200DSS (εr = 4.2) The main microstrip line has a line impedance of 50 Ω. Bill of Materials Ref. Desig. Value Part style Size C1, C3, C7, C9 68 pF Chip capacitor 0603 C2, C6 18 pF Chip capacitor 0603 C4, C8 1000 pF Chip capacitor 0603 C11 0.1 µF Chip capacitor 1206 C13 3.9 pF Chip capacitor 0603 L1, L3 47 nH Multilayer chip inductor 0603 L2 0 Ω Chip resistor 0603 L4 12 nH Multilayer chip inductor 0603 R1 10 Ω Chip resistor 0603 R2 20 Ω Chip resistor 0603 Q1 FP1189 WJ 0.5W HFET SOT-89 C5, C12, C10 Do Not Place
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM S11 vs. Frequency -30 -25 -20 -15 -10 860 880 900 920 940 960 Frequency (MHz) S11 (dB) -40c +25c +85c S21 vs. Frequency 860 880 900 920 940 960 Frequency (MHz) S21 (dB) -40c +25c +85c S22 vs. Frequency -30 -25 -20 -15 -10 860 880 900 920 940 960 Frequency (MHz) S22 (dB) -40c +25c +85c P1dB vs. Frequency 860 880 900 920 940 960 Frequency (MHz) P1dB (dBm) -40c +25c +85c Noise Figure vs. Frequency 860 880 900 920 940 960 Frequency (MHz) NF (dB) -40c +25c +85c ACPR vs. Channel Power IS-95, 9 Ch. Forward, ±885 kHz offset, 30 kHz Meas BW -70 -60 -50 -40 -30 16 17 18 19 20 21 22 23 24 Output Channel Power (dBm) ACPR (dBc) -40 C +25 C +85 C freq = 915 MHz OIP3 vs. Temperature -40 -15 10 35 60 85 Temperature (°C) OIP3 (dBm) freq = 915, 916 MHz +12 dBm / tone IMD products vs. Output Power fundamental frequency = 915 MHz, 916 MHz; Temp = +25° C -80 -60 -40 -20 0 4 8 1 21 62 02 4 Output Power (dBm) IMD products (dBm) IMD_Low IMD_High OIP3 vs. Output Power fundamental frequency = 915 MHz, 916 MHz; Temp = +25° C 0 4 8 1 21 62 02 4 Output Power (dBm) OIP3 (dBm) Output Power / Gain vs. Input Power frequency = 915 MHz, Temp = -40° C -12 -8 -4 0 4 8 12 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain Output Power / Gain vs. Input Power frequency = 915 MHz, Temp = +25° C -12 -8 -4 0 4 8 12 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain Output Power / Gain vs. Input Power frequency = 915 MHz, Temp = +85° C -12 -8 -4 0 4 8 12 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, Ids = 125 mA, 25°°°°C Frequency MHz 1930 1960 1990 S21 Gain dB 15.8 15.7 15.5 S11 Input Return Loss dB -26 -26 -24 S22 Output Return Loss dB -9.2 -9.6 -9.0 Output P1dB dBm +27.4 +27.2 +27.4 Output IP3 (+12 dBm / tone, 1 MHz spacing) dBm +40.4 Noise Figure dB 3.7 IS-95 Channel Power @ -45 dBc ACPR dBm +20.8 RES ID= ID= DNP pF C13 IND ID= 22 nH RES ID=
100 Ohm
ID= 33 pF CAP ID= DNP pF IND ID= 22 nH CAP ID= 33 pF CAP ID= DNP pF CAP ID= DNP pF C8 CAP ID= DNP pF C12 CAP ID= 0.5 pF CAP ID= 33 pF CAP ID= 1.8 pF C15 CAP ID= DNP pF C13 IND ID= 2.7 nH CAP ID= 1e5 pF C11 CAP ID= DNP pF CAP ID= 33 pF CAP ID= DNP pF C10 SUBCKT NET= ID= "FP1189" PORT -Vgg Vds = 8 V @ 125 mA 14 mil GETEKTM ML200DSS (εr = 4.2) The main microstrip line has a line impedance of 50 Ω. Bill of Materials Ref. Desig. Value Part style Size C1, C4, C6, C9 33 pF Chip capacitor 0603 C5 0.5 pF Chip capacitor 0603 C11 0.1 µF Chip capacitor 1206 C15 1.8 pF Chip capacitor 0603 L1, L3 22 nH Multilayer chip inductor 0603 L2 2.7 nH Multilayer chip inductor 0603 R1 100 Ω Chip resistor 0603 R2 10 Ω Chip resistor 0603 Q1 FP1189 WJ 0.5W HFET SOT-89 C2, C3, C7, C8, C10, C12, C13, C14 Do Not Place
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM S11 vs. Frequency -30 -25 -20 -15 -10 1930 1950 1970 1990 Frequency (MHz) S11 (dB) -40C +25C +85C S21 vs. Frequency 1930 1950 1970 1990 Frequency (MHz) S21 (dB) -40C +25C +85C S22 vs. Frequency -30 -25 -20 -15 -10 1930 1950 1970 1990 Frequency (MHz) S22 (dB) -40C +25C +85C P1dB vs. Frequency 1930 1950 1970 1990 Frequency (MHz) P1dB (dBm) -40C +25C +85C Noise Figure vs. Frequency 1930 1950 1970 1990 Frequency (MHz) NF (dB) -40C +25C +85C ACPR vs. Channel Power IS-95, 9 Ch. Forward, ±885 kHz offset, 30 kHz Meas BW -70 -60 -50 -40 -30 16 17 18 19 20 21 22 23 24 Output Channel Power (dBm) ACPR (dBc) -40 C +25 C +85 C freq = 1960 MHz OIP3 vs. Temperature -40 -15 10 35 60 85 Temperature (°C) OIP3 (dBm) freq = 1960, 1961 MHz +12 dBm / tone IMD products vs. Output Power fundamental frequency = 1960, 1961 MHz; Temp = +25° C -80 -60 -40 -20 0 4 8 1 21 62 02 4 Output Power (dBm) IMD products (dBm) IMD_Low IMD_High OIP3 vs. Output Power fundamental frequency = 1960, 1961 MHz; Temp = +25° C 0 4 8 1 21 62 02 4 Output Power (dBm) OIP3 (dBm) Output Power / Gain vs. Input Power frequency = 1960 MHz, Temp = -40° C -4 0 4 8 12 16 20 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain Output Power / Gain vs. Input Power frequency = 1960 MHz, Temp = +25° C -4 0 4 8 12 16 20 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain Output Power / Gain vs. Input Power frequency = 1960 MHz, Temp = +85° C -4 0 4 8 12 16 20 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, Ids = 125 mA, 25°°°°C Frequency MHz 2110 2140 2170 S21 Gain dB 14.7 14.7 14.7 S11 Input Return Loss dB -24 -24 -24 S22 Output Return Loss dB -7.6 -9.0 -9.8 Output P1dB dBm +27.1 +27.2 +26.8 Output IP3 (+12 dBm / tone, 1 MHz spacing) dBm +39.7 Noise Figure dB 4.2 4.3 4.2 W-CDMA Channel Power @ -45 dBc ACPR dBm +18.4 RES ID= ID= 18 nH RES ID= ID= 22 pF CA P ID= DNP pF IND ID= 18 nH CAP ID= DNP pF CAP ID= 22 pF CAP ID= 1e5 pF CAP ID= 22 pF IN D ID= 2.7 nH CAP ID= 33 pF CAP ID= 0.5 pF C5 CAP ID= DNP pF CA P ID= DNP pF C11 CAP ID= 1.5 pF C10 SUBCKT NET= ID= "FP1189" PORT -Vgg Vds = 8 V @ 125 mA 14 mil GETEKTM ML200DSS (εr = 4.2) The main microstrip line has a line impedance of 50 Ω. Bill of Materials Ref. Desig. Value Part style Size C1, C7, C9 22 pF Chip capacitor 0603 C3 33 pF Chip capacitor 0805 C5 0.5 pF Chip capacitor 0603 C8 0.1 µF Chip capacitor 1206 C10 1.5 pF Chip capacitor 0603 L1, L2 18 nH Multilayer chip inductor 0603 L3 2.7 nH Multilayer chip resistor 0603 R1 100 Ω Chip resistor 0603 R2 10 Ω Chip resistor 0603 Q1 FP1189 WJ 0.5W HFET SOT-89 C2, C4, C6, C11 Do Not Place
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM S11 vs. Frequency -30 -25 -20 -15 -10 2110 2130 2150 2170 Frequency (MHz) S11 (dB) -40c +25c +85c S21 vs. Frequency 2110 2130 2150 2170 Frequency (MHz) S21 (dB) -40c +25c +85c S22 vs. Frequency -30 -25 -20 -15 -10 2110 2130 2150 2170 Frequency (MHz) S22 (dB) -40c +25c +85c P1dB vs. Frequency 2110 2130 2150 2170 Frequency (MHz) P1dB (dBm) -40C +25C +85C Noise Figure vs. Frequency 2110 2130 2150 2170 Frequency (MHz) NF (dB) -40c +25c +85c ACPR vs. Channel Power 3G PP W -CDM A, Test M odel 1 +64 DPCH, ±5 M Hz offset -65 -60 -55 -50 -45 -40 -35 13 14 15 16 17 18 19 20 21 Output Channel Power (dBm) ACPR (dBc) -40 C +25 C +85 C freq = 2140 MHz OIP3 vs. Temperature -40 -15 10 35 60 85 Temperature (°C) OIP3 (dBm) freq = 2140, 2141 MHz +12 dBm / tone Output Power / Gain vs. Input Power frequency = 2140 MHz, Temp = +25° C 0 4 8 1 21 62 0 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain OIP3 vs. Output Power fundamental frequency = 1960, 1961 MHz; Temp = +25° C 0 4 8 1 21 62 02 4 Output Power (dBm) OIP3 (dBm) Output Power / Gain vs. Input Power frequency = 2140 MHz, Temp = -40° C 048 1 2 1 6 2 0 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain IM D products vs. Output Power fundamental frequency = 2140, 2141 MHz; Temp = +25° C -80 -60 -40 -20 0 4 8 12 16 20 24 Output Power (dBm) IMD products (dBm) IM D_Low IM D_High Output Power / Gain vs. Input Power frequency = 2140 MHz, Temp = +85° C 0 4 8 1 21 62 0 Input Power (dBm) Gain (dB) Output Power (dBm) Output Power Gain
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM Application Note: Constant-Current Active-Biasing Special attention should be taken to properly bias the FP1189. Power supply sequencing is required to prevent the device from operating at 100% Idss for a prolonged period of time and possibly causing damage to the device. It is recommended that for the safest operation, the negative supply be first on and last off. With a negative gate voltage present, the drain voltage can then be applied to the device. The gate voltage can then be adjusted to have the device be used at the proper quiescent bias condition. An optional active-bias current mirror is recommended for use with the application circuits shown in this datasheet. Generally in a laboratory environment, the gate voltage is adjusted until the drain draws the recommended operating current. The gate voltage required can vary slightly from device to device because of device pinchoff variation, while also varying slightly over temperature. The active-bias circuit, shown on the right, uses dual PNP transistors to provide a constant drain current into the FP1189, while also eliminating the effects of pinchoff variation. This configuration is best suited for applications where the intended output power level of the amplifier is backed off at least 6 dB away from its compression point. With the implementation of the circuit, lower P1dB values may be measured for a Class-AB amplifier, where the device will attempt to source more drain current while the circuit tries to provide a constant drain current. The circuit should be connected directly in line with where the voltage supplies would be normally connected with the amplifier circuit, as shown the diagram. Any required matching circuitry remains the same, although it is not shown in the diagram. This recommended active-bias constant-current circuit adds 7 components to the parts count for implementation, but should cost only an extra $0.144 to realize ($0.10 for U1, $0.0029 for R1, R3, R4, R5, $0.024 for R2, and $0.0085 for C1). Temperature compensation is achieved by tracking the voltage variation with the temperature of the emitter-to-base junction of the two PNP transistors. As a 1st order approximation, this is achieved by using matched transistors with approximately the same Ibe current. Thus the transistor emitter voltage adjusts the HFET gate voltage so that the device draws a constant current, regardless of the temperature. A Rohm dual transistor - UMT1N - is recommended for cost, minimal board space requirements, and to minimize the variation between the two transistors. Minimizing the variability between the base-to-emitter junctions allow more accuracy in setting the current draw. More details can be found in a separate application note Active-bias Constant-current Source Recommended for HFETs found on the WJ website. Parameter FP1189 Pos Supply, Vdd +8 V Neg Supply, Vgg -5 V Vds +7.75 V Ids 125 mA R1 62 Ω R2 2.0 Ω R3 1.8 kΩ R4 1 kΩ R5 1 kΩ 5 2 R1 R2 1 kΩ -Vgg +Vdd Rohm UMT1N RF IN RF OUT DUT M.N. M.N. .01 µF
Specifications and information are subject to change without notice. WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • Web site: www.wj.com June 2003 FP1189 ½-Watt HFET Product Information The Communications Edge TM Outline Drawing Land Pattern Product Marking The component will be marked with an FP1189 designator with a four- or five-digit alphanumeric lot code on the top surface of the package. Tape and reel specifications for this part is located on the website in the Application Notes section. ESD / MSL Information ESD Classification: Class 1B Value: Passes at 800 V Test: Human Body Model (HBM) Standard: JEDEC Standard JESD22-A114 ESD Classification: Class IV Value: Passes at 2000 V Test: Charged Device Model (CDM) Standard: JEDEC Standard JESD22-C101 MSL Rating: Level 3 Standard: JEDEC Standard J-STD-020A Mounting Config. Notes 1. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80 / .0135) diameter drill and have a final plated thru diameter of .25 mm (.010). 2. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. 3. Mounting screws can be added near the part to fasten the board to a heatsink. Ensure that the ground / thermal via region contacts the heatsink. 4. Do not put solder mask on the backside of the PC board in the region where the board contacts the heatsink. 5. RF trace width depends upon the PC board material and construction. 6. Use 1 oz. Copper minimum. 7. All dimensions are in millimeters (inches). Angles are in degrees.