FMS6400-1 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

■ 5.0 MHz 5th order Y ,C filters with composite summer ■ Selectable for 0dB or 6dB gain ■ 50dB stopband attenuation at 27MHz on Y , C and CV outputs ■ No external frequency selection components or clocks ■ AC-Coupled Inputs ■ AC or DC-Coupled Outputs ■ Continuous time low pass filters ■ 0.4% / 0.4° differential gain/phase on Y ,C and CV channels ■ Integrated DC restore circuitry with low tilt ■ Lead (Pb) Free SOIC-8 Package

Applications

■ Cable and Satellite set top boxes ■ DVD players ■ Personal Video Recorders (PVR) ■ Video On Demand (VOD)

Description

The FMS6400-1 is a dual Y/C 5th order Butterworth lowpass video filter optimized for mini mum overshoot and flat group delay. The device also contains a summing circuit to generate filtered composite video. In a typical application, the Y and C input signals from DACs are AC coupled into the filters. Both channels have DC restore circuitry to clamp the DC input levels during video sync. The Y and C channels use separate feed- back clamps. The clamp pulse is derived from the Y channel. All outputs are capable of driving 2V pp, AC or DC coupled, into either a single or dual video load. A single video load consists of a series 75 Ω impedance matching resistor connected to a ter- minated 75Ω line. This presents a total of 150Ω of loading to the part. A dual load would be two of these in parallel which would present a total of 75 Ω to the part. The gain of the Y , C and CV signals can be selected for 0dB or 6dB with 1Vpp input levels. All video channels are clamped during sync to establish the appro- priate output voltage reference levels. Block Diagrams S gM Sync Strip Reference and Timing 250mV gM 250mV VCC YIN CIN ASEL COUT CVOUT YOUT0 or 6dB GND 0 or 6dB

Figure 1. AC or DC-Coupled Application Diagram

3 GND Input Must be tied to Ground

output pin from the external video encoder.

7 VCC Input +5V supply

3 www.fairchildsemi.com FMS6400-1 Rev. 1A FMS6400-1 Dual Channel Video Drivers with Integrated Filters and Composite Video Summer Absolute Maximum Ratings Note: Functional operation under any of these conditions in NOT implied. Performance and reliability are guaranteed only if operating con- ditions are not exceeded. Reliability Information Recommended Operating Conditions Parameter Min. Max. Unit DC Supply Voltage -0.3 6 V Analog and Digital I/O -0.3 V cc + 0.3 V Output Current Any One Channel, Do Not Exceed 40 mA Parameter Min. Typ. Max. Unit Junction Temperature 150 °C Storage Temperature Range -65 150 °C Lead Temperature (Soldering, 10s) 300 °C Thermal Resistance (Theta JA), JEDEC Standard Multi-Layer Test Boards, Still Air 115 °C/W Parameter Min. Typ. Max. Unit Operating Temperature Range 0 70 °C Supply Voltage Range 4.75 5.0 5.25 V

4 www.fairchildsemi.com FMS6400-1 Rev. 1A FMS6400-1 Dual Channel Video Drivers with Integrated Filters and Composite Video Summer Tc = 25°C, Vcc = 5V, Vin = 1Vpp, ASEL = 1 (6dB gain), all inputs AC coupled with 0.1uF , all outputs AC cou- pled with 220uF into 150Ω loads, referenced to 400kHz; unless otherwise noted. Tc = 25°C, Vcc = 5V, Vin = 1Vpp, ASEL = 1 (6dB gain), all inputs AC coupled with 0.1uF , all outputs AC cou- pled with 220uF into 150Ω loads, referenced to 400kHz; unless otherwise noted. Notes: 1. 100% tested at 25°C Symbol Parameter Conditions Min. Typ. Max Units ICC Supply Current1 No load 50 65 mA Vi Input Voltage Max 1.4 V pp PSRR Power Supply Rejection Ratio All channels, DC 50 dB Symbol Parameter Conditions Min. Typ. Max Units AV0dB Channel Gain1 All Channels , ASEL = 0 -0.25 0 0.25 dB AV6dB Channel Gain1 All Channels , ASEL = 1 5.75 6.0 6.25 dB Csync COUT Output Level (during sync)1 Sync present on YIN (after 6dB gain) 0.8 1.0 1.3 V Ysync YOUT Output Level (during sync)1 Sync present on YIN (after 6dB gain) 0.2 0.35 0.5 V CVsync CVOUT Output Level (during sync)1 Sync present on YIN (after 6dB gain) 0.2 0.35 0.5 V TCLAMP Clamp Response Time (Y channel) Settled to within 10mV 10 ms fFLAT Gain Flatness to 2.4MHz All Channels -0.05 dB fC -3dB Bandwidth1 All Channels 4.1 5.1 MHz fSB Stopband Attenuation1 All Channels at 27MHz 37 52 dB dG Differential Gain All Channels 0.4 % dP Differential Phase All Channels 0.4 deg THD Output Distortion V OUT = 1.4Vpp, 3.58MHz 0.3 % XTALK Crosstalk at 3.58MHz -45 dB SNR Signal-to-Noise Ratio Y ,C Channel NTC-7 weighting, 4.2MHz LP , 100kHz HP 75 dB Signal-to-Noise Ratio CV Channel 70 dB tpd Propogation Delay All Channels 136 ns GD Group Delay Deviation All Channels at 3.58MHz 10 ns tSKEW Skew Between YOUT and COUT at 1MHz 0 ns tCLGCV Chroma-Luma Gain CVOUT 1 f = 3.58MHz (ref to YIN at 400kHz) 94 100 104 % tCLDCV Chroma-Luma Delay CVOUT f = 3.58MHz (ref to YIN at 400kHz) 10 ns

5 www.fairchildsemi.com FMS6400-1 Rev. 1A FMS6400-1 Dual Channel Video Drivers with Integrated Filters and Composite Video Summer Applications Information Functional Description This product is a two channel m onolithic continuous time video filter designed for reconstructi ng the luminance and chromi- nance signals from an S-Video D/ A source. Composite video output is generated by summing the Y and C outputs. The chip is designed to have AC coupled inputs and will work equally well with either AC or DC coupled outputs. The reconstruction filters provide a 5th order Butterworth response with group delay equalizat ion. This provides a maxi- mally flat response in terms of delay and amplitude. Each of the three outputs is capable of driving 2Vpp into a 75Ω load. All channels are clamped during t he sync interval to set the appropriate minimum output dc level. With this operation the effective input time constant is greatly reduced, which allows for the use of small low cost coupling capacitors. The net effect is that the input will settle to 10mV in 10ms for any DC shifts present in the input video signal. In most applications the input coupling capacitors are 0.1µF . The Y and C inputs typically sink 1µA of current during active video, which normally tilts a horizontal line by 2mV at the Y out- put. During sync, the clamp restores this leakage current by sourcing an average of 20µA over the clamp interval. Any change in the coupling capacitor values will affect the amount of tilt per line. Any reduction in tilt will come with an increase in set- tling time. Luminance (Y) I/O The typical luma input is driven by either a low impedance source of 1V pp or the output of a 75 Ω terminated line driven by the output of a current DAC. In either case, the input must be capacitively coupled to allow the sync-detect and DC restore cir- cuitry to operate properly. All outputs are capable of driving 2Vpp, AC or DC coupled, into either a single or dual video load. A single video load consists of a series 75 Ω impedance matching resistor connected to a ter- minated 75Ω line, this presents a total of 150Ω of loading to the part. A dual load would be two of these in parallel which would present a total of 75Ω to the part. Channel gain of 0dB on all channels can be selected by tying pin 2 to ground. Channel gain of 6dB on all channels can be selected by tying pin 2 to V CC. Both gain settings assume stan- dard input video levels of 1Vpp. Chrominance (C) I/O The chrominance input can be driven in the same manner as the luminance input but is typically only a 0.7V pp signal. Since the chrominance signal doesn't contain any DC content, the output signal can be AC coup led using as small as a 0.1µF capacitor if DC coupling is not desired. Composite Video (CV) Output The composite video output driver is same as the other outputs. Layout Considerations General layout and supply bypassi ng play major roles in high frequency performance and thermal characteristics. Fairchild offers a demonstration board, FMS6400DEMO, to use as a guide for layout and to aid in device testing and characterization. The FMS6400DEMO is a 4-layer board with a full power and ground plane. For optimum results, follow the steps below as a basis for high frequency layout:  Include 10 µF and 0.1µF ceramic bypass capacitors  Place the 10 µF capacitor within 0.75 inches of the power pin  Place the 0.1 µF capacitor within 0.1 inches of the power pin  If using DC-coupled outputs, use a large ground plane to help dissipate heat  Minimize all trace lengths to reduce series inductances

6 www.fairchildsemi.com FMS6400-1 Rev. 1A FMS6400-1 Dual Channel Video Drivers with Integrated Filters and Composite Video Summer Mechanical Dimensions

7 www.fairchildsemi.com FMS6400-1 Rev. 1A FMS6400-1 Dual Channel Video Drivers with Integrated Filters and Composite Video Summer

Ordering Information

Temperature range for all parts: 0°C to 70°C. Model Part Number Lead Free Package Container Pack Qty FMS6400-1 FMS6400CS1 Y es SOIC-8 Rail 95 FMS6400-1 FMS6400CS1X Y es SOIC-8 Reel 2500

8 www.fairchildsemi.com FMS6400-1 Rev. 1A FMS6400-1 Dual Channel Video Drivers with Integrated Filters and Composite Video Summer DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™ FACT Quiet Series™ FAST FASTr™ FPS™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I 2C™ ImpliedDisconnect™ Rev. I7 ACEx™ ActiveArray™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E 2CMOSTM EnSignaTM FACT™ POP™ Power247™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™