FMS3110 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

  • 10-bit resolution
  • 150 megapixels per second
  • ± 0.1% linearity error
  • Sync and blank controls
  • 1.0V p-p video into 37.5 Ω or 75 Ω load
  • Internal bandgap voltage reference
  • Double-buffered data for low distortion
  • TTL-compatible inputs
  • Low glitch energy
  • Single +5 Volt power supply

Applications

  • Video signal conversion – RGB – YC B C R – Composite, Y, C
  • Multimedia systems
  • Image processing
  • True-color graphics systems (1 billion colors)
  • Broadcast television equipment
  • High-Definition Television (HDTV) equipment
  • Direct digital synthesis

Description

FMS3110/3115 products are low-cost triple D/A converters that are tailored to fit graphics and video applications where speed is critical. Two speed grades are available: TTL-level inputs are converted to analog current outputs that can drive 25–37.5 Ω loads corresponding to doubly-terminated 50–75 Ω loads. A sync current following SYNC input timing is added to the I OG output. BLANK will override RGB inputs, setting I OG , I OB and I OR currents to zero when BLANK = L. Although appropriate for many applications the internal 1.235V reference voltage can be overridden by the V REF input. Few external components are required, just the current reference resistor, current output load resistors, and decoupling capacitors. Package is a 48-lead LQFP. Fabrication technology is CMOS. Performance is guaranteed from 0 to 70°C. FMS3110 100 Ms/s FMS3115 150 Ms/s Block Diagram 10 bit D/A Converter SYNC SYNC CLOCK G9-0 COMP +1.235V Ref IOG BLANK 10 bit D/A Converter 10B9-0 IOB 10 bit D/A Converter 10R9-0 IOR RREF VREF FMS3110/3115 Triple Video D/A Converters 3 x 10 bit, 150 Ms/s

are registered on the rising edge of CLK. BLANK gates the D/A inputs and sets the pedestal voltage. inputs and the pedestal are disabled. Figure 1. Nominal Output Levels D/A converter with a net resistive load of 37.5 Ohms. overriding the internal voltage reference. to the outputs of any D/A converter a potential problem.

Table 1. Output Voltage Versus Input Code, SYNC and BLANK

FMS3110/3115 PRODUCT SPECIFICATION REV. 1.05 12/21/00 Pin Descriptions Pin Name Pin Number Value Description Clock and Pixel I/O CLK 26 TTL Clock Input. The clock input is TTL-compatible and all pixel data is registered on the rising edge of CLK. It is recommended that CLK be driven by a dedicated TTL buffer to avoid reflection induced jitter, overshoot, and undershoot. R 9-0 47-37 TTL Red Pixel Data Inputs. TTL-compatible Red Data Inputs are registered on the rising edge of CLK. G 9-0 48, 9–1 TTL Green Pixel Data Inputs. TTL-compatible Green Data Inputs are registered on the rising edge of CLK. B 9-0 23–14 TTL Blue Pixel Data Inputs. TTL-compatible Blue Data Inputs are registered on the rising edge of CLK. Controls SYNC 11 TTL Sync Pulse Input. Bringing SYNC LOW, turns off a 40 IRE (7.62 mA) current source which forms a sync pulse on the Green D/A converter output. SYNC is registered on the rising edge of CLK with the same pipeline latency as BLANK and pixel data. SYNC does not override any other data and should be used only during the blanking interval. Since this is a single-supply D/A and all signals are positive-going, sync is added to the bottom of the Green D/A range. So turning SYNC OFF means turning the current source ON. When a sync pulse is desired, the current source is turned OFF. If the system does not require sync pulses from the Green D/A converter, SYNC should be connected to GND. BLANK 10 TTL Blanking Input. When BLANK is LOW, pixel inputs are ignored and the D/A converter outputs fall to the blanking level. BLANK is registered on the rising edge of CLK and has the same pipeline latency as SYNC Video Outputs IO R 33 0.714 V p-p Red Current Output. The current source outputs of the D/A converters are capable of driving RS-343A/SMPTE-170M compatible levels into doubly-terminated 75 Ohm lines. IO G 32 1 V p-p Green Current Output. The current source outputs of the D/A converters are capable of driving RS-343A/SMPTE-170M compatible levels into doubly-terminated 75 Ohm lines. Sync pulses may be added to the Green D/A output. IO B 29 0.714 V p-p Blue Current Output. The current source outputs of the D/A converters are capable of driving RS-343A/SMPTE-170M compatible levels into doubly-terminated 75 Ohm lines.

Voltage Reference Output/Input. may be applied here which overrides the internal reference. to GND with a 0.1µF ceramic capacitor is required. to stabilize internal bias circuitry. Figure 2. Equivalent Digital Input Circuit Figure 3. Equivalent Analog Output Circuit

Figure 4. Equivalent Analog Input Circuit

  1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if

Operating Conditions are not exceeded.

  1. Applied voltage must be current limited to specified range.
  2. Forcing voltage must be limited to specified range.
  3. Current is specified as conventional current flowing into the device.

PRODUCT SPECIFICATION FMS3110/3115 REV. 1.05 12/21/00 7 Operating Conditions

Electrical Characteristics

Notes: 1. Values shown in Typ column are typical for V DD = +5V and TA = 25°C. 2. Minimum/Maximum values with V DD = Max and TA = Min. 3. V REF = 1.235V, RLOAD = 37.5Ω, RREF = 540Ω Parameter Min Nom Max Units VDD Power Supply Voltage 4.75 5.0 5.25 V fS Conversion Rate FMS3110 100 Msps FMS3115 150 Msps tPWH CLK Pulsewidth, HIGH FMS3110 3.1 ns FMS3115 2.5 ns tPWL CLK Pulsewidth, LOW FMS3110 3.1 ns FMS3115 2.5 ns tW CLK Pulsewidth FMS3110 10 ns FMS3115 6.6 ns tS Input Data Setup Time 1.7 ns th Input Date Hold Time 0 ns tPWH CLK Pulsewidth, HIGH 2 ns tPWL CLK Pulsewidth, LOW 2 ns VREF Reference Voltage, External 1.0 1.235 1.5 V CC Compensation Capacitor 0.1 µF RL Output Load 37.5 Ω VIH Input Voltage, Logic HIGH 2.0 V DD V VIL Input Voltage, Logic LOW GND 0.8 V TA Ambient Temperature, Still Air 0 70 °C Parameter Conditions 3 Min Typ 1 Max Units IDD Power Supply Current2 VDD = Max 125 mA PD Total Power Dissipation2 VDD = Max 655 mW RO Output Resistance 100 k Ω CO Output Capacitance I OUT = 0mA 30 pF IIH Input Current, HIGH V DD = Max, VIN = 2.4V -5 µA IIL Input Current, LOW V DD = Max, VIN = 0.4V 5 µA IREF VREF Input Bias Current 0 ±100 µA VREF Reference Voltage Output 1.235 V VOC Output Compliance Referred to V DD -0.4 0 +1.5 V CDI Digital Input Capacitance 4 10 pF

FMS3110/3115 PRODUCT SPECIFICATION 8 REV. 1.05 12/21/00 Switching Characteristics Notes: 1. Values shown in Typ column are typical for V DD = +5V and TA = 25°C. 2. V REF = 1.235V, RLOAD = 37.5Ω, RREF = 590Ω. System Performance Characteristics Notes: 1. Values shown in Typ column are typical for V DD = +5V and TA = 25°C. 2. V REF = 1.235V, RLOAD = 37.5Ω, RREF = 590Ω. Timing Diagram Parameter Conditions 2 Min Typ 1 Max Units tD Clock to Output Delay V DD = Min 10 15 ns tSKEW Output Skew 1 2 ns tR Output Risetime 10% to 90% of Full Scale 3 ns tF Output Falltime 90% to 10% of Full Scale 3 ns Parameter Conditions 2 Min Typ 1 Max Units ELI Integral Linearity Error V DD, VREF = Nom ±0.1 ±0.25 %/FS ELD Differential Linearity Error V DD, VREF = Nom ±0.1 ±0.25 %/FS EDM DAC to DAC Matching V DD, VREF = Nom 3 10 % PSR Power Supply Rejection Ratio 0.05 %/% CLK PIXEL DATA & CONTROLS OUTPUT DataN DataN+1 DataN+2 tPWL tS tH 50% 3%/FS 90% 10% tD tSET tF tR tPWH 1/fS

FMS3110/3115 PRODUCT SPECIFICATION 10 REV. 1.05 12/21/00 Mechanical Dimensions 48-Lead LQFP Package D E1E e PIN 1 IDENTIFIER B Base Plane Seating Plane See Lead Detail C 0.063" Ref (1.60mm) L -C- ccc C LEAD COPLANARITY A2A α A .055 .063 1.40 1.60 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .001 .005 .05 .15 .057 1.45A2 .053 1.35 B .006 .010 .17 .27 D/E D1/E1 .019 BSC .346 .362 8.8 9.2 .268 .284 6.8 7.2 .50 BSCe L .017 .029 .45 .75 6 α 0° 7° 0° 7° N4 8 4 8 12 12ND ccc .004 0.08 Notes: All dimensions and tolerances conform to ANSI Y14.5M-1982. Dimensions "D1" and "E1" do not include mold protrusion. Allowable protrusion is 0.25mm per side. D1 and E1 are maximum plastic body size dimensions including mold mismatch. Pin 1 identifier is optional. Dimension ND: Number of terminals. Dimension ND: Number of terminals per package edge. "L" is the length of terminal for soldering to a substrate. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead width to exceed the maximum B dimension by more than 0.08mm. Dambar can not be located on the lower radius or the foot. Minimum space between protrusion and an adjacent lead is 0.07mm for 0.4mm and 0.5mm pitch packages. To be determined at seating place — C—

FMS3110/3115 PRODUCT SPECIFICATION 12/21/00 0.0m 003 Stock#DS30003110  2000 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

Ordering Information

Rate Temperature Range Screening Package Package Marking FMS3110KRC 100 Ms/s T A = 0°C to 70°C Commercial 48-Lead LQFP 3110KRC FMS3115KRC 150 Ms/s T A = 0°C to 70°C Commercial 48-Lead LQFP 3115KRC