FM25C020

FM25C020U FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

I Sequential read of entire array I 4 byte "Page write" mode to minimize total write time per byte I /WP pin and BLOCK WRITE protection to prevent inadvert- ent programming as well as programming ENABLE and DISABLE opcodes. I /HOLD pin to suspend data transfer I Typical 1µA standby current (ISB) for "L" devices and 0.1µA standby current for "LZ" devices. I Endurance: Up to 1,000,000 data changes I Data retention greater than 40 years SPI™ is a trademark of Motorola Corporation

2 www.fairchildsemi.com FM25C020U Rev. B FM25C020U 2K-Bit SPI Interface Serial CMOS EEPROM Connection Diagram Dual-In-Line Package (N), SO Package (M8), and TSSOP Package (MT8) Top View See Package Number N08E (N), M08A (M8), and MTC08 (MT8) Pin Names /CS Chip Select Input SO Serial Data Output /WP Write Protect VSS Ground SI Serial Data Input SCK Serial Clock Input /HOLD Suspends Serial Data VCC Power Supply

Ordering Information

FM 25 C XX U LZ E XX Letter Description Package N 8-pin DIP M8 8-pin SO MT8 8-pin TSSOP Temp. Range None 0 to 70 °C V -40 to +125 °C E -40 to +85 °C Voltage Operating Range Blank 4.5V to 5.5V L 2.7V to 5.5V LZ 2.7V to 5.5V and <1µA Standby Current Ultralite CS100UL Process Density/Mode 020 2K, mode 0 C CMOS technology Interface 25 SPI FM Fairchild Nonvolatile Memory Prefix /CS SO /WP VSS VCC /HOLD SCK SI FM25C020U

3 www.fairchildsemi.com FM25C020U Rev. B FM25C020U 2K-Bit SPI Interface Serial CMOS EEPROM Standard Voltage 4.5 ≤ VCC ≤ 5.5V Specifications Absolute Maximum Ratings (Note 1) Ambient Storage Temperature -65 °C to +150°C All Input or Output Voltage with Respect to Ground +6.5V to -0.3V Lead Temp. (Soldering, 10 sec.) +300 °C ESD Rating 2000V Operating Conditions Ambient Operating Temperature FM25C020U 0 °C to +70°C FM25C020UE -40 °C to +85°C FM25C020UV -40 °C to +125°C Power Supply (VCC) 4.5V to 5.5V DC and AC Electrical Characteristics 4.5V ≤ VCC ≤ 5.5V (unless otherwise specified) Symbol Parameter Conditions Min Max Units ICC Operating Current /CS = V IL 3m A ICCSB Standby Current /CS = V CC 50 µA IIL Input Leakage V IN = 0 to VCC -1 +1 µA IOL Output Leakage V OUT = GND to VCC -1 +1 µA VIL CMOS Input Low Voltage -0.3 V CC * 0.3 V VIH CMOS Input High Voltage 0.7 * V CC VCC + 0.3 V VOL Output Low Voltage I OL = 1.6 mA 0.4 V VOH Output High Voltage I OH = -0.8 mA V CC - 0.8 V fOP SCK Frequency 2.1 MHz tRI Input Rise Time 2.0 µs tFI Input Fall Time 2.0 µs tCLH Clock High Time (Note 2) 190 ns tCLL Clock Low Time (Note 2) 190 ns tCSH Min /CS High Time (Note 3) 240 ns tCSS /CS Setup Time 240 ns tDIS Data Setup Time 100 ns tHDS /HOLD Setup Time 90 ns tCSN /CS Hold Time 240 ns tDIN Data Hold Time 100 ns tHDN /HOLD Hold Time 90 ns tPD Output Delay C L = 200 pF 240 ns tDH Output Hold Time 0 ns tLZ /HOLD to Output Low Z 100 ns tDF Output Disable Time C L = 200 pF 240 ns tHZ /HOLD to Output High Z 100 ns tWP Write Cycle Time 1 –16 Bytes 10 ms Capacitance TA = 25°C, f = 2.1/1 MHz (Note 4) Symbol Test Typ Max Units COUT Output Capacitance 3 8 pF CIN Input Capacitance 2 6 pF AC Test Conditions Output Load C L = 200 pF Input Pulse Levels 0.1 * V CC – 0.9 * VCC Timing Measurement Reference Level 0.3 * V CC - 0.7 * VCC Note 1: Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2: The fOP frequency specification specifies a minimum clock period of 1/fOP. Therefore, for every fOP clock cycle, tCLH + tCLL must be equal to or greater than 1/fOP. For example, for a fOP of 2.1MHz, the period equals 476ns. In this case if t CLH = is set to 190ns, then tCLL must be set to a minimum of 286ns. Note 3: /CS must be brought high for a minimum of tCSH between consecutive instruction cycles. Note 4: This parameter is periodically sampled and not 100% tested.

4 www.fairchildsemi.com FM25C020U Rev. B FM25C020U 2K-Bit SPI Interface Serial CMOS EEPROM Low Voltage 2.7V ≤ VCC ≤ 4.5V Specifications Absolute Maximum Ratings (Note 5) Ambient Storage Temperature -65 °C to +150°C All Input or Output Voltage with Respect to Ground +6.5V to -0.3V Lead Temp. (Soldering, 10 sec.) +300 °C ESD Rating 2000V Operating Conditions Ambient Operating Temperature FM25C020UL/LZ 0 °C to +70°C FM25C020ULE/LZE -40 °C to +85°C FM25C020ULV -40 °C to +125°C Power Supply (VCC) 2.7V –4.5V DC and AC Electrical Characteristics 2.7V ≤ VCC ≤ 4.5V (unless otherwise specified) 25C020UL/LE 25C020ULV 25C020ULZ/ZE Symbol Parameter Part Conditions Min. Max. Min Max Units ICC Operating Current /CS = V IL 33 m A ICCSB Standby Current L /CS = V CC 10 10 µA LZ 1 N/A µA IIL Input Leakage V IN = 0 to VCC -1 1 -1 1 µA IOL Output Leakage V OUT = GND to VCC -1 1 -1 1 µA VIL Input Low Voltage -0.3 V CC * 0.3 -0.3 V CC * 0.3 V VIH Input High Voltage V CC * 0.7 V CC + 0.3 V CC * 0.7 V CC + 0.3 V VOL Output Low Voltage I OL = 0.8 mA 0.4 0.4 V VOH Output High Voltage I OH = –0.8 mA V CC - 0.8 V CC - 0.8 V fOP SCK Frequency 1.0 1.0 MHz tRI Input Rise Time 2.0 2.0 µs tFI Input Fall Time 2.0 2.0 µs tCLH Clock High Time (Note 6) 410 410 ns tCLL Clock Low Time (Note 6) 410 410 ns tCSH Min. /CS High Time (Note 7) 500 500 ns tCSS /CS Setup Time 500 500 ns tDIS Data Setup Time 100 100 ns tHDS /HOLD Setup Time 240 240 ns tCSN /CS Hold Time 500 500 ns tDIN Data Hold Time 100 100 ns tHDN /HOLD Hold Time 240 240 ns tPD Output Delay C L = 200 pF 500 500 ns tDH Output Hold Time 0 0 ns tLZ /HOLD Output Low Z 240 240 ns tDF Output Disable Time C L = 200 pF 500 500 ns tHZ /HOLD to Output Hi Z 240 240 ns tWP Write Cycle Time 1-16 Bytes 15 15 ms Capacitance TA = 25°C, f = 2.1/1 MHz (Note 8) Symbol Test Typ Max Units COUT Output Capacitance 3 8 pF CIN Input Capacitance 2 6 pF AC Test Conditions Output Load C L = 200pF Input Pulse Levels 0.1 * V CC - 0.9 * VCC Timing Measurement Reference Level 0.3 * V CC - 0.7 * VCC Note 5: Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 6: The fOP frequency specification specifies a minimum clock period of 1/fOP. Therefore, for every fOP clock cycle, tCLH + tCLL must be equal to or greater than 1/fOP. For example, for a fOP of 1MHz, the period equals 1000ns. In this case if tCLH = is set to 410ns, then tCLL must be set to a minimum of 590ns. Note 7: /CS must be brought high for a minimum of tCSH between consecutive instruction cycles. Note 8: This parameter is periodically sampled and not 100% tested.

EEPROM is driven after the falling edge of this clock input. latched on the rising edge of the SCK. serially shifted out on this pin after the falling edge of the SCK. TABLE 2. Instruction Set TABLE 3. Status Register Format information on Status register operations.

10 www.fairchildsemi.com FM25C020U Rev. B FM25C020U 2K-Bit SPI Interface Serial CMOS EEPROM Molded Small Out-Line Package (M8) Package Number M08A Molded Dual-In-Line Package (N) Package Number N08E 1234 8765 0.189 - 0.197 (4.800 - 5.004) 0.228 - 0.244 (5.791 - 6.198) Lead #1 IDENT Seating Plane 0.004 - 0.010 (0.102 - 0.254) 0.014 - 0.020 (0.356 - 0.508) 0.014 (0.356) Typ. 0.053 - 0.069 (1.346 - 1.753) 0.050 (1.270) Typ 0.016 - 0.050 (0.406 - 1.270) Typ. All Leads 8° Max, Typ. All leads 0.150 - 0.157 (3.810 - 3.988) 0.0075 - 0.0098 (0.190 - 0.249) Typ. All Leads 0.004 (0.102) All lead tips 0.010 - 0.020 Physical Dimensions inches (millimeters) unless otherwise noted 0.373 - 0.400 (9.474 - 10.16) 0.092 (2.337)DIA 1234 8765 0.250 - 0.005 (6.35 ± 0.127) 870.032 ± 0.005 (0.813 ± 0.127) Pin #1 Option 2 RAD 0.145 - 0.200 (3.683 - 5.080) 0.130 ± 0.005 (3.302 ± 0.127) 0.125 - 0.140 (3.175 - 3.556) 0.020 (0.508) Min0.018 ± 0.003 (0.457 ± 0.076) 90° ± 4° Typ 0.100 ± 0.010 (2.540 ± 0.254) 0.040 (1.016) 0.039 (0.991) Typ. 20° ± 1° 0.065 (1.651) 0.050 (1.270) 0.060 (1.524) Pin #1 IDENT Option 1

0.280 MIN

0.300 - 0.320 (7.62 - 8.128) 0.030 (0.762)MAX 0.125 (3.175) DIA NOM 0.009 - 0.015 (0.229 - 0.381) 0.045 ± 0.015 (1.143 ± 0.381) 0.325 +0.040 -0.015 8.255 +1.016 -0.381 95° ± 5° 0.090 (2.286) (7.112) IDENT

11 www.fairchildsemi.com FM25C020U Rev. B FM25C020U 2K-Bit SPI Interface Serial CMOS EEPROM 8-Pin Molded TSSOP, JEDEC (MT8) 0.114 - 0.122 (2.90 - 3.10) 0.123 - 0.128 (3.13 - 3.30) 0.246 - 0.256 (6.25 - 6.5) 0.169 - 0.177 (4.30 - 4.50) (7.72) Typ(4.16) Typ (1.78) Typ (0.42) Typ (0.65) Typ 0.002 - 0.006 (0.05 - 0.15) 0.0256 (0.65) Typ. 0.0433 (1.1) Max 0.0075 - 0.0118 (0.19 - 0.30) Pin #1 IDENT 0.0035 - 0.0079 0°-8° 0.020 - 0.028 (0.50 - 0.70) 0.0075 - 0.0098 (0.19 - 0.25)Seating plane Gage plane See detail A Notes: Unless otherwise specified 1. Reference JEDEC registration MO153. Variation AA. Dated 7/93 Land pattern recommendation DETAIL A Typ. Scale: 40X Physical Dimensions inches (millimeters) unless otherwise noted Note: Metal mask option for 16-byte page size. Life Support Policy Fairchild's products are not authorized for use as critical components in life support devices or systems without the express w ritten approval of the President of Fairchild Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably ex- pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild Semiconductor Fairchild Semiconductor Fairchild Semiconductor Fairchild Semiconductor Americas Europe Hong Kong Japan Ltd. Customer Response Center Fax: +44 (0) 1793-856858 8/F, Room 808, Empire Centre 4F, Natsume Bldg. Tel. 1-888-522-5372 Deutsch Tel: +49 (0) 8141-6102-0 68 Mody Road, Tsimshatsui East 2-18-6, Yushima, Bunkyo-ku English Tel: +44 (0) 1793-856856 Kowloon. Hong Kong Tokyo, 113-0034 Japan Franç ais Tel: +33 (0) 1-6930-3696 Tel; +852-2722-8338 Tel: 81-3-3818-8840 Italiano Tel: +39 (0) 2-249111-1 Fax: +852-2722-8383 Fax: 81-3-3818-8841