FL7930B ONSEMI | Alldatasheet
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© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting FL7930B Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting
Features
Additional OVP Detection Pin VIN-Absent Detection Maximum Switching Frequency Limitation Internal Soft-Start and Startup without Overshoot Internal Total Harmonic Distortion (THD) Optimizer Precise Adjustable Output Over-Voltage Protection Open-Feedback Protection and Disable Function Zero Current Detector (ZCD) 150 μs Internal Startup Timer MOSFET Over-Current Protection (OCP) Under-Voltage Lockout with 3.5 V Hysteresis Low Startup and Operating Current Totem-Pole Output with High State Clamp +500/-800 mA Peak Gate Drive Current 8-Pin, Small-Outline Package (SOP)
Applications
Ballast General LED Lighting Industrial, Commercial, and Residential Fixtures Outdoor Lighting: Street, Roadway, Parking, Construction, Ornamental LED Lighting Fixtures
Description
The FL7930B is an active power factor correction (PFC) controller for boost PFC applications that operate in critical conduction mode (CRM). It uses a voltage-mode PWM that compares an internal ramp signal with the error amplifier output to generate a MOSFET turn-off signal. Because the voltage-mode CRM PFC controller does not need rectified AC line voltage information, it saves the power loss of an input voltage sensing network necessary for a current-mode CRM PFC controller. FL7930B provides over-voltage protection (OVP), open- feedback protection, over-current protection (OCP), input-voltage-absent detection, and under-voltage lockout protection (UVLO). The additional OVP pin can be used to shut down the boost power stage when output voltage exceeds OVP level due to the resistors that are connected at INV pin are damaged. The FL7930B can be disabled if the INV pin voltage is lower than 0.45 V and the operating current decreases to a very low level. Using a new variable on-time control method, total harmonic distortion (THD) is lower than in conventional CRM boost PFC ICs.
Ordering Information
Temperature Range Top Mark Package Packing Method FL7930BMX_G -40 to +125°C FL7930BG 8-Lead Small Outline Package (SOP) Tape & Reel
6 GND
Figure 3. Functional Block Diagram
Figure 4. Pin Configuration (Top View) should be resistively divided to 2.5 V. 2 OVP This pin is used to detect PFC output over voltage when INV pin information is not correct. compensation should be connected between this pin and GND. included to filter switching noise. higher than 1.5 V, then goes lower than 1.4 V, the MOSFET is turned on. and the power ground should be separated.
7 OUT
8 VCC This is the IC supply pin. IC current and MOSFET drive current are supplied using this pin.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 5 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dama ge the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage VZ V IOH, IOL Peak Drive Output Current -800 +500 mA ICLAMP Driver Output Clamping Diodes VO>VCC or VO<-0.3 V -10 +10 mA IDET Detector Clamping Diodes -10 +10 mA VIN Error Amplifier Input, Output, OVP Input, ZCD, RDY, and OVP Pins(1) -0.3 8.0 V CS Input Voltage(2) -10.0 6.0 TJ Operating Junction Temperature +150 °C TA Operating Temperature Range -40 +125 °C TSTG Storage Temperature Range -65 +150 °C ESD Electrostatic Discharge Capability Human Body Model, JESD22-A114 2.5 kV Charged Device Model, JESD22-C101 2.0 Notes: 1. When this pin is supplied by external power sources by acciden t, its maximum allowable current is 50 mA. 2. In case of DC input, the acceptable input range is -0.3 V~6 V: w ithin 100 ns -10 V~6 V is acceptable, but electrical specifications are not guaranteed during such a short time. Thermal Impedance Symbol Parameter Min. Max. Unit JA Thermal Resistance, Junction-to-Ambient(3) 150 °C/W Note: 3. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 6 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting
Electrical Characteristics
VCC = 14 V and TA = -40°C~+125°C, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit VCC Section VSTART Start Threshold Voltage VCC Increasing 11 12 13 V VSTOP Stop Threshold Voltage VCC Decreasing 7.5 8.5 9.5 V HYUVLO UVLO Hysteresis 3.0 3.5 4.0 V VZ Zener Voltage ICC=20 mA 20 22 24 V VOP Recommended Operating Range 13 20 V Supply Current Section ISTART Startup Supply Current VCC=VSTART-0.2 V 120 190 µA IOP Operating Supply Current Output Not Switching 1.5 3.0 mA IDOP Dynamic Operating Supply Current 50 kHz, CI=1 nF 2.5 4.0 mA IOPDIS Operating Current at Disable VINV=0 V 90 160 230 µA Error Amplifier Section VREF1 Voltage Feedback Input Threshold1 TA=25°C 2.465 2.500 2.535 V VREF1 Line Regulation VCC=14 V~20 V 0.1 10.0 mV VREF2 Temperature Stability of VREF1 (4) 20 mV IEA,BS Input Bias Current VINV=1 V~4 V -0.5 0.5 µA IEAS,SR Output Source Current VINV=VREF -0.1 V -12 µA IEAS,SK Output Sink Current VINV=VREF +0.1 V 12 µA VEAH Output Upper Clamp Voltage VINV=1 V, VCS=0 V 6.0 6.5 7.0 V VEAZ Zero Duty Cycle Output Voltage 0.9 1.0 1.1 V gm Transconductance(4) 90 115 140 µmho Maximum On-Time Section tON,MAX1 Maximum On-Time Programming 1 TA=25°C, VZCD=1 V 35.5 41.5 47.5 µs tON,MAX2 Maximum On-Time Programming 2 TA=25°C, IZCD=0.469 mA 11.2 13.0 14.8 µs Current-Sense Section VCS Current Sense Input Threshold Voltage Limit 0.7 0.8 0.9 V ICS,BS Input Bias Current VCS=0~1 V -1.0 -0.1 1.0 µA tCS,D Current Sense Delay to Output(4) dV/dt=1 V/100 ns, from 0 V to 5 V 350 500 ns Continued on the following page…
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 7 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting VCC = 14 V and TA = -40°C~+125°C, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit Zero-Current Detect Section VZCD Input Voltage Threshold(4) 1.35 1.50 1.65 V HYZCD Detect Hysteresis(4) 0.05 0.10 0.15 V VCLAMPH Input High Clamp Voltage IDET=3 mA 5.5 6.2 7.5 V VCLAMPL Input Low Clamp Voltage IDET=-3 mA 0 0.65 1.00 V IZCD,BS Input Bias Current VZCD=1 V~5 V -1.0 -0.1 1.0 µA IZCD,SR Source Current Capability(4) TA=25°C -4 mA IZCD,SK Sink Current Capability(4) TA=25°C 10 mA tZCD,D Maximum Delay From ZCD to Output Turn-On(4) dV/dt=-1 V/100 ns, from
5 V to 0 V
VOH Output Voltage High IO=-100 mA, TA=25°C 9.2 11.0 12.8 V VOL Output Voltage Low IO=200 mA, TA=25°C 1.0 2.5 V tRISE Rising Time(4) CIN=1 nF 50 100 ns tFALL Falling Time(4) CIN=1 nF 50 100 ns VO,MAX Maximum Output Voltage VCC=20 V, IO=100 µA 11.5 13.0 14.5 V VO,UVLO Output Voltage with UVLO Activated VCC=5 V, IO=100 µA 1 V Restart / Maximum Switching Frequency Limit Section tRST Restart Timer Delay 50 150 300 µs fMAX Maximum Switching Frequency(4) 250 300 350 kHz Soft-Start Timer Section tSS Internal Soft-Soft(4) 3 5 7 ms Protections VOVP,INV OVP Threshold Voltage at INV Pin TA=25°C 2.620 2.675 2.730 V HYOVP,INV OVP Hysteresis at INV Pin TA=25°C 0.120 0.175 0.230 V VOVP,OVP OVP Threshold Voltage at OVP Pin TA=25°C 2.740 2.845 2.960 V HYOVP,OVP OVP Hysteresis at OVP Pin TA=25°C 0.345 V VEN Enable Threshold Voltage 0.40 0.45 0.50 V HYEN Enable Hysteresis 0.05 0.10 0.15 V TSD Thermal Shutdown Temperature(4) 125 140 155 °C THYS Hysteresis Temperature of TSD(4) 60 °C Note: 4. These parameters, although guaranteed by design, are not prod uction tested.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 8 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting Comparison of FL6961 and FL7930B Function FL6961 FL7930B FL7930B Advantages OVP Pin None Integrated No External Circuit for additional OVP Reduction of Power Loss and BOM Cost Caused by Additional OVP Circuit Frequency Limit None Integrated Abnormal CCM Operation Prohibited Abnormal Inductor Current Accumulation Can Be Prohibited VIN-Absent Detection None Integrated Increase System Reliability by Testing for Input Supply Voltage Guarantee Stable Operation at Short Electric Power Failure Soft-Start and Startup without Overshoot None Integrated Reduce Voltage and Current Stress at Startup Eliminate Audible Noise Due to Unwanted OVP Triggering Control Range Compensation None Integrated Can Avoid Burst Operation at Light Load and High Input Voltage Reduce Probability of Audible Noise Due to Burst Operation THD Optimizer External Internal No External Resistor is Needed TSD None 140°C with 60°C Hysteresis Stable and Reliable TSD Operation Converter Temperature Range Limited Range Control Range Compensation None Integrated Comparison of FL7930B and FL7930C Function FL7930B FL7930C FL7930B Remark RDY Pin None Integrated User Choice for the Use of Number #2 Pin OVP Pin Integrated None
1 The gate drive path should be as short as possible. external components to contact.
2 The PFC output voltage sensing resistor is normally
3 The ZCD path is recommended close to auxiliary
4 The switching current sense path should not share
the noise level applied to the CS pin.
5 A stabilizing capacitor for V CC is recommended as
corresponding pins as possible. Figure 44. Recommended PCB Layout
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 19 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting Typical Application Circuit Application Device Input Voltage Range Rated Output Power Output Voltage (Maximum Current) LED Lighting FL7930B 90-265 VAC 195 W 390 V (0.5 A) Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 95% at universal input. Power factor at rated load is higher than 0.98 at universal input. Total Harmonic Distortion (THD) at rated load is lower than 15% at universal input. Key Design Notes When auxiliary VCC supply is not available, VCC power can be supplied through Zero Current Detect (ZCD) winding. The power consumption of R103 is quite high, so its power rating needs checking. Because the input bias current of INV pin is almost zero, output voltage sensing resistors (R112~R115) should be as high as possible. However, too-high resistance makes the node susceptible to noise. Resistor values need to strike a balance between power consumption and noise immunity. Quick charge diode (D106) can be eliminated if output diode inrush current capability is sufficient. Through D106, system operation is normal due to the controller’s highly reliable protection features. Schematic ZNR101, 10D471 194H, 39:5 D105 600V 8A V AUX DC OUTPUT Q101 FCPF 20N60 D106 600V 3A FS101, 250V,5A R101,1M-J C101, 220nF C114, 2.2nF LF101, 23mH C102, 680nF TH101, 5D15 BD101, 600V,15A C1030,68F ,630Vdc C107, 33F C105, 100nF R107, 10k C108, 220nF C109, 47nF R110,10k R109 R108
4.7 D103,1N4148
D104,1N4148 C112,470pF R111 0.08, 5W C110,1nF R115 75k R112 3.9M C111 220F, 450V LP101,EER3124N R113 3.9M R114 3.9M R104, 30k Comp INV VCC Out GND ZCD CS OVP C115, 2.2nF R103, 10k,1W D102, UF4004 C104, 12nF D101,1N4746 R102, 330k Circuit for VCC. If external VCC is used, this circuit is not needed. Optional C116,1nF R119 75k R116 3.9M R117 3.9M R118 3.9M Figure 45. Demonstration Circuit
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 20 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting Transformer 1,2 Np Naux 9,10 6,7 3,4 EER3019N 9,10 6,7 1,2 3,4 NPNaux Figure 46. Transformer Schematic Diagram Inductance 3, 4 → 1, 2 194 H ± 5% 100 kHz, 1 V Core & Bobbin Core: EER3019, Samhwa (PL-7) (Ae=137.0mm2) Bobbin: EER3019
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 21 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting Bill of Materials Part # Value Note Part # Value Note Resistor Switch R101 1 MW 1W Q101 FCPF20N60 20 A, 600 V, SuperFET® R102 330 kW 1/2W Diode R103 10 kW 1W D101 1N4746 1 W, 18 V, Zener Diode R104 30 kW 1/4W D102 UF4004 1 A, 400 V Glass Passivated High-Efficiency Rectifier R107 10 kW 1/4W D103 1N4148 1 A, 100 V Small-Signal Diode R108 4.7 kW 1/4W D104 1N4148 1 A, 100 V Small-Signal Diode R109 47 kW 1/4W D105
8 A, 600 V, General-Purpose
3 A, 600 V, General-Purpose
R111 0.80 kW 5W R112, 113, 114,116,117,118 3.9 kW 1/4W IC101 FL7930B CRM PFC Controller R115,119 75 kW 1/4W Capacitor Fuse C101 220 nF / 275 VAC Box Capacitor FS101 5 A / 250 V C102 680 nF / 275 VAC Box Capacitor NTC C103 0.68 µF / 630 V Box Capacitor TH101 5D-15 C104 12 nF / 50 V Ceramic Capacitor Bridge Diode C105 100 nF / 50 V SMD (1206) BD101 15 A, 600 V C107 33 µF / 50 V Electrolytic Capacitor Line Filter C108 220 nF / 50 V Ceramic Capacitor LF101 23 mH C109 47 nF / 50 V Ceramic Capacitor Transformer C110,116 1 nF / 50 V Ceramic Capacitor T1 EER3019 Ae=137.0 mm2 C112 47 nF / 50 V Ceramic Capacitor ZNR C111 220 µF / 450 V Electrolytic Capacitor ZNR101 10D471 C114 2.2 nF / 450 V Box Capacitor C115 2.2 nF / 450 V Box Capacitor
Figure 47. 8-Lead, Small Outline Package (SOP) specifically the warranty therein, which covers Fairchild products. http://www.fairchildsemi.com/dwg/M0/M08A.pdf. B) ALL DIMENSIONS ARE IN MILLIMETERS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
1.75 MAX
0.25 C B A
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FL7930B • Rev. 1.0.4 23 FL7930B — Single-Stage Flyback and Boundary-Mode PFC Controller for Lighting
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