FL5150 ONSEMI | Alldatasheet
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© 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FL5150/60 • 1.0 FL5150/60 — IGBT and MOSFET AC Phase Cut Dimmer Controller FL5150/60 IGBT and MOSFET AC Phase Cut Dimmer Controller
Features
Selectable Earth Ground or Line-Hot Zero Cross Detection: Complies with UL1472 2015 2nd Edition for Addition of Ground Leakage Current for Flicker Reduction (North America) User Programmable Leading or Trailing Edge Dimming Control Dynamic Over-Current and Temperature Protection Powered from the AC Line Symmetric AC Current Control IGBT or MOSFET Gate Driver Gate Pulse Width Programmable from 0 to 100% tON 8 Bit ADC Input for Dimming Control with an Adjustable Resistor or 0 to 10 V DC Voltage 226 Dimming Pulse Widths with 25 s Resolution and Built-in Ramp Up/Down Control for Smooth Dimming Automatically Maximum Gate Pulse Width Control (Auto Max.) Minimum External Components 600 A Quiescent Current Precision Temperature Compensated 2% Internal Timer Low Power Electronic Off State Mode Space Savings SOIC 10-pin Package 50 Hz and 60 Hz Options
Applications
Dimmer Switches AC Controls
Description
The FL5150 and FL5160 are controllers for varying t he pulse width for AC loads . The FL5150 is for 50 Hz and the FL5160 is for 60 Hz applications. The FL5150/60 is powered from the AC line and generates a programmable gate drive for controlling the pulse width for external IGBT or MOSFET transistors. The pulse width can be user programmable with either an external resistor or 0 to 10 V DC signal or controlled by a µP with a logic signal . The pulse width can be controlled from 0 to 100% duty cy cle to provide a wide AC symmetric dimming control function when biased with a 3-wire application. For 2-wire L ine- Hot and Load-Hot applications, the pulse width can typically be varied from 0 to a maximum gate pulse so that the load voltage is >95% of the AC line voltage. The FL5150/60 will automatically override the pulse widt h control setting to allow maximum gate pulse width without flicker. The FL5150/60 takes advantage of the UL1472 2015 2nd edition code revision that allows for up to 0.5 mA o f ground leakage current when a neutral wire is not available in the switch box. This improves the flick er performance for non-resistive loads . If the application does not allow ground leakage current then the Line Hot signal can be used as the ZC signal. The FL5150/60 has user programmable over-current and temperature protection . With external sense resistors, the maximum voltage drop across Q1 and Q2 can be set to limit the maximum current and transistor power dissipation. The FL5150/60 can be programmed for trailing edge dimming when the DIM Mode pin is low at startup (pul se width starts at the zero-crossing) or leading edge dimming when the DIM Mode pin is connected to the VDD pin at start up (pulse width ends at the zero crossing). When an OFF state is selected (DIM Control pin is 0 V) the FL5150/60 will go into a low power electronic OFF state that reduces the power consumption to less than 100 mW if an external NPN transistor is used. The FL5150/60 has an internal 8 bit ADC that allows for typically 226 selectable dimming pulse widths with a resolution of 25 µs per step. The FL5150/60 controls the dim pulse width rate of change so that the minimum to maximum dim ramp time is approximately 1 second . This feature allows for a smooth dim transition. Internally, the FL5150/60 contains a 17 V shunt regulator,
5 V linear regulator, 8Bit ADC, detection comparato rs,
control logic and an IGBT or MOSFET gate driver. The 10-pin SOIC package provides for a low-cost, compact design and layout.
Figure 5. Typical 230 V AC 50 Hz 2-Wire Application (LE Mode Shown) Table 4. Typical Values Figure 6. Block Diagram
8 Bit
Figure 7. Pin Assignments 1 ZC Monitor ZC Monitor This signal is used for the zero crossing threshold.
2 DIM Control
3 VDD VDD The internal 5 V supply for the digital logic
4 DIM Mode
selected. If it is connected to VDD then leading edge dimming will be selected. DIM Mode until a POR signal occurs.
5 GND GND Supply input for the FL5150/60 circuitry
7 Low Power
reduced to typically 100 mW.
8 OC Sense2
9 DRV Gate DRV Gate Gate drive signal for external IGBT or MOSFET transistors.
10 OC Sense1
© 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FL5150/60 • 1.0 6 FL5150/60 — IGBT and MOSFET AC Phase Cut Dimmer Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Condition Min. Max. Unit IS Supply Current Continuous Current, VS to GND 25 mA VS Supply Voltage Continuous Voltage, VS to GND -0.8 20.0 V DRVG LP DRV Gate and Low Power Continuous Voltage to GND -0.8 20.0 V OCSen1 OCSen2 Sense1, Sense2 Continuous Voltage to GND -0.8 5.0 V All other pins Continuous Voltage to GND -0.8 6.0 TSTG Storage Temperature Range -65 +150 °C ESD Electrostatic Discharge Capability Human Body Model, JESD22-A114 2 kV Charged device Model, JESD22-C101 2
Figure 5. TA=25°C, ISHUNT=5 mA, and phase=60 Hz.
Table 5. DIM Control Voltage Pulse Width Selection (1)
Table 5. DIM Control Voltage Pulse Width Selection(1) (Continued)
- The pulse width times shown in Table 5 are reference to the ZC threshold. For trailing edge DIM mode, the pulse
pulse width time is typical for the FL5160. For the FL5150, the values will be scaled by +20%.
- VOUT RMS typical value with a 60 W incandescent Load and 120 VRMS input.
- If the DIM Control voltage is >4 V a 100% duty cycle is selected and the DRV Gate will be on 100%. However, a
© 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FL5150/60 • 1.0 15 FL5150/60 — IGBT and MOSFET AC Phase Cut Dimmer Controller (Refer to Figure 1 to Figure 5) Present AC controls or dimmer switches typically use TRIAC circuits to generate the AC symmetric chopped or phase cut current function . The TRIAC is basically two back to back SCR transistors that allow for symmetric AC operation in both the positive and negative half cycles. The TRIAC dimmer circuit controls the AC voltage pulse width to the load by turning off the TRIAC when its holding current is below the minimum threshold level. This occurs near the AC zero-crossing . The TRIAC is turned on at a selected phase angle during the half cycle . The TRIAC minimum holding current can become an issue for newer low wattage lighting products . In addition, newer lighting products typically have capacitive load impedance so the current and voltage phases are shifted . This can cause problems for the detection of the AC zero-cross signal and lead to unwanted flickering. The FL51 50/60 controller address es these issues by controlling back to back MOSFET or IGBT transistors which can be turned on or off at any time during the AC half cycle . In addition, the FL5160 can use the earth ground leakage current to better determine the zero- cross threshold for non-resistive loads . Up to 500 µA of ground leakage current is now allowed per the UL1472 2nd edition specification for 2-wire applications. The FL5160 product is for North America 120 V AC,
60 Hz applications and the FL5150 product is for
230 VAC, 50 Hz applications . The internal timing oscillator is selected for 50 Hz for the FL5150 and 60 Hz for the FL5160 . For the below description, the timing information is in reference to the FL5160 60 Hz option . For the FL5150 option, the t ON pulse width is scaled by +20%. The FL5160 has a selectable DIM Mode pin that allows for either Trailing Edge or Leading Edge dimming modulation. At startup when an under-voltage lockout enable signal is detected (POR) the DIM Mode pin is monitored for its logic state and after 60ms this state will be latched and program the FL5160 for either trailing edge dimming if this pin is low or leading edge dimming if this pin is high . The DIM Mode pin enables a 10 µ A pull up current source after Power- on-Reset (POR) . Once the dimming mode is latched, this pin will be disabled until a POR enable signal occurs . For trailing edge dimming, the gate pulse is enabled at the ZC signal and disabled after the tON pulse width per Table 5. For leading edge dimming, the gate pulse is disabled at the ZC signal and enabled after the t OFF pulse width per Table 5. The gate pulse width is determined by the value of the voltage at the DIM Control pin . The DIM Control pin sources a 10 µA current . The voltage at this pin is connected to an 8 Bit ADC with an internal full scale reference of 2.56 V so the ADC step size is ~ 10 mV. Table 5 shows the gate pulse width versus the DIM Control pin voltage for a 60 Hz FL5160 application . If the DIM Control pin is connected to VDD a force 100% duty cycle will be selected . However, if the VS voltage drops to the POR voltage threshold a logic reset will occur. A 100% duty cycle can only be selected for a 3- wire application (Neutral wire present). When the voltage on the DIM Control pin is changed, the FL5160 will increase or decrease the dim steps by one step every 4.17 ms (or two steps per half cycle) . This provides for a smooth dim pulse width transition . From minimum to maximum pulse width, the FL5160 will control the dim ramp rate to about 1 second. The FL5160 has an internal difference amplifier which measures the voltage difference across Q1 and Q2 . With the external OC Sense 1&2 resistors, this diff amp will measure the voltage difference across the collectors or drains of Q1 and Q2 when the DRV Gate signal is high. If the maximum voltage threshold is exceeded for longer than 50s the gate pulse will be disabled until the next AC zero-crossing . This feature will limit the maximum load current and also limit the power dissipation for Q1 and Q2 . If 16 consecutive over current pulses occur ( see Figure 12 ) the FL5160 will disable the DRV gate and require a POR to reset the disable state . The OC (over-current) trip threshold is dynamic: it is a function of the VAC phase angle. The OC threshold is higher at startup to allow for higher transient currents during startup typical of incandescent bulbs. The desired steady state (phase angle> 90°) over- current threshold can be programmed with the following equation: | Q1VD – Q2VD | = 2 x RSENSE IOC x RDSON + VF = 2 x RSENSE (1) Where: RDSON = MOSFET drain to source resistance VF = MOSFET body diode So, IOC = (2 x RSENSE – VF) / RDSON note: RSENSE in M (2) For the FDPF33N25 transistor, RDSON= 94 m and VF = 0.7 V @25°C RDSON= 170 m and VF = 0.6 V @100°C (3) So, IOC = 13.8 A @25°C with RSENSE = 1 M IOC = 8.2 A @100°C with RSENSE = 1 M (4) The FL5160 has a low power electronic off state feature. If an external NPN transistor is connected per Figure 2 , the power consumption for the OFF state can be significantly reduced. When an OFF state is selected (DIM Control pin at 0 V) an internal 100 ms timer starts. After the timer expires, the FAN5160 will enable an internal PMOS transistor which shorts the Low power and VS pins. This will turn off Q3 which de-biases R1. The FL5160 is now biased by R2. This reduces the electronic off state power consumption from 1 W to 100 mW for a 120 VAC input.
Unless otherwise specified, TA=25°C and according to Figure 1 to Figure 5. Figure 12. Over-Current Protection
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