FCPF067N65S3 FAIRCHILD | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 9
Technical content
Features
- 700 V @ T J = 150 oC
- T y p . RDS(on) = 59 m
- Ultra Low Gate Charge (Typ. Q g = 78 nC)
- Low Effective Output Capacitance (Typ. C oss(eff.) = 715 pF)
- 100% Avalanche Tested
- RoHS Compliant
Applications
- Telecom / Sever Power Supplies
- Industrial Power Supplies
- UPS / Solar
Description
SuperFET® III MOSFET is Fairchild Semiconductor’s brand- new high voltage super-junction (SJ) MOSFET family that is uti- lizing charge balance technology for outstanding low on-resis- tance and lower gate charge performance. This advanced technology is tailored to mi nimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SuperFET III MOSFET is very suitable for various power system for miniaturization and higher efficiency. *Drain current limited by maximum junction temperature. G S D TO-220F GDS
FCPF067N65S3 — N-Channel SuperFET® III MOSFET ©2015 Fairchild Semiconductor Corporation FCPF067N65S3 Rev. 1.1 www.fairchildsemi.com2 Package Marking and Ordering Information Electrical Characteristics TC = 25oC unless otherwise noted. Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics Source-Drain Diode Characteristics Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity FCPF067N65S3 FCPF067N65S3 TO-220F Tube N/A N/A 50 units Symbol Parameter Test Conditions Min. Typ. Max. Unit BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 1 mA, TJ = 25C 650 - - V VGS = 0 V, ID = 1 mA, TJ = 150C 700 - - V BVDSS / TJ Breakdown Voltage Temperature Coefficient ID = 1 mA, Referenced to 25oC - 0.72 - V/ oC IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V - - 1 AVDS = 520 V, TC = 125oC- 2 . 2 - IGSS Gate to Body Leakage Current V GS = ±20 V, VDS = 0 V - - ±100 nA VGS(th) Gate Threshold Voltage V GS = VDS, ID = 4.4 mA 2.5 - 4.5 V RDS(on) Static Drain to Source On Resistance V GS = 10 V, ID = 22 A - 59 67 m gFS Forward Transconductance VDS = 20 V, ID = 22 A -2 9- S Ciss Input Capacitance VDS = 400V, VGS = 0 V, f = 1 MHz - 3090 4120 pF Coss Output Capacitance - 68 90 pF Coss(eff.) Effective Output Capacitance V DS = 0 V to 400 V, VGS = 0 V - 715 - pF Coss(er.) Energy Related Output Capacitance V DS = 0 V to 400 V, VGS = 0 V - 104 - pF Qg(tot) Total Gate Charge at 10V VDS = 400 V, ID = 22 A, VGS = 10 V (Note 4) -7 8 1 0 0 n C Qgs Gate to Source Gate Charge - 18 - nC Qgd Gate to Drain “Miller” Charge - 30 - nC ESR Equivalent Series Resistance f = 1 MHz - 0.6 - td(on) Turn-On Delay Time VDD = 400 V, ID = 22 A, VGS = 10 V, Rg = 4.7 (Note 4) -2 6 6 2 n s tr Turn-On Rise Time - 52 114 ns td(off) Turn-Off Delay Time - 89 188 ns tf Turn-Off Fall Time - 16 42 ns IS Maximum Continuous Drain to Source Diode Forward Current - - 44 A ISM Maximum Pulsed Drain to Source Diode Forward Current - - 110 A VSD Drain to Source Diode Forward Voltage V GS = 0 V, ISD = 22 A - - 1.2 V trr Reverse Recovery Time VGS = 0 V, ISD = 22 A, dIF/dt = 100 A/s - 435 - ns Qrr Reverse Recovery Charge - 9.2 - C Notes: 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. IAS = 8.8 A, L = 30 mH, RG = 25 , starting TJ = 25C. 3. ISD 22 A, di/dt 200 A/s, VDD 380V, starting TJ = 25C. 4. Essentially independent of operating temperature typical characteristics.
Figure 12. Transient Thermal Response Curve
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
- ISD controlled by pulse period VDD L I SD 10V VGS ( Driver ) I SD ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop VSD IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width DUT VDS Driver RG Same Type as DUT VGS • dv/dt controlled by RG
- ISD controlled by pulse period VDD LL I SD 10V VGS ( Driver ) I SD ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop VSD IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width
Figure 17. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead ically the warranty therein, which covers Fairchild products.
FCPF067N65S3 — N-Channel SuperFET® III MOSFET ©2015 Fairchild Semiconductor Corporation FCPF067N65S3 Rev. 1.1 www.fairchildsemi.com9 PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. 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