FCD1300N80Z FAIRCHILD | Alldatasheet
Document overview
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- PDF pages: 10
Technical content
Features
- R DS(on) = 1.05 Typ.)
- Ultra Low Gate Charge (Typ. Q g = 16.2 nC)
- L o w Eoss (Typ. 1.57 uJ @ 400V)
- Low Effective Output Capacitance (Typ. C oss(eff.) = 48.7 pF)
- 100% Avalanche Tested
- R o H S C o m p l i a n t
- ESD Improved Capability
Applications
- AC - DC Power Supply
- LED Lighting
Description
SuperFET® II MOSFET is Fairchild Semiconductor’s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This technology is tailored to minimize conduction loss , provide superior switching performance, dv/dt rate and higher avalanche energy. In addition, internal gate-source ESD diode allows to withstand over 2kV HBM surge stress.Consequently, SuperFET II MOSFET is very suitable for t he switching power applications such as Audio, Laptop adapter, Lighting, ATX power and industrial power applications. Absolute Maximum Ratings TC = 25oC unless otherwise noted. Thermal Characteristics Symbol Parameter FCD1300N80Z Unit VDSS Drain to Source Voltage 800 V VGSS Gate to Source Voltage - DC ±20 V - AC (f > 1 Hz) ±30 ID Drain Current - Continuous (TC = 25oC) 4 A - Continuous (TC = 100oC) 2.5 IDM Drain Current - Pulsed (Note 1) 12 A EAS Single Pulsed Avalanche Energy (Note 2) 48 mJ IAR Avalanche Current (Note 1) 0.8 A EAR Repetitive Avalanche Energy (Note 1) 0.26 mJ dv/dt MOSFET dv/dt 100 V/nsPeak Diode Recovery dv/dt (Note 3) 20 PD Power Dissipation (TC = 25oC) 52 W - Derate Above 25oC0 . 4 2 W / oC TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC TL Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds 300 oC Symbol Parameter FCD1300N80Z Unit RJC Thermal Resistance, Junction to Case, Max. 2.4 oC/W RJA Thermal Resistance, Junction to Ambient, Max. 100 D-PAK G S D G D S
FCD1300N80Z — N-Channel SuperFET® II MOSFET ©2014 Fairchild Semiconductor Corporation FCD1300N80Z Rev. C0 www.fairchildsemi.com2 Package Marking and Ordering Information Electrical Characteristics TC = 25oC unless otherwise noted. Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics Drain-Source Diode Characteristics Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity FCD1300N80Z FCD130080Z DPAK Tape and Reel 330 mm 16 mm 2500 units Symbol Parameter Test Conditions Min. Typ. Max. Unit BVDSS Drain to Source Breakdown Voltage V GS = 0 V, ID = 1 mA, TJ = 25C 800 - - V BVDSS / TJ Breakdown Voltage Temperature Coefficient ID = 1 mA, Referenced to 25oC - 0.85 - V/ oC IDSS Zero Gate Voltage Drain Current VDS = 800 V, VGS = 0 V - - 25 AVDS = 640 V, VGS = 0 V, TC = 125oC- - 2 5 0 IGSS Gate to Body Leakage Current V GS = ±20 V, VDS = 0 V - - ±10 A VGS(th) Gate Threshold Voltage V GS = VDS, ID = 0.4 mA 2.5 - 4.5 V RDS(on) Static Drain to Source On Resistance V GS = 10 V, ID = 2 A - 1.05 1.3 gFS Forward Transconductance VDS = 20 V, ID = 2 A -4 . 5- S Ciss Input Capacitance VDS = 100 V, VGS = 0 V, f = 1 MHz - 661 880 pF Coss Output Capacitance - 22.3 30 pF Crss Reverse Transfer Capacitance - 0.74 - pF Coss Output Capacitance V DS = 480 V, VGS = 0 V, f = 1 MHz - 11.4 - pF Coss(eff.) Effective Output Capacitance V DS = 0 V to 480 V, VGS = 0 V - 48.7 - pF Qg(tot) Total Gate Charge at 10V VDS = 640 V, ID = 4 A, VGS = 10 V (Note 4) - 16.2 21 nC Qgs Gate to Source Gate Charge - 3.5 - nC Qgd Gate to Drain “Miller” Charge - 6.8 - nC ESR Equivalent Series Resistance f = 1 MHz - 4 - td(on) Turn-On Delay Time VDD = 400 V, ID = 4 A, VGS = 10 V, Rg = 4.7 (Note 4) -1 4 3 8 n s tr Turn-On Rise Time - 8.3 27 ns td(off) Turn-Off Delay Time - 33 76 ns tf Turn-Off Fall Time - 6 22 ns IS Maximum Continuous Drain to Source Diode Forward Current - - 4 A ISM Maximum Pulsed Drain to Source Diode Forward Current - - 12 A VSD Drain to Source Diode Forward Voltage V GS = 0 V, ISD = 4 A - - 1.2 V trr Reverse Recovery Time VGS = 0 V, ISD = 4 A, dIF/dt = 100 A/s -2 7 5- n s Qrr Reverse Recovery Charge - 2.9 - C Notes: 1. Repetitive rating: pulse width limited by maximum junction temperature. 2. IAS = 0.8 A, RG = 25 , starting TJ = 25C 3. ISD 4 A, di/dt 200 A/s, VDD BVDSS, starting TJ = 25C 4. Essentially independent of operating temperature typical characteristic.
Figure 12. Transient Thermal Response Curve
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
- ISD controlled by pulse period VDD L I SD 10V VGS ( Driver ) I SD ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop VSD IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width DUT VDS Driver RG Same Type as DUT VGS • dv/dt controlled by RG
- ISD controlled by pulse period VDD LL I SD 10V VGS ( Driver ) I SD ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop VSD IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width
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