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Technical content
Features
300mA guaranteed output current 60dB typical PSRR at 1kHz 130µV (VOUT=3.0V) RMS output voltage noise (10Hz to 100kHz) 264mV (VOUT=2.8V) typical dropout at 300mA 60µA typical quiescent current Less than 1µA typical shutdown mo de Fast line and load transient response 2.2V to 5.5V input range Auto-discharge during chip disable 60µs typical turn-on time Stable with small ceramic output capacitors Over temperature and over current protection ±2% output voltage tolerance Typical Application SEMICONDUCTOR TECH NIC AL DATA FC8731 2018. 05. 03 1/11Revision No : 1
- 05. 03 2/11Revision No : 1 FC8731 Connection Diagrams Order information FC8731-XXVF05NRR XX Output voltage control no. NRR RoHS & Halogen free package Rating: -40 to 85°C Package in Tape & Reel Order, Marking & Packing Information Package Vout-A Vout-B Product ID. Marking Packing 2.5V 3.0V FC8731-02VF05NRR 1.2V 3.3V FC8731-06VF05NRR SOT-25 1.8V 2.8V FC8731-09VF05NRR Tape & Reel 3Kpcs SOT-25
Supply Voltage Input. Require a minimum input ca pacitor of close to 2. 2µF to ensure st ability and sufficient decoupling from the ground pin. GND 2 Ground Pin. EN 3 Enable Input. Enable the regulator by pulling the EN pin High. To keep the regulator on during normal operation, connect the EN pin to V IN. The EN pin must not exceed V IN under all operating conditions. ADJ 4 Adjustable Control. Connecting to GND to get output Voltage-A, Connecting to VIN to get output Voltage-B, Use external divider resistors to achieve desired output Voltage-C. OUT 5 Output Voltage Feedback. Functional Block Diagram Fast Start-up Circuit Current Limit Thermal Protection Error Amp. IN EN OUT GND Bandgap Vout select ADJ FIG.1. Functional Block Diagram of FC8731 FC8731 2018. 05. 03 3/11Revision No : 1
Absolute Maximum Ratings (Notes 1, 2) IN, EN, ADJ -0.3V to 6V OUT 1.0V to 4.5V Power Dissipation (N ote 8) Storage Temperature Range -65°C to 150°C Junction Temperature (TJ) 1 50°C Lead Temperature (Soldering, 10 sec.) 2 60°C ESD Rating Human Body Model 2KV Operating Ratings (Note 1, 2) Supply Voltage 2.2V to 5.5V Operating Temperature Range -40 °C to 85°C Thermal Resistance (θJA , Note 3)) 152°C/W (SOT-25) Thermal Resistance (θJC , Note 4)) 81°C/W (SOT-25)
Electrical Characteristics
Unless otherwise specified, all limits guaranteed for VIN = VOUT +1V (Note 5), VEN=VIN, CIN = COUT = 2.2µF, TA = 25°C. Boldface limits apply for the operating temperature extremes: -40°C and 85°C. Symbol Parameter Conditions Min Typ (Note. 9) Max Units VIN Input Volta ge 2.2 5.5 V VOUT Output Voltage 1.0 4.5 V -2 +2 VOUT ∕1.8V ,IOUT = 10mA -3 +3 % of VOUT NOM) -35 35 Δ VOTL Output Voltage Tolerance (Note 5) VOUT ＜1.8V ,IOUT = 10mA -50 50 mV IOUT Maximum Output Current Average DC Current Rating 300 mA ILIMIT A m 0 5 4 0 0 3 t i m i L t n e r r u C t u p t u O IOUT 0 6 A m 0 = Supply Current IOUT 0 3 1 A m 0 0 3 = IQ Shutdown Supply Current V OUT = 0V, EN = GND 1 VOUT = 3.0V I OUT = 100mA 100 VDO Dropout Voltage(Note 6) VOUT = 3.0V I OUT = 300mA 275 µA Line Regulation IOUT = 1mA, (V OUT + 1V) ≤ VIN ≤ 5.5V (Note 5) -0.1 0. 01 0.1 %/V Δ VOUT Load Regulation 1mA ≤ IOUT ≤ 300mA 0.003 %/mA en Output Voltage Noise VOUT = 3.0V, I OUT = 10mA, 10Hz ≤ f ≤ 100kHz 130 µVRMS Thermal Shutdown Temperature 5 6 1 TSD Thermal Shutdown Hysteresis 0 3 VIH, (V OUT + 1V) ≤ V IN ≤ 5.5V (Note 5) 1.2 VEN EN Input Threshold VIL, (V OUT + 1V) ≤ V IN ≤ 5.5V (Note 5) 0.4 V IEN EN Input Bias Current EN = GND or V IN 0.1 100 nA TON Turn-On Time VOUT at 95% of Final Value 60 µs TOFF Tu rn-Off Time IOUT = 0mA (Note 7) 2.2 ms 2018. 05. 03 4/11Revision No : 1 FC8731
Note 1: Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. Note 2: All voltages are with respect to the potential at the ground pin. Note 3: θ JA is measured in the natural convection at TA=25℃ on a high effective thermal c onductivity test board (2 layers, 2S0P). Note 4: θ JC represents the resistance to the heat flows the chip to package top case. Note 5: Condition does not apply to input voltages below 2.2V sinc e this is the minimum input operating voltage. Note 6: Dropout voltage is measured by reducing V IN until VOUT drops 100mV from its nominal value at VIN –VOUT = 1V. Dropout voltage does not apply to the regulator versions with VOUT less than 2.2V. Note 7: Turn-off time is time measured between the enable input just decreasing below VIL and the output voltage just decreasing to 10% of its nominal value. Note 8: Maximum Power dissipation for the device is calculated using the following equations: JAθ AT - J(MAX)T DP Where T J(MAX) is the maximum junction temperature, T A is the ambient te mperature, and θ JA is the junction-to-ambient thermal resistance. E.g. for the SOT- 25 package θ JA = 152°C/W, TJ (MAX) = 150°C and using T A = 25°C, the maximum power dissipation is found to be 0.82W. The derat ing factor (-1/ θ JA) = -6.6mW/°C, thus below 25°C the power dissipation figure can be increased by 6.6mW per degree, and similarity decreased by this factor for temperatures above 25°C. Note 9: Typical Values represent the most likely parametric norm FC8731 2018. 05. 03 5/11Revision No : 1
Typical Performance Characteristics Unless otherwise specified, VIN = VOUT NOM) + 1V, VEN=VIN, CIN = COUT = 2.2µF, TA = 25°C PSRR vs. Frequency (VOUT=2.8V) PSRR vs. Frequency (VOUT=3.0V) Ground Current vs. VIN (VOUT I . s v t n e r r u C d n u o r G ) V 8 . 1 = OUT (VOUT=1.8V) 0.0uA 10.0uA 20.0uA 30.0uA 40.0uA 50.0uA 60.0uA 70.0uA 0.0uA 20.0uA 40.0uA 60.0uA 80.0uA 100.0uA 120.0uA 140.0uA 160.0uA 0mA 50mA 100mA 150mA 200mA 250m 300mA t i m i L t n e r r u C t u p t u O e s i o N e g a t l o V t u p t u O 2018. 05. 03 6/11Revision No : 1 FC8731
Typical Performance Characteristics (cont.) Unless otherwise specified, VIN = VOUT NOM) + 1V, VEN=VIN, CIN = COUT = 2.2µF, TA = 25°C Enable Response Disable Response ) A m 0 0 1 = t u o I ( t n e i s n a r t e n i L ) A m 1 = t u o I ( t n e i s n a r t e n i L Load transient (VOUT=2.8V, IOUT=10mA to 100mA) L oad transient (VOUT=2.8V, IOUT=50mA to 100mA) FC8731 2018. 05. 03 7/11Revision No : 1
Application Information
Referring to Fig.1 as shown in the Functional Block Diagram section, the FC8731 adopts the classical regulator topology in which negative feedback control is used to perform the desired voltage regulating function. The sub Vout-select form the feedback circuit which samples the output voltage for the error amplifier’s non-inverting input. The inverting input is set to the bandgap reference voltage. Due to its high open-loop gain, the error amplifier ensures that the sampled output fee dback voltage at its non-inverting input is virtually equal to the preset bandgap reference voltage. The error amplifier compares the voltage difference at its inputs and produces an appropriate driving voltage to the P-channel MOS pass transistor, which controls the amount of current reaching the output. If there are changes in the output voltage due to load changes, the feedback resistors register these changes to the non-inverting input of the error amplifier. The error amplifier then adjusts its driving voltage to mainta in virtual short between its two input nodes under all loading conditions. The regulation of the output voltage is achieved as a direct result of the error amplifier keeping its input voltages equal. This negative feedback control topology is further augmented by the shutdown, the temperature and current protection circuitry. Selecting the Output Voltage VOUT can be simply set to VOUT-A/VOUT-B by connecting ADJ pin to GND/VIN via the internal resistors divider in the IC. FC8731 provides adjusted output voltage function al so via a resistor divider is connected to OUT, ADJ and GND. The VOUT can be calculated by the following equation: Where VREF = 0.746V and VOUT is ranging from 1.0V to 4.5V, the recommended R2 is 240KΩ. Output Capacitor The FC8731 is specially designed for use with ceramic output capacitors of as low as 2.2 μF to take advantage of the savings in cost and space, as well as the superior filtering of high frequency noise. Capacitors of higher value or other types may be use d, but it is important to make sure its equivalent series resistance (ESR) be restricted to less than 0.5 Ω. The u se of larger capacitors with smaller ESR valu es is desirable for a pplications involving large and fast input or output transients, as well as situations where the application systems are not physically located immediately adjacent to the battery power source. Typical ceramic capacitors suitable for use with the FC8731 are X5R and X7R. The X5R and the X7R capacitors are able to maintain their capacitance values to within ± 20% an d ±10%, respectively, as the temperature increases. No-Load Stability The FC8731 is capable of st able operation during no-load conditions, a mandatory feature for some applications such as CMOS RAM keep-alive operations. 2018. 05. 03 8/11Revision No : 1 FC8731
A minimum input capacitance of 2.2µF is required for FC8731. The capacitor value may be increased without limit. Improper workbench set-ups may have adverse effects on the normal operation of the regulator. A case in point is the instability that may result from long supply lead inductance coupling to the output through the gate capacitance of the pass transistor. This will establish a pseudo LCR network, and is likely to happen under high current conditions or near dropout. A 10µF tantalum input capa citor will dampen the parasitic LCR action thanks to its high ESR. However, cautions should be exercised to avoid regulator short-circuit damage when tantalum capacitors are used, for they are prone to fail in short-circuit operating conditions. Power Dissipation and Thermal Shutdown Thermal overload results from excessive power dissipation that causes the IC junction temperature to increase beyond a safe operating level. The FC8731 relies on dedicated thermal shutdown circuitry to limit its total power di ssipa tion. An IC juncti on t emperature T J exceeding 165°C wi ll tri gger the thermal shutdown logic, turning off the P-channel MOS pass transistor. The pass transistor turns on again after the junction cools off by about 30°C. When continuous thermal overload conditions persist, this thermal shutdown action then results in a pulsed waveform at the output of the regulator. The concept of thermal r esistance θJA (°C/W) is often u sed to describe an IC junc tion’s relative readiness in allowing its thermal energy to dissipate to its ambient air. An IC junction with a low thermal resistance is preferred because it is relatively e ffective in diss ipating its thermal energy to its ambient, thus r esulting in a relatively low and d esirable junction t emperature. The relation ship between θJA and TJ is as follows: TJ = θJA x (PD) + TA T A is the ambient temperature, and PD is the power generated by the IC and can be written as: P D = IOUT (VIN – VOUT) As the above equations show, it is d esirable to work wi th Ics whose θ JA values are small such that T J does not increase strongly with P D . To avoid thermally overloading the FC8731, refrain from exceeding the absolute maximum junction temperature rating of 150°C under continuous operating condit ions. Overstre ssing the regulator with high loading currents and elevated input-to-output differential voltages can increase the IC die temperature significantly. Shutdown The FC8731 enters sleep mode when the EN pin is low. When this occurs, the pa ss transistor, the error amplifier, and the biasing circuits, including the bandgap reference, are turned off, thus reducing the supply current to typically < 1uA. The low supply current makes the FC8731 best suited for battery-powered applications. The maximum guaranteed voltage at the EN pin to enter sl eep mode is 0.4V. A minimum guaranteed voltage of 1.2V at the EN pin will activate the FC8731. To constantly keep the regulator on, direct connection of the EN pin to the VIN pin is allowed. FC8731 2018. 05. 03 9/11Revision No : 1
VOUT-A output, ADJ pin connected to GND V OUT-B output, ADJ pin connected to VIN V OUT-c output, ADJ pin connected to a divider resisters Fig.2 The application circuit of FC8731 2018. 05. 03 10/11Revision No : 1 FC8731
PIN#1 MARK 1 3 5 4 DETAIL A E E1 e D A L 1 3 b DETAIL A c Min. Max. A 0.90 1.45 A1 0.00 0.15 b 0.30 0.50 c 0.08 0.25 D 2.70 3.10 E 1.40 1.80 E1 2.60 3.00 e L 0.30 0.60
0.95 BSC
- 05. 03 11/11Revision No : 1