FB2041A

SN74FB2041A TI | Alldatasheet

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SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 Compatible With IEEE Std 1194.1-1991 (BTL) /C0068 TTL A Port, Backplane Transceiver Logic (BTL) B Port /C0068 Open-Collector B-Port Outputs Sink 100 mA /C0068 BIAS VCC Pin Minimizes Signal Distortion During Live Insertion or Withdrawal /C0068 High-Impedance State During Power Up and Power Down /C0068 B -Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage /C0068 TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination 2AO1 1AI1 1AO1 1OEB TCK 14 15 16 17 18 19 20 21 22 23 24 25 26 52 51 50 49 48 47 46 45 44 43 42 41 40 GND 3AO3 3AI3 BG GND 2OEA TDO 3OEA 2OEB 3OEB 3AI2 GND 1B1 VCC VCC RC PACKAGE (TOP VIEW) BG V CC TMS GND 2AI1 2AI2 2AO2 GND 2AO3 GND 2AI3 3AI1 3AO1 GND 3AO2 GND GND 2B1 GND 2B2 GND 2B3 GND 3B1 GND 3B2 GND 3B3 GND BIAS VCC 1OEA VCC OEB TDI

description

The SN74FB2041A is a 7-bit transceiver designed to translate signals between TTL and backplane transceiver logic (BTL) environments. The device is specifically designed to be compatible with IEEE Std 1194.1-1991. The B port operates at BTL signal levels. The open-collector B ports are specified to sink 100 mA. Two output enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or VCC is less than 2.1 V, the B port is turned off. The enable/disable logic partitions the device as two 3-bit sections and one 1-bit section. The A port operates at TTL signal levels and has split input and output pins. The A outputs reflect the inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state. Copyright  2002, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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description (continued) The pins TMS, TCK, TDI, and TDO are nonfunctional, i.e., not intended for use with the IEEE Std 1149.1 (JTAG) test bus. TMS and TCK are not connected and TDI is shorted to TDO. BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING 0°C to 70°C QFP – RC Tube SN74FB2041ARC FB2041A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS FUNCTION OEB OEB OEA FUNCTION L X L Isolation X HL Isolation L X H B d ttA O bX HH B data to AO bus H L L AI data to B bus H L H AI data to B bus, B data to AO bus

SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram 1AI1 OEB 1OEB 1OEA 1AO1 1B140 2AI2 2AO2 2B2 2AI1 2OEB 2OEA 2AO1 2B1 2AI3 2AO3 2B3 3AI2 3AO2 12 3B2 3AI1 3OEB 3OEA 3AO1 3B1 3AI3 3AO3 3B3

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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) MIN NOM MAX UNIT VCC, BIAS VCC , BG V CC Supply voltage 4.5 5 5.5 V VIH High level input voltage B port 1.62 2.3 VVIH High-level input voltage Except B port 2 V VIL Low level input voltage B port 0.75 1.47 VVIL Low -level input voltage Except B port 0.8 V IIK Input clamp current –18 mA IOH High-level output current AO port –3 mA IOL Low level output current AO port 24 mAIOL Low -level output current B port 100 mA TA Operating free-air temperature 0 70 °C NOTE 2: To ensure proper device operation, all unused inputs must be terminated as follows: A and control inputs to VCC (5 V) or GND, and B inputs to GND only. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT VIK B port VCC = 4.5 V, II = –18 mA –1.2 VVIK Except B port VCC = 4.5 V, II = –40 mA –0.5 V VOH AO port VCC = 4.5 V, IOH = –3 mA 2.5 3.3 V AO port VCC = 4.5 V, IOL = 24 mA 0.35 0.5 VOL B t VCC =45V IOL = 80 mA 0.75 1.1 V B port VCC = 4.5 V IOL = 100 mA 1.15 II Except B port VCC = 5.5 V, VI = 5.5 V 50 µA IIH‡ Except B port VCC = 5.5 V, VI = 2.7 V 50 µA I ‡ Except B port VCC = 5.5 V, VI = 0.5 V –50 AIIL‡ B port VCC = 5.5 V, VI = 0.75 V –100 µA IOH B port VCC = 0 to 5.5 V, VO = 2.1 V 100 µA IOZH AO port VCC = 5.5 V, VO = 2.7 V 50 µA IOZL AO port VCC = 5.5 V, VO = 0.5 V –50 µA IOZPU AO port VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V 50 µA IOZPD AO port VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V –50 µA IOS § AO port VCC = 5.5 V, VO = 0 –30 –180 mA ICC AI port to B port VCC =55V IO =0 mAICC B port to AO port VCC = 5.5 V, IO = 0 mA C i AI port VI=05Vo r25V pFC i Control inputs VI = 0.5 V or 2.5 V pF C o AO port VO = 0.5 V or 2.5 V 5.5 pF C B port per VCC = 0 to 4.5 V 5 pFC io IEEE Std 1194.1-1991 VCC = 4.5 V to 5.5 V 5 pF † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. live-insertion specifications over recommended operating free-air temperature range PARAMETER TEST CONDITIONS MIN MAX UNIT ICC (BIAS VCC ) VCC = 0 to 4.5 V VB =0t o2V Vl(BIAS VCC )=45Vt o55V 450 µAICC (BIAS VCC ) VCC = 4.5 V to 5.5 V VB = 0 to 2 V, Vl (BIAS VCC ) = 4.5 V to 5.5 V µA VO B port VCC = 0, VI (BIAS VCC ) = 5 V 1.62 2.1 V VCC = 0, VB = 1 V, Vl (BIAS VCC ) = 4.5 V to 5.5 V –1 IO B port VCC = 0 to 5.5 V, OEB = 0 to 0.8 V 100 µA VCC = 0 to 2.2 V, OEB = 0 to 5 V 100

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switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C MIN MAX UNIT(INPUT) (OUTPUT) MIN TYP MAX tPLH AI B 2.3 3.9 5.1 2 5.6 ns tPHL AI B 2.6 4.1 5 2.5 5.3 ns tPLH B AO 2 3.6 4.8 1.7 5.3 ns tPHL B AO 2.3 3.8 4.9 2 6.4 ns tPLH OEB B 3 4.6 5.8 2.6 6.3 ns tPHL OEB B 3.1 4.7 6 3.1 6.2 ns tPLH OEB B ns tPHL ns tPZH OEA AO ns tPZL OEA AO 1.1 2.8 5 1 5 ns tPHZ OEA AO 1 2.4 3.9 1 4.2 ns tPLZ OEA AO ns tsk(p)† Pulse skew, AI to B or B to AO 0.5 ns tsk(o)† Output skew, AI to B or B to AO 0.4 ns tt ns t(pr) B-port input pulse rejection 1 1 ns † Skew values are applicable for through mode only.

NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) SN74FB2041ARC ACTIVE QFP RC 52 96 TBD CU SNPB Level-2-240C-1YR SN74FB2041ARCG3 ACTIVE QFP RC 52 96 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR SN74FB2041ARCR ACTIVE QFP RC 52 500 TBD CU SNPB Level-2-240C-1YR SN74FB2041ARCRG3 ACTIVE QFP RC 52 500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 1

MQFP003 – OCTOBER 1994 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RC (S-PQFP-G52) PLASTIC QUAD FLATPACK 4040151/ B 03/95 0,16 NOM 0,25 1,03 0,73 0,05 MIN Gage Plane 0,22 7,80 TYP 0,38 SQ SQ 9,80 2,20 1,80 10,20 12,95 13,45 2,45 MAX 0,65 M0,13 Seating Plane 0,10 0°–7° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-022

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