FB1650

SN74FB1650 TI | Alldatasheet

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/C0083/C0078/C0055/C0052/C0070/C0066/C0049/C0054/C0053/C0048 /C0049/C0056/C0262/C0066/C0073/C0084 /C0084/C0084/C0076/C0047/C0066/C0084/C0076 /C0085/C0078/C0073/C0086/C0069/C0082/C0083/C0065/C0076 /C0083/C0084/C0079/C0082/C0065/C0071/C0069 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082 SCBS178O − AUGUST 1992 − REVISED MARCH 2004 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Compatible With IEEE Std 1194.1-1991 (BTL) /C0068TTL A Port, Backplane Transceiver Logic (BTL) B Port /C0068Open-Collector B-Port Outputs Sink 100 mA /C0068BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal /C0068High-Impedance State During Power Up and Power Down /C0068B -Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage /C0068TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination PCA PACKAGE (TOP VIEW) 100 NC VCC GND 1AO6 1AI6 1AO7 1AI7 GND 1AO8 1AI8 1AO9 1AI9 GND 2AO1 2AI1 2AO2 2AI2 GND 2AO3 2AI3 2AO4 2AI4 GND VCC NC 1B2 GND 1B3 1B4 GND 1B5 1B6 GND 1B7 1B8 GND 1B9 NC 2B1 GND 2B2 2B3 GND 2B4 2B5 GND 2B6 2B7 GND 2B8 GND 2AO5 2AI5 2AO6 GND 2AO7 2AO8 V VCC 2AI7 2CLKAB 2OEA 2LEAB GND 2AO9 GND 1OEB 1OEA 1LEAB 2OEB 2OEB 2LEBA 2CLKBA 1CLKAB 2AI8 GND 1AO1 GND 2AI9 CC 2OEA 2AI6 BIAS VCC CC 1OEB 1LEBA 1CLKBA 1OEA 1AI1 1AO2 1AI2 1AO3 1AI3 1AO4 1AI4 1AO5 1AI5 NC − No internal connection 51 1B1 BG GND BG VNC 2B9 Copyright  2004, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

/C0083/C0078/C0055/C0052/C0070/C0066/C0049/C0054/C0053/C0048 /C0049/C0056/C0262/C0066/C0073/C0084 /C0084/C0084/C0076/C0047/C0066/C0084/C0076 /C0085/C0078/C0073/C0086/C0069/C0082/C0083/C0065/C0076 /C0083/C0084/C0079/C0082/C0065/C0071/C0069 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082 SCBS178O − AUGUST 1992 − REVISED MARCH 2004

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description/ordering information The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991. The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output enables (OEB and OEB) are provided for the B outputs. When OEB is low, OEB is high, or VCC is less than 2.1 V, the B port is turned off. The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state. BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected. BG V CC and BG GND are the supply inputs for the bias generator.

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING 0°C to 70°C TQFP − PCA Tube SN74FB1650PCA FB1650 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Function Tables TRANSCEIVER INPUTS FUNCTION OEA OEA OEB OEB FUNCTION X X H L A data to B bus L HXX B data to A bus L HHL A data to B bus, B data to A bus X X L X B-bus isolationX XXH B-bus isolation H X X X A-bus isolation X L X X A-bus isolation STORAGE MODE INPUTS FUNCTIONLE CLK FUNCTION H X Transparent L ↑ Store data L L Storage

/C0083/C0078/C0055/C0052/C0070/C0066/C0049/C0054/C0053/C0048 /C0049/C0056/C0262/C0066/C0073/C0084 /C0084/C0084/C0076/C0047/C0066/C0084/C0076 /C0085/C0078/C0073/C0086/C0069/C0082/C0083/C0065/C0076 /C0083/C0084/C0079/C0082/C0065/C0071/C0069 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082 SCBS178O − AUGUST 1992 − REVISED MARCH 2004 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram To Eight Other Channels 1OEB 1OEB 1CLKAB 1LEAB 1LEBA 1CLKBA 1OEA 1OEA 1AI1 1AO1 1B1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.

/C0083/C0078/C0055/C0052/C0070/C0066/C0049/C0054/C0053/C0048 /C0049/C0056/C0262/C0066/C0073/C0084 /C0084/C0084/C0076/C0047/C0066/C0084/C0076 /C0085/C0078/C0073/C0086/C0069/C0082/C0083/C0065/C0076 /C0083/C0084/C0079/C0082/C0065/C0071/C0069 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082 SCBS178O − AUGUST 1992 − REVISED MARCH 2004

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 2) MIN NOM MAX UNIT VCC, BG V CC , BIAS VCC Supply voltage 4.5 5 5.5 V VIH High-level input voltage B port 1.62 2.3 VVIH High-level input voltage Except B port 2 V VIL Low-level input voltage B port 0.75 1.47 VVIL Low-level input voltage Except B port 0.8 V IIK Input clamp current −18 mA IOH High-level output current A port −3 mA IOL Low-level output current A port 24 mAIOL Low-level output current B port 100 mA TA Operating free-air temperature 0 70 °C NOTE 2: To ensure proper device operation, all unused inputs must be terminated as follows: A and control inputs to VCC (5 V) or GND, and B inputs to GND only. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT VIK B port VCC = 4.5 V, II = −18 mA −1.2 VVIK Except B port VCC = 4.5 V, II = −40 mA −0.5 V VOH AO port VCC = 4.5 V, IOH = −3 mA 2.5 3.3 V AO port VCC = 4.5 V, IOL = 24 mA 0.35 0.5 VOL B port VCC = 4.5 V IOL = 80 mA 0.75 1.1 VVOL B port VCC = 4.5 V IOL = 100 mA 1.15 V II Except B port VCC = 5.5 V, VI = 5.5 V 50 µA IIH‡ Except B port VCC = 5.5 V, VI = 2.7 V 50 µA IIL‡ Except B port VCC = 5.5 V, VI = 0.5 V −50 AIIL‡ B port VCC = 5.5 V, VI = 0.75 V −100 µA IOZH AO port VCC = 5.5 V, VO = 2.7 V 50 µA IOZL AO port VCC = 5.5 V, VO = 0.5 V −50 µA IOZPU AO port VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V 50 µA IOZPD AO port VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V −50 µA IOH B port VCC = 0 to 5.5 V, VO = 2.1 V 100 µA IOS § A port VCC = 5.5 V, VO = 0 −30 −150 mA ICC A port to B port VCC = 5.5 V, IO = 0 100 mAICC B port to A port VCC = 5.5 V, IO = 0 120 mA C i AI port VI = VCC or GND 5.5 pFC i Control inputs VI = VCC or GND 5.5 pF C o AO ports VO = VCC or GND 5.5 pF C io B port per IEEE Std 1194.1-1991VCC = 0 to 5.5 V 5.5 pF † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

/C0083/C0078/C0055/C0052/C0070/C0066/C0049/C0054/C0053/C0048 /C0049/C0056/C0262/C0066/C0073/C0084 /C0084/C0084/C0076/C0047/C0066/C0084/C0076 /C0085/C0078/C0073/C0086/C0069/C0082/C0083/C0065/C0076 /C0083/C0084/C0079/C0082/C0065/C0071/C0069 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082 SCBS178O − AUGUST 1992 − REVISED MARCH 2004 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 live-insertion specifications over recommended operating free-air temperature range PARAMETER TEST CONDITIONS MIN MAX UNIT ICC (BIAS VCC ) VCC = 0 to 4.5 V VB = 0 to 2 V, VI (BIAS VCC ) = 4.5 V to 5.5 V 450 AICC (BIAS VCC ) VCC = 4.5 V to 5.5 V VB = 0 to 2 V, VI (BIAS VCC ) = 4.5 V to 5.5 V 10 µA VO B port VCC = 0, VI (BIAS VCC ) = 5 V 1.62 2.1 V VCC = 0 , VB = 1 V, VI (BIAS VCC ) = 4.5 V to 5.5 V −1 A IO B port VCC = 0 to 2.2 V, OEB = 0 to 5 V 100 µA IO B port VCC = 0 to 5.5 V, OEB = 0 to 0.8 V 1 mA timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) VCC = 5 V, TA = 25°C MIN MAX UNIT MIN MAX MIN MAX UNIT fclock Clock frequency 150 150 MHz tw Pulse duration CLK or LE 3.3 3.3 ns tsu Setup time Data before LE 4.8 4.8 nstsu Setup time Data before CLK↑ 4.9 4.9 ns th Hold time Data after LE 1.8 1.8 nsth Hold time Data after CLK↑ 1.1 1.1 ns

/C0083/C0078/C0055/C0052/C0070/C0066/C0049/C0054/C0053/C0048 /C0049/C0056/C0262/C0066/C0073/C0084 /C0084/C0084/C0076/C0047/C0066/C0084/C0076 /C0085/C0078/C0073/C0086/C0069/C0082/C0083/C0065/C0076 /C0083/C0084/C0079/C0082/C0065/C0071/C0069 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082 SCBS178O − AUGUST 1992 − REVISED MARCH 2004

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C MIN MAX UNITPARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX UNIT fmax 150 150 MHz tPLH AI B nstPHL AI B 2.9 4.4 6 2.9 7.2 ns tPLH LEAB B nstPHL LEAB B 3.5 5 6.5 3.5 7.3 ns tPLH CLKAB B 2.3 3.9 5.5 2.3 6 nstPHL tPLH B AO nstPHL tPLH LEBA AO nstPHL LEBA AO 1.7 3 4.4 1.7 4.7 ns tPLH CLKBA AO nstPHL tPLH OEB B nstPHL tPLH OEB B nstPHL OEB B 3.4 4.6 6.4 3.4 7 ns tPZH OEA AO nstPZL OEA AO 1.4 2.6 4 1.4 4.6 ns tPHZ OEA AO nstPLZ OEA AO 2.2 3.6 5 2.2 5.5 ns tPZH OEA AO nstPZL tPHZ OEA AO nstPLZ OEA AO 2 3.1 4.6 2 4.8 ns tsk(p)† Pulse skew, AI to B or B to AO 1 ns tsk(o)† Output skew, AI to B or B to AO 0.5 ns nstt Transition time AO outputs (10% to 90%) 0.5 2 3.6 0.4 4.2 ns t(pr) B-port input pulse rejection 1 1 ns † Skew values are applicable for through mode only.

NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. D. The outputs are measured one at a time, with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) SN74FB1650PCA ACTIVE HLQFP PCA 100 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SN74FB1650PCAG4 ACTIVE HLQFP PCA 100 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 12-Sep-2006 Addendum-Page 1

MHTQ003A – JANUARY 1995 – REVISED DECEMBER 1996 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PCA (S-PQFP-G100) PLASTIC QUAD FLATPACK (DIE DOWN) 4040288/B 10/96 Heat Slug Gage Plane 0,13 NOM 0,25 0,45 0,75 Seating Plane 0,05 MIN 0,27 12,00 TYP 0,17 100 SQ SQ15,80 16,20 13,80 1,60 MAX 1,45 1,35 14,20 0,08 0,50 M0,08 0°–7° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Thermally enhanced molded plastic package with a heat slug (HSL) D. Falls within JEDEC MS-026

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