FAN8902 FAIRCHILD | Alldatasheet
Document overview
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- PDF pages: 14
Technical content
Features
- Built-in PWM Current Control Circuit
- Built-in 5V Regulator
- Low Supply Current
- Stalled Motor Current Limitation
- Built-in Over V oltage Protection (OVP)
- Built-in Over Current Protection (OCP)
- Built-in Load Dump Protection
- Built-in Thermal Shutdown (TSD) Circuit
- Built-in Under V oltage Lockout (UVLO) Circuit
Description
The FAN8902 is a monolithic integrated circuit, designed for the PWM control of a DC fan motor current in an automotive systems. It allows the fan motor speed to be controlled linearly and efficiently. 14-DIP-300 Typical Application
- DC for Motor Control for Automotive
Ordering Information
Device Package Operating Temperature FAN8902 14-DIP-300 -40 °C ~ +90°C FAN8902(KA3902) DC FAN Motor Controller
FAN8902(KA3902) Pin Assignments Pin Definitions Pin Number Pin Name Pin Function Description
1 CMD Motor Current Command Input
2 CMDa Optional OP Amplifier Output
3 CMDb Optional OP Amplifier (-) Input
4 SGND Signal GND
T / CT Oscillator Time Constant
6 VREF Voltage Reference (5V)
7 CH Maximum Current Reference Input
8 NC No Connection
9 CL Minimum Current Reference Input
10 CS Motor Current Sense Voltage Input
11 PGND Power GND
12 OUT Drive Output
14 La Motor Current Maximum Reference Input
R T / CT VREF CH La VCC OUT PG CS CL NC F A N 8 9 0 2
FAN8902(KA3902) Internal Block Diagram Vref − Oscillator PWM LOGIC OVP UVLO TSD PWM Comparator × 5 1.3V 36V R VCC OUT PGND CS R T/CT SGND Vref CH CMD La CL CMDa CMDb
FAN8902(KA3902) Absolute Maximum Ratings Operating Voltage Temperature Characteristics Parameter Symbol Value Unit Supply Voltage V CC 32 V CMD Input Voltage V CMD 6V Peak Output Current I OPK ±0.8 A Power Dissipation P D 1W Parameter Symbol Min. Typ. Max Unit Power Supply Voltage V CC 9.0 12.0 32.0 V Parameter Symbol Temp Value Unit Vref Temperature Stability V ST -40 ~ +90°C 200 °C Frequency Stability F ST -40 ~ +90°C 20 ~ 30 °C Operating Temperature T OPR - -40 ~ +90 °C Storage Temperature T STG - -60 ~ +150 °C
FAN8902(KA3902)
Electrical Characteristics
(Unless otherwise, Ta=25°C, VCC=5V, VM=12V) Parameter Symbol Conditions Min. Typ. Max. Unit REFERENCE Reference Voltage Vref Iref=1mA 4.75 5.0 5.25 V Line Regulation ∆Vref1 V CC=9V ~ 32V - 50 150 mV Load Regulation ∆Vref2 Iref=1mA ~ 10mA - 10 50 mV UNDER VOLTAGE LOCKOUT (UVLO) Start Threshold Voltage V TH(ST) - 7.5 8.0 8.5 V Threshold Hysteresis V HYS - 1.0 1.2 1.4 V PROTECTION Over Voltage O VP -3 3 3 6 - V OSCILLATOR (RT=75kΩΩΩΩ , CT=1nF) Frequency fosc - 20 25 30 kHz Duty Cycle Duty - 90 95 - % CURRENT SENSING INPUT Threshold Voltage V TH(ST) VCMD = 5V 0.19 0.20 0.21 V OUTPUT DRIVER Output Voltage Switching Limit V OLIM VCC = 18V, Cld =1nF - 15 - V Low Output Voltage VOL1 Iout = 20mA - - 0.4 V VOL2 Iout = 200mA - - 2.2 V High Output Voltage VOH1 Iout = -20mA 10.0 - - V VOH2 Iout = -200mA 9.0 - - V Rising Time Tr Cld = 1nF - 100 200 ns Falling Time Tf Cld = 1nF - 100 200 ns TOTAL STANDBY CURRENT Start-up Current I ST VCC = 7V - 1.0 1.5 mA Operating Supply Current I CC VCC = 9V - 6.0 8.0 mA
FAN8902(KA3902)
Application Information
- Under Voltage Lockout (UVLO) 2. Current Sensing Circuit The peak current, IM(MAX)=VS/RS For example, if a required maximum current, IM(MAX)=20[A] 3. Thermal Shutdown (Tsd) When the chip, temperature rises up to 150°C, the thermal shutdown (TSD) circuit is activated and the output driver turn off, and then turn on again at 125°C. TH(ST) THYS 8.0V 1.2V
13 Vref &
6.8V 8V V TH(ST) PWM Logic × 5 Imax=1V + Current amplifier FAN8902 PWM comparator M VBAT IM RS VS RS 1V 5⁄
FAN8902(KA3902) 4. Oscillator Component Selection The oscillator timing components can be calculated as follows: For example, if fosc = 25kHz and duty = 95% 5. Current Command Input Section The current command I* selects the lower value between VCMD and VLa. VHVLID CT RT V/CT Vref Logic+ VCT [V] VH=3.0 VL=1.75 T=40.0 TC=39.0Td=1.0 t [µs] TC RT CT× In Vref V L–() Vref V H–()⁄[]×= TD CT VH VL–() ID⁄[]×= fosc 1 T C TD+()⁄=
1.875 R T CT×()⁄=
Duty T C fosc× 100×= CT TD ID×() VH VL–()⁄= 1000 pF[]= RT 1.875 fosc C T×()⁄= 75 k Ω[]= +14 1CMD VCMD La VLa 4R R Logic FAN8902
FAN8902(KA3902) 6. Slope Compensation An unconditional instability of the inner current loop exists for any fixed frequency current-mode converter operating above 50% duty cycle. Therefore, to guarantee current loop stability, the slope of the compensation ramp must be greater than one-half of the down slope of the current waveform. The ramp voltage for slope compensation is as follow, 7. Motor Stall Current Limitation VRAMP R14 OSC FAN8902 5TR2 R11 R12 R14 Vref To PWM Comparator VCMD Slop Compensation × 5 M VBAT C1 C2 IM VRS RS R VCMD R3C4 VGS R10I* Logic PWM COMP Buffer-OP-amp VCS VLA FAN8902 CMD
FAN8902(KA3902) In the steady state, the terminal voltage on a motor is consisted of a back EMF and the voltage drop on the armarture resistors. When the motor happens to be stalled, the back EMF becomes zero, and the motor current (IM) is quickly increased until a maximum values. Therefore the duty of the pin #12 output becomes lower because of the increase of the sense voltage (VRS). Also it makes the voltage (VLa) be lowered, then it makes the duty become lower again. This mechanism makes the motor current hold very low value in the stalled motor state. The voltage on pin #14 (V La) ia calculated as follows: We can choose the ratio of the resistors, R2 and R3, as follows: - Applied the rated voltage on motor, and then measured the current IRAT - Matched the maximum command current, V CMD,MAX to IRA T. VCMD,MAX = VLa,MAX = RS × IRAT × 5 × 5 for example, if RS = 10mΩ and IRA T = 20[A] at VBAT = 13[V], VCMD,MAX = VLa,MAX = 10mΩ × 20 × 25 = 5V -V La,MAX = 5V = VBAT × 1 × R3 / (R2 + R3) Ratio = R3 / (R2 + R3) = VCMD,MAX / VBA T = 5 / 13 Therefore, R2 : R3 = 8 : 5 The buffer OP-amp selects the lower command between VCMD and VLa so as to limit the stalled motor current to very low in the above figure. Because of much larger VLa than VCMD, the motor operating point stays at A. But the point gradually moves toward B’ and then B” through the curve from the instance of stall as the below figure. VLa VBAT D× R3 VLa curve × (1 / R) The voltage drop on the amarture resistance VLA VCMD IRAT VMOTOR,STALL VBAT VLA VLA VMOTOR Operating curve A B
FAN8902(KA3902) 8. Operational Mode Selection The FAN8902 has three operation modes as follows: - STOP: Turned-off the power MOSFET - LINEAR: Linearly controlled the power MOSFET - FULL-ON: Fully turned-on the power MOSFET The voltage, V SRT (PIN #9) and VMAX (PIN #7), in the application circuit are as follows: -V SRT (PIN #9) = Vref × R7 / (R5 + R6 + R7) -V MAX (PIN #7) = Vref × (R6 + R7) / (R5 + R6 + R7) 9. Over Voltage Protector (Ovp) If the voltage, VBAT ≥ 36[V], the output (pin #12) is grounded, and the switching device (power MOSFET) is turned-off, and the motor is stopped. Then if the voltage, VBAT → 36[V], the switching device is turned-on again, and the motor is operated. 10. Totem-pole Output The FAN8902 has a single totem-pole output driver which can be drive current to peak ±0.8[A]. Motor current Normal operation Stalled state Reduced switch-on time VCMD VCS VLa Uncontrolled without the FAN8902 Controlled with the FAN8902 IMAX current [A] ISRT VSRT VCMD [V] VMAX VBAT FULL-ONSTOP LINEAR Motor
FAN8902(KA3902) Test Circuit 123 4567 891011121314 10k 10k RT 75k 22µF SW 1 CT 1nF IN 1 TP 1 IN 2 TP 2 Iout TP 3 IN 3 IN 4IN 5IN 6 Iout Cid 1µFCO 47µF VCC SW 2 TP 4 A F A N 8 9 0 2 CMD CMDa CMDb SG R T / CT VREF CH La VCC OUT PG CS CL NC
FAN8902(KA3902) Typical Application M NC NC Current command CT RT NC RS C4 R3 R10 VBAT C1 C2 CMD CMDa CMDb SG RT / CT VREF CH La VCC OUT PG CS CL NC F A N 8 9 0 2 R14 R11 R12
FAN8902(KA3902)
FAN8902(KA3902) 9/17/02 0.0m 001 Stock#DSxxxxxxxx 2002 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.