FAN8811 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
- Drives two N−Channel MOSFETs in High & Low Side
- Integrated Bootstrap Diode for High Side Gate Drive
- Bootstrap Supply V oltage Range up to 100 V
- 3 A Source, 6 A Sink Output Current Capability
- Drives 1 nF Load with Typical Rise/Fall Times of 6 ns/4 ns
- TTL Compatible Input Thresholds
- Wide Supply V oltage Range 7.5 V to 16 V (Absolute Maximum 18 V)
- Fast Propagation Delay Times (Typ. 30 ns)
- 2 ns Delay Matching (Typical)
- Under−V oltage Lockout (UVLO) Protection for Drive V oltage
- Operating Junction Temperature Range of −40°C to 125°C
- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Typical Applications
- Power Supplies for Telecom and Datacom
- Half−Bridge and Full−Bridge Converters
- Synchronous−Buck Converters
- Two−Switch Forward Converters
- Class−D Audio Amplifiers www.onsemi.com MARKING DIAGRAM
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. FAN8811T= Specific Device Code Z = Plant Code X= 1 −Digit Year Code Y= 1 −Digit Week Code TT = 2 −Digit Die Run Code MP = Package Type X = Reel Package WDFN10 4x4, 0.8P CASE 511DUZXYTT VDD HB HO HS HI LI VSS LO NC NC FAN8811T MPX
Figure 3. Simplified Block Diagram Figure 4. Pin Assignments − 10 Lead MLP (Top View) Table 1. PIN DESCRIPTION
1 VDD Logic and low−side gate driver power supply voltage
2 HB High−side floating supply
3 HO High−side driver output
4 HS High−voltage floating supply return
5 NC No Connection
6 NC No Connection
7 HI Logic input for High−side gate driver output
8 LI Logic input for Low−side gate driver output
9 VSS Logic Ground
10 LO Low−side driver output
Table 2. MAXIMUM RATINGS All voltage parameters are referenced to VSS, unless otherwise noted. should not be assumed, damage may occur and reliability may be affected. HS negative voltage capability can be calculated using (VHB –VHS)−18 V base on VHB, due to its dependence on VDD voltage level.
- Verified at bench characterization.
Table 3. ESD AND MSL Table 4. THERMAL INFORMATION
- 1S0P with thermal via: one signal layer with zero power plane and thermal via
- 1S2P with thermal via: one signal layer with two power planes and thermal via
Table 5. RECOMMENDED OPERATING RANGES the Recommended Operating Ranges limits may affect device reliability.
Table 6. ELECTRICAL CHARACTERISTICS VDD = VHB = 12 V, VHS = VSS = 0 V, TA = TJ = −40°C to 125°C, no load on HO or LO, unless otherwise noted.
high side driver can operate with supply voltage up to 80 V . in both the high−and low side. matching with the low side driver. UVLO rise threshold is 6.3 V with 0.4 V hysteresis. Table 7. DEVICE LOGIC STATUS
- VDD: Gate drive IC supply voltage
- Vf : Static forward voltage drop of bootstrap diode
- VHB,UVLO: HB Under−V oltage Lockout level The total charge (Qbs) required by the bootstrap capacitor can be calculated by summing the Qg of the MOSFET and the charge required for the level shifter in the gate drive IC which is negligible quantity to compared Q g of the MOSFET. QBS /C0043Qg /C0041(IHBS /C0032TON) (eq. 2) Where:
- QBS: Total gate charge of bootstrap capacitor
- Qg: Gate charge of the MOSFET
- IHBS: Quiescent current in High side gate drive IC.
- TON: Turning on of MOSFET The guiding criteria for calculating the minimum required bootstrap capacitance can be obtained through (eq.4). CBOOT.MIN /C0119QBS /C0068VHB (eq. 3)
www.onsemi.com goes into the capacitance is dissipated in the resistor. The losses in the gate driver resistance, internal and external to the gate driver, and the switching losses of the internal CMOS circuitry. The dynamic losses of the high side driver also have two different sources. One is due to the level shifting circuit and one due to the charging and discharging of the capacitance of the high side. The static losses are neglected here because the total IC power dissipation is mainly dynamic losses of gate drive IC and can be estimated as: PDGATE /C00432 /C0032CL /C0032fS /C0032VDD [W] (eq. 6) The bootstrap circuit power dissipation is the sum of the bootstrap diode losses and the bootstrap resistor losses if any exist. The bootstrap diode loss is the sum of the forward bias power loss that occurs while charging the bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery. Since each of these events happens once per cycle, the diode power loss is proportional to switching frequency. Larger capacitive loads require more current to recharge the bootstrap capacitor, resulting in more losses. PCB Layout Guideline FAN8811 is a high speed and high current high side and low side driver. To avoid any device malfunction during device operation, it is very important that there is very low parasitic inductance in the current switching path. It is very important that the best layout practices are followed for the PCB layout of the FAN8811. The following should be considered before beginning a PCB layout using the FAN8811.
- The gate driver should be located as close as possible of switching MOSFET.
- The VDD capacitor and bootstrap capacitor should be located as near as possible to the device.
- In order to reduce a ringing voltage of the HS node, the space between high side source and low side drain of the MOSFET should be as small as possible.
- The exposed pad should be connected to GND plane and use at least four or more vias for improved thermal performance.
- Avoid driver input pulse signal close to the HS node. One of recommendation layout pattern for the driver is shown in Figure 26.
Figure 26. Layout Recommendation Device Output Configuration Temperature Range (/C0053C) Package Shipping† FAN8811TMPX High−Side and Low−Side −40 to 125 WDFN10 4x4, 0.8P (Pb−Free) Tape & Reel (Pin 1 upper left near sprocket holes) FAN8811MNTXG High−Side and Low−Side −40 to 125 WDFN10 4x4, 0.8P (Pb−Free) Tape & Reel (Pin 1 upper right near sprocket holes) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D
WDFN10 4x4, 0.8P CASE 511DU ISSUE O DATE 28 FEB 2017 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON13715GDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1WDFN10 4x4, 0.8P © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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