FAN6920MR ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • mWSaver Technology Provides Industry’s Best−in−Class Standby Power ♦ Internal High−Voltage JFET Startup ♦ Adaptive Off−Time Modulation of tOFF−MIN for QR PWM Stage, Improved Light−Load Efficiency ♦ PFC Burst or Shutdown at Light−Load Condition ♦ Optimized for Dual Switch Flyback Design to Achieve >90% Efficiency While Meeting 2013 ErP Lot 6 Standby Power Requirement
  • Integrated PFC and Flyback Controller
  • Critical−Mode PFC Controller
  • Zero−Current Detection for PFC Stage
  • Quasi−Resonant Operation for PWM Stage
  • Internal 5 ms Soft−Start for PWM
  • Brownout Protection
  • High / Low Line Over−Power Compensation
  • Auto−Recovery Over−Current Protection
  • Auto−Recovery Open−Loop Protection SOIC−16, 150 mils CASE 751BG−01 MARKING DIAGRAM ZXYTT FAN6920FO TPM See detailed ordering and shipping information on page 20 of this data sheet.

ORDERING INFORMATION

FAN6920 = Specific Device Code Z = Plant Code X = Year Code Y = Week Code TT = DIe−Run Code F = Frequency (M = Low, H = High Level) O = OLP Mode (L = Latch, R = Recovery) T = Package Type (M = SOP) P = Y = Green Package M = Manufacture Flow Code Features (continued)

  • Externally Auto−Recovery Triggering (RT Pin)
  • Adjustable Over−Temperature Protection
  • VDD Pin and Output V oltage OVP (Auto−Recovery)
  • Internal Over−Temperature Shutdown (140°C)
  • This is a Pb−Free Device

Applications

  • AC/DC NB Adapters
  • Open−Frame SMPS
  • Battery Charger Related Resources
  • Evaluation Board: FEBFAN6920MR_T02U120A

Figure 1. Typical Application Circuit

Figure 2. Functional Block Diagram

Figure 3. Pin Configuration 2 COMP Output pin of the error amplifier. It is a transconductance−type error amplifier for PFC output voltage feedback. loop allows a simple compensation circuit between this pin and GND. is turned on and VINV exceeds in 2.3 V, PWM starts. 4 CSPFC Input to the PFC over−current protection comparator that provides cycle−by−cycle current limiting protection. the PFC switch is turned off to activate cycle−by−cycle current limiting. 6 OPFC Totem−pole driver output to drive the external power MOSFET. The clamped gate output voltage is 15.5 V. less than 30 /C0109A and the operating current is lower than 10 mA. 9 GND The power ground and signal ground.

  • Producing an offset voltage to compensate the threshold voltage of PWM current limit for overpower compensation. The offset is generated in accordance with the input voltage when the PWM switch is on.
  • Detecting the valley voltage signal of drain voltage of the PWM switch to achieve the valley voltage switching and minimize the switching loss on the PWM switch.
  • Providing output over−voltage protection. A voltage comparator is built in to the DET pin. The DET pin detects the flat voltage through a voltage divider paralleled with auxiliary winding. This flat voltage is reflected to the secondary winding during PWM inductor discharge time. If output over voltage and this flat voltage are higher than 2.5 V, the controller stops all PFC and PWM switching operation. The protection mode is auto−recovery. 11 FB Feedback voltage pin used to receive the output voltage level signal to determine PWM gate duty for regulating output voltage. The FB pin voltage can also activate open−loop, overload protection and output−short circuit protection if the FB pin voltage is higher than a threshold of around 4.2 V for more than 50 ms. The input impedance of this pin is a 5 k/C0087 equivalent resistance. A 1/3 attenuator is connected between the FB pin and the input of the CSPWM/FB comparator.

www.onsemi.com PIN DEFINITIONS (continued) Pin No. DescriptionName 12 RT Adjustable over−temperature protection and external protection triggering. A constant current flows out from the RT pin. When RT pin voltage is lower than 0.8 V (typical), protection is activated and stops PFC and PWM switching operation. This protection is auto−recovery. 13 VIN Line−voltage detection for brownin / out protections. This pin can receive the AC input voltage level through a voltage divider. The voltage level of the VIN pin is not only used to control RANGE pin’s status, but it can also perform brownin / out protection for AC input voltage UVP. 14 ZCD Zero−current detection for the PFC stage. This pin is connected to an auxiliary winding coupled to PFC inductor winding to detect the ZCD voltage signal once the PFC inductor current discharges to zero. When the ZCD voltage signal is detected, the controller starts a new PFC switching cycle. When the ZCD pin voltage is pulled to under 0.2 V (typical), it disables the PFC stage and the controller stops PFC switching. This can be realized with an external circuit if disabling the PFC stage is desired.

15 NC No connection

16 HV High−voltage startup pin is connected to the AC line voltage through a resistor (100 k/C0087 typical) for providing a high charging current to VDD capacitor. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Min Max Unit VDD DC Supply Voltage − 30 V VHV HV − 500 V VH OPFC, OPWM −0.3 25.0 V VL INV, COMP, CSPFC, DET, FB, CSPWM, RT, VIN, RANGE −0.3 7.0 V VZCD Input Voltage to ZCD Pin −0.3 12.0 V PD Power Dissipation − 800 mW /C0113JA Thermal Resistance (Junction−to−Air) − 104 °C/W /C0113JC Thermal Resistance (Junction−to−Case) − 41 °C/W TJ Operating Junction Temperature −40 +150 °C TSTG Storage Temperature Range −55 +150 °C TL Lead Temperature (Soldering, 10 Seconds) − +260 °C ESD Human Body Model, JESD22−A114 (All Pins Except HV Pin) (Note 3) − 4500 V Charged Device Model, JESD22−C101 (All Pins Except HV Pin) (Note 3) − 1250 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with respect to the GND pin. 3. All pins including HV pin: CDM = 750 V, HBM 1000 V.

www.onsemi.com ELECTRICAL CHARACTERISTICS (VDD = 15 V and TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Unit VDD Section VOP Continuously Operating Voltage − − 25 V VDD−ON Turn−On Threshold Voltage 10.5 12.0 13.5 V VDD−PWM−OFF PWM Off Threshold Voltage 6 7 8 V VDD−OFF Turn−Off Threshold Voltage 4 5 6 V IDD−ST Startup Current VDD = VDD−ON − 0.16 V, Gate Open − 20 30 /C0109A IDD−OP Operating Current VDD = 15 V, OPFC, OPWM = 100 kHz, CL−PFC, CL−PWM = 2 nF − − 10 mA IDD−GREEN Green−Mode Operating Supply Current (Average) VDD = 15 V, OPWM = 450 Hz, CL−PWM = 2 nF − 5.5 − mA IDD−PWM−OFF Operating Current at PWM−Off Phase VDD = VDD−PWM−OFF − 0.5 V 70 120 170 /C0109A VDD−OVP VDD Over−Voltage Protection (Auto−Recovery) 26.5 27.5 28.5 V tVDD−OVP VDD OVP Debounce Time 100 150 200 /C0109s HV Startup Current Source Section IHV Supply Current Drawn from HV Pin VAC = 90 V, (VDC = 120 V), VDD = 0 V 1.3 − − mA HV = 500 V, VDD = VDD−OFF +1 V − 1.0 − /C0109A VIN and RANGE Section VVIN−UVP Threshold Voltage for AC Input Under−Voltage Protection 0.95 1.00 1.05 V VVIN−RE−UVP Under−Voltage Protection Reset Voltage VVIN−UVP +0.15 V VVIN−UVP +0.20 V VVIN−UVP +0.25 V V tVIN−UVP Under−Voltage Protection Debounce Time 70 100 130 ms VVIN−RANGE−H High VVIN Threshold for RANGE Comparator 2.40 2.45 2.50 V VVIN−RANGE−L Low VVIN Threshold for RANGE Comparator 2.20 2.25 2.30 V tRANGE Range−Enable / Disable Debounce Time 60 90 120 ms VRANGE−OL Output Low Voltage of RANGE Pin IO = 1 mA − − 0.5 V IRANGE−OH Output High Leakage Current of RANGE Pin RANGE = 5 V − − 50 nA tON−MAX−PFC PFC Maximum On Time RMOT = 24 k/C0087 22 25 28 /C0109s PFC STAGE Voltage Error Amplifier Section Gm Transconductance (Note 4) 100 125 150 /C0109mho VREF Feedback Comparator Reference Voltage 2.465 2.500 2.535 V VINV−H Clamp High Feedback Voltage RANGE = Open 2.70 2.75 2.80 V RANGE = Ground 2.60 2.65 2.70 VRATIO Clamp High Output Voltage Ratio (Note 4) VINV−H / VREF, RANGE = Open 1.06 − 1.14 V/V VINV−H / VREF, RANGE = Ground 1.04 − 1.08 VINV−L Clamp Low Feedback Voltage 2.25 2.35 2.45 V

www.onsemi.com ELECTRICAL CHARACTERISTICS (VDD = 15 V and TA = 25°C unless otherwise noted) (continued) Symbol UnitMaxTypMinConditionsParameter Voltage Error Amplifier Section VINV−OVP Over−Voltage Protection for INV Input RANGE = Open − 2.90 2.95 V RANGE = Ground − 2.75 2.80 tINV−OVP Over−Voltage Protection Debounce Time 50 70 90 /C0109s VINV−UVP Under−Voltage Protection for INV Input 0.35 0.45 0.55 V VINV−PWMON PWM ON Threshold Voltage on INV Pin 2.2 2.3 2.4 V VHYST−PWMON Hysteresis for PWM ON Threshold Voltage on INV Pin VINV− PWMON −1.6 VINV− PWMON −1.5 VINV− PWMON −1.4 V tINV−UVP Under−Voltage Protection Debounce Time 50 70 90 /C0109s VINV−BO PWM and PFC Off Threshold for Brownout Protection 1.15 1.20 1.25 V VCOMP−BO Limited Voltage on COMP Pin for Brownout Protection 1.55 1.60 1.65 V ICOMP−BURST Internal Bias Current for PFC Burst Mode 120 150 180 /C0109A VCOMP−H Comparator Output High Voltage 4.80 − 5.20 V Comparator Output High Voltage at PFC Burst Mode VFB = 1.3 V, VVIN = 2 V 1.80 1.90 2.00 VCOMP−L Comparator Output Low Voltage at PFC Burst Mode RANGE = Open, VFB = 1.3 V 0.9 1.0 1.1 V VOZ Zero Duty Cycle Voltage on COMP Pin 1.10 1.25 1.40 V ICOMP Comparator Output Source Current VINV = 2.3 V, VCOMP = 1.5 V 15 30 45 /C0109A VINV = 1.5 V 0.50 0.75 1.00 mA Comparator Output Sink Current RANGE = Open, VINV = 2.75 V, VCOMP = 5 V 20 30 40 /C0109A RANGE = Ground, VINV = 2.65 V, VCOMP = 5 V 20 30 40 PFC Current−Sense Section VCSPFC Threshold Voltage for Peak Current Cycle−by−Cycle Limit VCOMP = 5 V 0.77 0.82 0.87 V tPD Propagation Delay − 110 200 ns tBNK Leading−Edge Blanking Time 110 180 250 ns AV CSPFC Compensation Ratio for THD 0.90 0.95 1.00 V/V PFC Output Section VZ PFC Gate Output Clamping Voltage VDD = 25 V 14.0 15.5 17.0 V VOL PFC Gate Output Voltage Low VDD = 15 V, IO = 100 mA − − 1.5 V VOH PFC Gate Output Voltage High VDD = 15 V, IO = 100 mA 8 − − V tR PFC Gate Output Rising Time VDD = 12 V, CL = 3 nF, 20~80% 30 65 100 ns tF PFC Gate Output Falling Time VDD = 12 V, CL = 3 nF, 80~20% 30 50 70 ns

www.onsemi.com ELECTRICAL CHARACTERISTICS (VDD = 15 V and TA = 25°C unless otherwise noted) (continued) Symbol UnitMaxTypMinConditionsParameter PFC Zero−Current Detection Section VZCD Input Threshold Voltage Rising Edge VZCD Increasing 1.9 2.1 2.3 V VZCD−HYST Threshold Voltage Hysteresis VZCD Decreasing 0.25 0.35 0.45 V VZCD−HIGH Upper Clamp Voltage IZCD = 3 mA 8 10 − V VZCD−LOW Lower Clamp Voltage 0.35 0.45 0.55 V VZCD−SSC Starting Source Current Threshold Voltage 0.70 0.90 1.10 V tDELAY Maximum Delay from ZCD to Output Turn−On VCOMP = 5 V, fS = 60 kHz 100 − 200 ns tRESTART−PFC Restart Time 300 500 700 /C0109s tINHIB Inhibit Time (Maximum Switching Frequency Limit) VCOMP = 5 V 1.5 2.5 3.5 /C0109s VZCD−DIS PFC Enable / Disable Function Threshold Voltage 0.15 0.20 0.25 V tZCD−DIS PFC Enable / Disable Function Debounce Time VZCD = 100 mV 100 150 200 /C0109s PWM STAGE Feedback Input Section AV Input−Voltage to Current Sense Attenuation (Note 4) AV = /C0068VCS / /C0068VFB, 0 < VCS < 0.9 ZFB Input Impedance (Note 4) VFB > VG 3 5 7 k/C0087 IOZ Bias Current VFB = VOZ − 1.2 2.0 mA VOZ Zero Duty Cycle Input Voltage 0.7 0.9 1.1 V VFB−OLP Open−Loop Protection Threshold Voltage 3.9 4.2 4.5 V tFB−OLP The Debounce Time for Open−Loop Protection 40 50 60 ms tFB−SS Internal Soft−Start Time (Note 4) VFB = 0 V~3.6 V 4 5 6 ms DET Pin OVP and Valley Detection Section VDET−OVP Comparator Reference Voltage 2.45 2.50 2.55 V Av Open−Loop Gain (Note 4) − 60 − dB BW Gain Bandwidth (Note 4) − 1 − MHz tDET−OVP Output OVP (Auto−Recovery) Debounce Time 100 150 200 /C0109s IDET−SOURCE Maximum Source Current VDET = 0 V − − 1 mA VDET−LOW Lower Clamp Voltage IDET = 1 mA 0.15 0.25 0.35 V tVALLEY−DELAY Delay Time from Valley Signal Detected to Output Turn−On (Note 4) 150 200 250 ns tOFF−BNK Leading−Edge Blanking Time for DET−OVP (2.5 V) and Valley Signal when PWM MOS Turns Off (Note 4) − 2.5 − /C0109s tTIME−OUT Time−Out After tOFF−MIN (Note 4) 8 9 10 /C0109s PWM Oscillator Section tON−MAX−PWM Maximum On−Time 38 45 52 /C0109s tOFF−MIN Minimum Off−Time VFB ≥ VN, TA = 25°C − 5 − /C0109s VFB = VG − 20.5 − VN Beginning of Green−On Mode at FB Voltage Level 1.95 2.10 2.25 V VG Beginning of Green−Off Mode at FB Voltage Level 1.00 1.15 1.30 V ΔVG Hysteresis for Beginning of Green−Off Mode at FB Voltage Level (Note 4) − 0.1 − V

www.onsemi.com ELECTRICAL CHARACTERISTICS (VDD = 15 V and TA = 25°C unless otherwise noted) (continued) Symbol UnitMaxTypMinConditionsParameter PWM Oscillator Section VCTRL−PFC−BM Threshold Voltage on FB Pin for PFC Burst Mode RANGE Pin Internally Open 1.65 1.70 1.75 V RANGE Pin Internally Ground 1.60 1.65 1.70 VCTRL−PFC−ON Threshold Voltage on FB Pin for PFC Normal Operating 1.75 1.80 1.85 V tPFC−BM Debounce Time for PFC Burst Mode PFC Normal Operating → Burst Mode − 100 − ms tPFC−ON Debounce Time for PFC Recovery to Normal Operating PFC Burst Mode → Normal Operating − 200 − /C0109s tSTARTER−PWM Start Timer (Time−Out Timer) VFB < VG, TA = 25°C 1.85 2.25 2.65 ms VFB > VFB−OLP, TA = 25°C 22 28 34 /C0109s PWM Output Section VCLAMP PWM Gate Output Clamping Voltage VDD = 25 V 16.0 17.5 19.0 V VOL PWM Gate Output Voltage Low VDD = 15 V, IO = 100 mA − − 1.5 V VOH PWM Gate Output Voltage High VDD = 15 V, IO = 100 mA 8 − − V tR PWM Gate Output Rising Time CL = 3 nF, VDD = 12 V, 20~80% − 80 110 ns tF PWM Gate Output Falling Time CL = 3 nF, VDD = 12 V, 20~80% − 40 70 ns Current Sense Section tPD Delay to Output − 150 200 ns VLIMIT Limit Voltage on CSPWM Pin for Over−Power Compensation IDET < 75 /C0109A, TA = 25°C 0.81 0.84 0.87 V IDET = 185 /C0109A, TA = 25°C 0.69 0.72 0.75 IDET = 350 /C0109A, TA = 25°C 0.55 0.58 0.61 IDET = 550 /C0109A, TA = 25°C 0.37 0.40 0.43 VSLOPE Slope Compensation (Note 4) tON = 45 /C0109s, RANGE = Open 0.25 0.30 0.35 V tON = 0 /C0109s 0.05 0.10 0.15 tON−BNK Leading−Edge Blanking Time 300 ns VCS−FLOATING CSPWM Pin Floating VCSPWM Clamped High Voltage CSPWM Pin Floating 4.5 − 5.0 V tCS−H Delay Time, CS Pin Floating CSPWM Pin Floating − 150 − /C0109s RT Pin Over−Temperature Protection Section TOTP Internal Threshold Temperature for OTP (Note 4) 125 140 155 °C TOTP−HYST Hysteresis Temperature for Internal OTP (Note 4) − 30 − °C IRT Internal Source Current of RT Pin 90 100 110 /C0109A VRT−AR Protection Triggering Voltage 0.75 0.80 0.85 V VRT−OTP−LEVEL Threshold Voltage for Two−Level Debounce Time 0.45 0.50 0.55 V tRT−OTP−H Debounce Time for OTP − 10 − ms tRT−OTP−L Debounce Time for Externally Triggering VRT < VRT−OTP−LEVEL 70 110 150 /C0109s Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Guaranteed by design.

the PFC gate is turned off immediately. waveform of PFC gate and CSPFC pin voltage. Figure 32. Cycle−by−Cycle Current Limiting

1.3 V (typical) and VDD reaches turn−on voltage again, the

Figure 33. Operation Waveforms of Brownout / In Figure 34. Measured Waveform of Brownout / In

www.onsemi.com Temperature Range Package Shipping† FAN6920MRMY Recovery −40°C to +105°C 16−Pin Small Outline Package (SOP) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

SOIC−16, 150 mils CASE 751BG ISSUE O DATE 19 DEC 2008 TOP VIEW PIN#1 IDENTIFICATION E D A e b L h c SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. /C0113 SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 9.80 5.80 3.80

1.27 BSC

1.75 0.25 0.51 0.25 0.50 10.00 6.20 4.00 L 0.40 1.27 1.35 9.90 6.00 3.90 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. 98AON34275EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1SOIC−16, 150 mils © Semiconductor Components Industries, LLC, 2008 www.onsemi.com

onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. ADDITIONAL INFORMATION TECHNICAL PUBLICATIONS: Technical Library: www.onsemi.com/design/resources/technical−documentation onsemi Website: www.onsemi.com ONLINE SUPPORT: www.onsemi.com/support For additional information, please contact your local Sales Representative at www.onsemi.com/support/sales