FAN6756

FAN6756AMRMY FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

 Single-Ended Topologies, such as Flyback and Forward Converters  mWSaver™ Technology - Achieves Low No-Load Power Consumption: < 30 mW at 230 VAC (EMI Filter Loss Included) - Eliminates X Capacitor Discharge Resistor Loss with AX-CAP® Technology - Linearly Decreases Switching Frequency to 23 kHz - Burst Mode Operation at Light-Load Condition - Impedance Modulation in “Deep” Burst Mode - Low Operating Current (450 µA) in Deep Burst Mode - 500 V High-Voltage JFET Startup Circuit to Eliminate Startup Resistor Loss  Highly Integrated with Rich Features - Proprietary Frequency Hopping to Reduce EMI - High-Voltage Sampling to Detect Input Voltage - Peak-Current-Mode Control with Slope Compensation - Cycle-by-Cycle Current Limiting with Line Compensation - Leading Edge Blanking (LEB) - Built-In 7 ms Soft-Start  Advanced Protections - Brown-in / Brownout Recovery - Internal Overload / Open-Loop Protection (OLP) - VDD Under-Voltage Lockout (UVLO) - VDD Over-Voltage Protection (VDD OVP) - Over-Temperature Protection (OTP) - Current-Sense Short-Circuit Protection (SSCP)

Description

The FAN6756 is a next-generation Green Mode PWM controller with innovative mWSaver™ technology, which dramatically reduces standby and no-load power consumption, enabling compliance with worldwide Standby Mode efficiency guidelines. An innovative AX-CAP® method minimizes losses in the EMI filter stage by elimin ating the X-cap discharge resistors while meeting IEC61010-1 safety requirements. “Deep” Burst Mode clamps feedback voltage and modulates feedback impedance with an impedance modulator during Burst Mode operation, which forces the system to operate in a Deep Burst Mode with minimum switching losses. Protections ensure safe oper ation of the power system in various abnormal conditions. A proprietary frequency- hopping function decreases EMI emission and built-in synchronized slope compensation allows more stable Peak-Current-Mode control ov er a wide range of input voltage and load conditions. The proprietary internal line compensation ensures const ant output power limit over the entire universal line voltage range. Requiring a minimum number of external components, FAN6756 provides a basic platform that is well suited for cost-effective flyback converter designs that require extremely low standby power consumption.

Applications

Flyback power supplies that demand extremely low standby power consumption, such as:  Adapters for Notebooks, Printers, Game Consoles, etc.  Open-Frame SMPS for LCD TV, LCD Monitors, Printer Power, etc. Related Resources  Evaluation Board: FEBFAN6756MR_T03U065A

Ordering Information

Protections(1) Operating Temperature Range Package Packing Method OLP OVP OTP SSCP FAN6756MRMY A/R L L A/R -40 to +105°C 8-Pin, Small Outline Package (SOP) Tape & Reel FAN6756MLMY L L L A/R Note: 1. A/R = Auto Recovery Mode pr otection, L = Latch Mode protection.

Figure 3. Top Mark Figure 4. Pin Configuration (Top View) 1 GND Ground. Placing a 0.1 µF decoupling ca pacitor between VDD and GND is recommended. sense signal from the SENSE pin.

3 NC No Connection

EMI filter capacitor when removal of the AC line voltage is detected. Over-Temperature Protection. An external NTC thermistor is connected from this pin to GND. ground to prevent noise interference. protection, and cycle-by-cycle current limiting.

7 VDD

© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6756 • Rev. 2.0.0 4 FAN6756— mWSaver™ PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dam age the device. The device may not function or be operable above the recommended operating conditions and stressi ng the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VVDD DC Supply Voltage (2,3) 30 V VFB FB Pin Input Voltage -0.3 7.0 V VSENSE SENSE Pin Input Voltage -0.3 7.0 V VRT RT Pin Input Voltage -0.3 7.0 V VHV HV Pin Input Voltage 500 V PD Power Dissipation (TA＜50°C) 400 mW JA Thermal Resistance (Junction-to-Air) 150 C/W TJ Operating Junction Temperature -40 +125 C TSTG Storage Temperature Range -55 +150 C TL Lead Temperature (Wave Soldering or IR, 10 Seconds) +260 C ESD Human Body Model, JEDEC:JESD22-A114 All Pins Except HV Pin(4) 6000 V Charged Device Model, JEDEC:JESD22-C101 All Pins Except HV Pin(4) 2000 Notes: 2. All voltage values, except differential voltages, ar e given with respect to the network ground terminal. 3. Stresses beyond those listed under Absolute Maximu m Ratings may cause permanent damage to the device. 4. ESD level on HV pin is CDM=1250 V and HBM=500 V. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the dat asheet specifications. We does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Typ. Max. Unit RHV Resistance on HV Pin 150 200 250 k Ω

© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6756 • Rev. 2.0.0 5 FAN6756— mWSaver™ PWM Controller

Electrical Characteristics

VDD=15 V and TJ=TA=25°C unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit VDD Section VDD-ON Threshold Voltage to Startup V DD Rising 16 17 18 V VUVLO Threshold Voltage to Stop Switching in Normal Mode VDD Falling 5.5 6.5 7.5 V VRESTART Threshold Voltage to Enable HV Startup to Charge VDD in Normal Mode VDD Falling 4.7 V VDD-OFF Threshold Voltage to Stop Operating in Protection Mode VDD Falling 10 11 12 V VDD-OLP Threshold Voltage to Enable HV Startup to Charge VDD in Protection Mode VDD Falling 6 7 8 V VDD-LH Threshold Voltage to Release Latch Mode VDD Falling 3.5 4.0 4.5 V VDD-AC Threshold Voltage of VDD pin for Enabling Brown-in VUVLO +2.5 VUVLO+3 VUVLO +3.5 V IDD-ST Startup Current V DD=VDD-ON – 0.16 V 30 µA IDD-OP1 Supply Current in PWM Operation VDD=15 V, VFB = 3 V, Gate Open 1.8 mA IDD-OP2 Supply Current when PWM Stops VDD=15 V, VFB <1.4 V, Deep Burst Mode, Gate Off 450 µA IDD-OLP Internal Sink Current, VDD-OLP<VDD<VDD-OFF, Protection Mode VDD= VDD-OLP + 0.1 V FAN6756MRMY 90 140 190 µA FAN6756MLMY 160 210 260 µA ILH Internal Sink Current, VDD<VDD-OLP, Latch-Protection Mode VDD = 5 V 30 µA VDD-OVP Threshold Voltage for VDD Over-Voltage Protection 23.5 24.5 25.5 V tD-VDDOVP VDD Over-Voltage Protection Debounce Time 110 205 300 µs VDD-ZFBR VDD Threshold Voltage for FB-Pin Impedance Modulation in Deep Burst Mode 7 V Continued on the following page…

© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6756 • Rev. 2.0.0 6 FAN6756— mWSaver™ PWM Controller Electrical Characteristics (Continued) VDD=15 V and TJ=TA=25C unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit HV Section IHV Maximum Supply Current, HV Pin VAC=90 V(VDC=120 V), VDD=0 V 1.50 3.25 5.00 mA VAC-OFF Threshold Voltage for Brownout DC Source Series R=200 kΩ to HV Pin 90 100 110 V VAC-ON Threshold Voltage for Brown-in DC Source Series R=200 kΩ to HV Pin 100 110 120 V △VAC VAC-ON – VAC-OFF DC Source Series R=200 kΩ to HV Pin 8 12 16 V tD-AC-OFF Debounce Time for Brownout 40 65 90 ms tS-WORK Work Period of HV-Sampling Circuit in Deep Burst Mode Deep Burst Mode, VFB<VFB-ZDC-DBM 95 140 185 ms tS-REST Rest Period of HV-Sampling Circuit in Deep Burst Mode Deep Burst Mode, VFB<VFB-ZDC-DBM 180 260 320 ms VHV-DIS X-Cap. Discharge Threshold R HV=200 kΩ to HV Pin VDC (5) ×0.45 VDC (5) ×0.51 VDC (5) ×0.56 V tD-HV-DIS Debounce Time for Triggering X-Cap. Discharge 75 115 155 ms tHV-DIS Discharge Time when X-Cap. Discharge is Triggered 360 510 660 ms Oscillator Section fOSC Switching Frequency when VFB>VFB-N Center Frequency 62 65 68 kHz Hopping Range ±3.55 ±4.25 ±4.95 tHOP Hopping Period (6) V FB>VFB-G 5.12 6.40 7.68 ms fOSC-G Switching Frequency when VFB<VFB-G VFB<VFB-G 20 23 26 kHz fDV Frequency Variation vs. VDD Deviation VDD=11 to 22 V 5 % fDT Frequency Variation vs. Temperature Deviation TA=-40 to 105C 5 % Continued on the following page…

© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6756 • Rev. 2.0.0 7 FAN6756— mWSaver™ PWM Controller Electrical Characteristics (Continued) VDD=15 V and TJ=TA=25C unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit Feedback Input Section AV Feedback Voltage to Current- Sense Attenuation 1/4.5 1/4.0 1/3.5 V/V ZFB Regular FB Internal Pull-High Impedance 8.5 k Ω VFB-OPEN FB Internal Biased Voltage FB Pin Open 5.2 5.4 5.6 V VFB-OLP Threshold Voltage for OLP 4.3 4.6 4.9 V tD-OLP Delay for OLP 45.0 57.5 70.0 ms VFB-N Threshold Voltage for Maximum Switching Frequency 2.6 2.8 3.0 V VFB-G Threshold Voltage for Minimum Switching Frequency 2.1 2.3 2.5 V VFB-ZDCR FB Threshold Voltage for Zero- Duty Recovery 1.9 2.1 2.3 V VFB-ZDC FB Threshold Voltage for Zero- Duty 1.8 2.0 2.2 V VFB-ZDCR- DBM FB Threshold Voltage for Zero- Duty Recovery in Deep Burst Mode VDD=VUVLO+0.3 V 2.5 2.7 2.9 V VFB-ZDC- DBM FB Threshold Voltage for Zero- Duty in Deep-Burst Mode 2.35 2.55 2.75 V tDBM Condition of Triggering Deep Burst Mode VFB<VFB-ZDC Repeats 3 Times Continuously 7.5 ms tD-DBM Delay time of Entering Deep Burst Mode 600 ms VFB- RECOVER Threshold Voltage for Leaving Deep Burst Mode Immediately Deep Burst Mode, VDD>VDD-ZFBR and Gate Off 0.9 V Current-Sense Section tPD Propagation Delay to Output 100 250 ns tLEB Leading Edge Blanking Time 200 265 330 ns VLIMIT-L Current Limit at Low Line (VAC-RMS=86 V) VDC=122 V, Series R=200 kΩ to HV 0.43 0.46 0.49 V VLIMIT-H Current Limit at High Line (VAC-RMS=259 V) VDC=366 V, Series R=200 kΩ to HV 0.36 0.39 0.42 V VSSCP-L Threshold Voltage for SSCP at Low Line (VAC-RMS=86 V) VDC=122 V, Series R=200 kΩ to HV 30 50 70 mV VSSCP-H Threshold Voltage for SSCP at High Line (VAC-RMS=259 V) VDC=366 V, Series R=200 kΩ to HV 80 100 120 mV tON-SSCP Minimum On-time of Gate to Trigger SSCP VSENSE<VSSCP-(L/H) 4.00 4.55 5.10 µs tD-SSCP Debounce Time for SSCP V SENSE<VSSCP-(L/H) 110 170 230 µs tSS Soft-Start Time Startup 5 7 9 ms Continued on the following page…

© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6756 • Rev. 2.0.0 8 FAN6756— mWSaver™ PWM Controller Electrical Characteristics (Continued) VDD=15V and TJ=TA=25C unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit GATE Section DCYMAX Maximum Duty Cycle 75.0 82.5 90.0 % VGATE-L Gate Low Voltage VDD=15 V, IO=5 mA 1.5 V VGATE-H Gate High Voltage V DD=1 V, IO=5 mA 8 V tr Gate Rising Time V DD=1 V, CL= nF 110 ns tf Gate Falling Time V DD=15 V, CL=1 nF 40 ns VGATE- CLAMP Gate Output Clamping Voltage V DD=22 V 11.0 14.5 18.0 V nSKIP Continuously Gate Switching Number for Leaving Deep-Burst Mode(6) 112 pulses RT Section IRT Output Current of RT Pin 100 µA VRTTH1 Threshold Voltage for Over-Temperature Protection VRTTH2 < VRT <VRTTH1, Latch Off After 14.5 ms 1.000 1.035 1.070 V VRTTH2 Threshold Voltage for Latch Triggering VRT < VRTTH2, Latch Off After 185 µs 0.65 0.70 0.75 V ROTP Maximum External Resistance of RT Pin to Trigger Latch Protection 9.66 10.50 11.34 k Ω tD-OTP1 Debounce Time for Over-Temperature Protection Triggering VRTTH2 < VRT < VRTTH1 11.0 14.5 18.0 ms tD-OTP2 Debounce Time for Latch Triggering V RT < VRTTH2 110 185 260 µs Over-Temperature Protection Section (OTP) TOTP Protection Junction Temperature (6,7) +135 °C TRESTART Restart Junction Temperature (6) T OTP-25 °C Notes: 5. V DC is VAC × √2. 6. Guaranteed by design. 7. When activated, the out put is stopped until junction temperature drops below T RESTART.

Figure 39. VDD UVLO at Protection Mode

14.5 V Zener diode to protect the power MOSFET gate

reducing the switching noise. Figure 40. Schematic of Typical Application Circuit

© 2011 Fairchild Semiconductor Corporation FAN6756 • Rev. 2.0.0 17 FAN6756— mWSaver™ PWM Controller Transformer Schematic Diagram  Core: Ferrite Core RM-10  Bobbin: RM-10 Figure 41. Transformer Specification Shielding: Adhesive Tape of Copper Foil, t = 0.025×7 mm, 1.2-Layer Open Loop, Connected to Pin 4. Shielding: Adhesive Tape of Copper Foil, t = 0.025×7mm, 1.2-Layer Open Loop, Connected to Pin 4. Primary-Side Inductance 4 －6 510 H ±5% 1 kHz, 1 V Primary-Side Effective Leakage Inductance 4 －6 20 H Maximum Short All Other Pins Typical Performance Power Consumption Input Voltage Output Power Actual Output Power Input Power Specification

230 VAC

No Load 0 W 0.024 W Input Power < 0.03 W 0.25 W 0.232 W 0.339 W I nput Power < 0.5 W 0.5 W 0.495 W 0.643 W Input Power < 1 W Efficiency Output Power 16.25 W 32.5 W 48.75 W 65 W Average

B) ALL DIMENSIONS ARE IN MILLIMETERS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M.

1.75 MAX

Figure 42. 8-Pin SOP-8 Package http://www.fairchildsemi.com/packaging/.

© 2011 Fairchild Semiconductor Corporation FAN6756 • Rev. 2.0.0 19 FAN6756— mWSaver™ PWM Controller

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