FAN6754WA ONSEMI | Alldatasheet
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© 2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FAN6754WA • Rev. 1.0.6 FAN6754WA — Highly Integrated Green-Mode PWM Controller FAN6754WA Highly Integrated Green-Mode PWM Controller Brownout and VLimit Adjustment by HV Pin
Features
High-Voltage Startup AC Input Brownout Protection with Hysteresis Monitor HV to Adjust VLimit Low Operating Current: 1.5 mA Linearly Decreasing PWM Frequency to 22 kHz Frequency Hopping to Reduce EMI Emission Fixed PWM Frequency: 65 kHz Peak-Current-Mode Control Cycle-by-Cycle Current Limiting Leading-Edge Blanking (LEB) Internal Open-Loop Protection GATE Output Maximum Voltage Clamp: 13 V VDD Under-Voltage Lockout (UVLO) VDD Over-Voltage Protection (OVP) Programmable Over-Temperature Protection (OTP) Internal Latch Circuit (OVP, OTP) Open-Loop Protection (OLP); Restart for FAN6754WAMRMY, Latch for FAN6754WAMLMY SENSE Short-Circuit Protection (SSCP) Built-in 8 ms Soft-Start Function
Applications
General-purpose switch-mode power supplies (SMPS) and flyback power converters, including: Power Adapters
Description
The highly integrated FAN6754WA PWM controller provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary Green-Mode function provides off-time modulation to continuously decrease the switching frequency under light-load conditions. Under zero-load and very light-load conditions, FAN6754WA saves PWM pulses by entering "deep" Burst Mode. Burst Mode enables the power supply to meet international power conservation requirements. FAN6754WA also integrates a frequency-hopping function that helps reduce EMI emission of a power supply with minimum line filters. The built-in synchronized slope compensation helps achieve stable peak-current control. To k eep constant output power limit over universal AC input range, the current limit is adjusted according to AC li ne voltage detected by the HV pin. The gate output is clamped at 13 V to protect the external MOSFET from over-voltage damage. Other protection functions include AC input brownout protection with hysteresis, sense pin short-circuit protection, and V DD over-voltage protection. For over- temperature protection, an ex ternal NTC thermistor can be applied to sense the external switcher’s temperature. When VDD OVP or OTP are activated, an internal latch circuit is used to latch-off the controller. The Latch Mode is reset when the VDD supply is removed. FAN6754WA is available in an 8-pin SOP package.
Ordering Information
Temperature Range Package Packing Method FAN6754WAMRMY -40 to +105°C 8-Pin, Small Outline Package (SOP) Tape & Reel FAN6754WAMLMY
Figure 3. Top Mark Figure 4. Pin Configuration (Top View) placed between VDD and GND is recommended.
- FAN6754WA performs open-loop protection (OLP); if the FB voltage is higher than a threshold
voltage (around 4.6 V) for more than 56 ms, the controller latches off the PWM.
3 NC No Connection
cycle-by-cycle current limiting to achieve constant output power limiting with universal input. Over-Temperature Protection. An external NTC thermistor is connected from this pin to GND. the RT pin to the GND pin. This pin is limited by an internal clamping circuit.
7 VDD
Supply Voltage. IC operating current and MOSFET drivin g current are supplied using this pin. turn-on and turn-off are 17 V and 10 V, respectively. The operating current is lower than 2 mA.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6754WA • Rev. 1.0.6 4 FAN6754WA — Highly Integrated Green-Mode PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dam age the device. The device may not function or be operable above the recommended operating conditions and stressi ng the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VVDD DC Supply Voltage (1,2) 30 V VFB FB Pin Input Voltage -0.3 7.0 V VSENSE SENSE Pin Input Voltage -0.3 7.0 V VRT RT Pin Input Voltage -0.3 7.0 V VHV HV Pin Input Voltage 500 V PD Power Dissipation (TA＜50°C) 400 mW JA Thermal Resistance (Junction-to-Air) 150 C/W TJ Operating Junction Temperature -40 +125 C TSTG Storage Temperature Range -55 +150 C TL Lead Temperature (Wave Soldering or IR, 10 Seconds) +260 C ESD Electrostatic Discharge Capability, All Pins Except HV Pin Human Body Model; JESD22-A114 5000 V Charged Device Model; JESD22-C101 2000 Notes: 1. All voltage values, except differential voltages, ar e given with respect to the network ground terminal. 2. Stresses beyond those listed under Absolute Maximu m Ratings may cause permanent damage to the device. 3. ESD with HV pin: CDM=1250 V and HBM=500 V. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ens ure optimal performance to the datasheet specificatio ns. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Typ. Max. Unit RHV HV Startup Resistor 150 200 250 k
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6754WA • Rev. 1.0.6 5 FAN6754WA — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15 V and TA=25C unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit VDD Section VOP Continuously Operating Voltage 24 V VDD-ON Start Threshold Voltage 16 17 18 V VDD-OFF Minimum Operating Voltage 9 10 11 V VDD-OLP I DD-OLP Off Voltage 5.5 6.5 7.5 V VDD-LH Threshold Voltage on VDD Pin for Latch-Off Release Voltage 3.5 4.0 4.5 V VDD-AC Threshold Voltage on VDD Pin for Disable AC Recovery to Avoid Startup Failed VDD-OFF +2.8 VDD-OFF +3.3 VDD-OFF +3.8 V IDD-ST Startup Current V DD-ON – 0.16 V 30 µA IDD-OP1 Operating Supply Current, PWM Operation VDD=20 V, FB=3 V Gate Open 1.5 2.0 mA IDD-OP2 Operating Supply Current, Gate Stop VDD=20 V, FB=3 V 1.0 1.5 mA ILH Operating Current at PWM-Off Phase Under Latch-Off Conduction VDD=5 V 30 60 90 µA IDD-OLP Internal Sink Current Under Latch- Off Conduction VDD-OLP+0.1 V 170 200 230 µA VDD-OVP V DD Over-Voltage Protection 24 25 26 V tD-VDDOVP VDD Over-Voltage Protection Debounce Time 75 165 255 µs HV Section IHV Supply Current from HV Pin VAC=90 V(VDC=120 V), VDD=0 V 2.0 3.5 5.0 mA IHV-LC Leakage Current after Startup HV=700 V, VDD=VDD- OFF+1 V 1 20 µA VAC-OFF Brown-out Threshold DC Source Series R=200 k to HV Pin See Equation 1 92 102 112 V VAC-ON Brown-in Threshold DC Source Series R=200 kΩ to HV Pin See Equation 2 104 114 124 V VAC VAC-ON - VAC-OFF DC Source Series R=200 kΩ to HV Pin 6 12 18 V tS-CYCLE Line Voltage Sample Cycle FB > VFB-N 220 µs FB < VFB-G 650 tH-TIME Line Voltage Hold Period 20 µs tD-AC-OFF PWM Turn-off Debounce Time FB > VFB-N 65 75 85 ms FB < VFB-G 180 235 290 ms Continued on the following page…
VDD=15 V and TA=25C unless otherwise noted. Figure 8. V
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6754WA • Rev. 1.0.6 8 FAN6754WA — Highly Integrated Green-Mode PWM Controller Electrical Characteristics (Continued) VDD=15 V and TA=25C unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Units Current-Sense Section tPD Delay to Output 100 250 ns tLEB Leading-Edge Blanking Time 230 280 330 ns VLimit-L Current Limit at Low Line (V AC=86 V) VDC=122 V, Series R=200 k to HV 0.43 0.46 0.49 V VLimit-H Current Limit at High Line (V AC=259 V) VDC=366 V, Series R=200 kΩ to HV 0.36 0.39 0.42 V VSSCP Threshold Voltage for Sense Short-Circu it Protection 0.03 0.05 0.07 V tON-SSCP On Time for V SSCP Checking 4.0 4.4 4.8 µs tD-SSCP Delay for Sense Short-Circuit Protection VSENSE<0.05 V 60 120 180 µs tSS Soft-Start Time Startup Time 7 8 9 ms GATE Section DCYMAX Maximum Duty Cycle 86 89 92 % VGATE-L Gate Low Voltage VDD=15 V, IO=50 mA 1.5 V VGATE-H Gate High Voltage VDD=12 V, IO=50 mA 8 V IGATE-SINK Gate Sink Current (4) VDD=15 V 300 mA IGATE- SOURCE Gate Source Current(4) VDD=15 V, GATE=6 V 250 mA tr Gate Rising Time V DD=15 V, CL=1 nF 100 ns tf Gate Falling Time V DD=15 V, CL=1 nF 50 ns VGATE- CLAMP Gate Output Clamping Voltage V DD=22 V 9 13 17 V RT Section IRT Output Current from RT Pin 92 100 108 µA VRTTH1 Over-Temperature Protection Threshold Voltage 0.7 V ＜ VRT ＜ 1.05 V, after 12 ms Latch Off 1.000 1.035 1.070 V VRTTH2 VRT ＜ 0.7 V, After 100 µs Latch Off 0.65 0.70 0.75 tD-OTP1 Over-Temperature Latch-Off Debounce VRTTH2 ＜ VRT ＜ VRTTH1 FB > VFB-N 14 16 18 ms VRTTH2 ＜ VRT ＜ VRTTH1 FB < VFB-G 40 51 62 tD-OTP2 VRT< VRTTH2, FB > VFB-N 110 185 260 µs VRT< VRTTH2, FB < VFB-G 320 605 890 Note: 4. Guaranteed by design.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6754WA • Rev. 1.0.6 11 FAN6754WA — Highly Integrated Green-Mode PWM Controller Functional Description Startup Current For startup, the HV pin is connected to the line input through an external diode and resistor; R HV, (1N4007 / 200 kΩ recommended). Peak startup current drawn from the HV pin is (VAC× 2 ) / RHV and charges the hold- up capacitor through the diode and resistor. When the VDD capacitor level reaches V DD-ON, the startup current switches off. At this moment, the V DD capacitor only supplies the FAN6754WA to keep the V DD until the auxiliary winding of the ma in transformer provides the operating current. Operating Current Operating current is around 1.5 mA. The low operating current enables better efficiency and reduces the requirement of VDD hold-up capacitance. Green-Mode Operation The proprietary Green-Mode function provides off-time modulation to reduce the switching frequency in light- load and no-load conditions. V FB, which is derived from the voltage feedback loop, is taken as the reference. Once VFB is lower than the threshold voltage (V FB-N), the switching frequency is continuously decreased to the minimum Green-Mode frequency of around 22 kHz. Current Sensing / PWM Current Limiting Peak-current-mode control is utilized to regulate output voltage and provide pulse-by-pulse current limiting. The switch current is detected by a sense resistor into the SENSE pin. The PWM duty cycle is determined by this current-sense signal and V FB, the feedback voltage. When the voltage on the SENSE pin reaches around VCOMP = (VFB–0.6)/4, the switch cycle is terminated immediately. V COMP is internally clamped to a variable voltage around 0.46 V for low-line output power limit. Leading-Edge Blanking (LEB) Each time the power MOSFET is switched on, a turn-on spike occurs on the sense-re sistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled and cannot switch off the gate driver. Under-Voltage Lockout (UVLO) The turn-on and turn-off thresholds are fixed internally at 17V and 10V, respectively. During startup, the hold-up capacitor must be charged to 17 V through the startup resistor to enable the IC. The hold-up capacitor continues to supply V DD until the energy can be delivered from auxiliary winding of the main transformer. VDD must not drop below 10 V during startup. This UVLO hysteresis window ensures that hold-up capacitor is adequate to supply VDD during startup. Gate Output / Soft Driving The BiCMOS output stage is a fast totem-pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal
13 V Zener diode to protect power MOSFET transistors
against undesirable gate over voltage. A soft driving waveform is implemented to minimize EMI. Soft-Start For many applications, it is necessary to minimize the inrush current at star tup. The built-in 8ms soft-start circuit significantly reduces the startup current spike and output voltage overshoot. Slope Compensation The sensed voltage across the current-sense resistor is used for peak-current-mode control and cycle-by-cycle current limiting. Built-in slope compensation improves stability and prevents sub-harmonic oscillation. FAN6754WA inserts a synchronized, positive-going, ramp at every switching cycle. Constant Output Power Limit When the SENSE voltage across sense resistor R SENSE reaches the threshold voltage, around 0.46 V for low- line condition, the output GATE drive is turned off after a small delay, t PD. This delay introduces an additional current proportional to t PD • VIN / L P. Since the delay is nearly constant, regardless of the input voltage V IN, higher input voltage results in larger additional power. Therefore, the maximum out put power at high line is higher than that of low line. To compensate this variation for a wide AC input range, a power-limiter is controlled by the HV pin to solve the unequal power-limit problem. The power limiter is fed to the inverting input of the current limiting comparator. This results in a lower current limit at high-line inputs than at low-line inputs. Brownout and Constant Power Limited by the HV Pin Unlike previous PWM controllers, the FAN6754WA HV pin can detect the AC line voltage to perform brownout protection and line compensation for power limit. Using a fast diode and startup resi stor to sample the AC line voltage, the peak value refr eshes and is stored in a register at each sampling cycle. When internal update time is met, this peak value is used for brownout and current-limit level judgment. Equation (1) and (2) calculate the level of brown-in or brownout converted to RMS value. For power saving, FAN6754WA enlarges the sampling cycle to lower the power loss from HV sampling at light-load condition. 2 / ) 1.6 1.6) (R 0.9V ( (RMS) V HV ON- AC (1) 2 / ) 1.6 1.6) (R 0.81V ( (RMS) V HV OFF- AC (2) where RHV is in k.
Figure 25. Linearly Current Limit Curve (around 0.05 V/120 µs) on the SENSE pin is detected. overheating due to overloading conditions. power MOS gate resistance improve performance.
Figure 26. 8-Pin, Small Outline Package (SOP) Package specifically the warranty therein, which covers Fairchild products. http://www.fairchildsemi.com/packaging/. B) ALL DIMENSIONS ARE IN MILLIMETERS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
1.75 MAX
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6754WA • Rev. 1.0.6 14 FAN6754WA— Highly Integrated Green-Mode PWM Controller
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