FAN6300A FAIRCHILD | Alldatasheet
Document overview
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Technical content
Features
High-Voltage Startup Quasi-Resonant Operation Cycle-by-Cycle Current Limiting Peak-Current-Mode Control Leading-Edge Blanking (LEB) Internal Minimum tOFF Internal 5ms Soft-Start Over Power Compensation GATE Output Maximum Voltage Auto-Recovery Over-Current Protection(FB Pin) Auto-Recovery Open-Loop Protection(FB Pin) VDD Pin and Output Voltage (DET Pin) OVP Latched Low Frequency Operation (below 100kHz) for FAN6300A High Frequency Operation (up to 190kHz) for FAN6300H
Applications
AC/DC NB Adapters Open-Frame SMPS
Description
The highly integrated FAN6300A/H of PWM controller provides several features to enhance the performance of flyback converters. FAN6300A is applied on quasi- resonant flyback converters where maximum operating frequency is below 100kHz. FAN6300H is suitable for high-frequency operation (up to 190kHz). A built-in HV startup circuit can provide more startup current to reduce the startup time of the controller. Once the V DD voltage exceeds the turn-on threshold voltage, the HV startup function is disabled immediately to reduce power consumption. An internal valley voltage detector ensures power system operates at quasi-resonant operation over a wide-range of line voltage and any load conditions, as well as reducing switching loss to minimize switching voltage on drain of power MOSFET. To minimize standby power consumption and light-load efficiency, a proprietary green-mode function provides off-time modulation to decrease switching frequency and perform extended valley voltage switching to keep to a minimum switching voltage. The operating frequency is limited by minimum t off time, which is 38µs to 8µs in FAN6300A and 13µs to 3µs in FAN6300H, so FAN6300H can operate at higher switching frequency than FAN6300A. FAN6300A/H controller also provides many protection functions. Pulse-by-pulse cu rrent limiting ensures the fixed-peak current limit level, even when a short circuit occurs. Once an open-circuit failure occurs in the feedback loop, the internal protection circuit disables PWM output immediately. As long as V DD drops below the turn-off threshold voltage, the controller also disables PWM output. The gate output is clamped at 18V to protect the power MO S from high gate-source voltage conditions. The minimum t OFF time limit prevents the system frequency from being too high. If the DET pin triggers OVP, internal OTP is triggered and the power system enters la tch-mode until AC power is removed. The FAN6300A/H controller is available in the 8-pin Small Outline Package (SOP) and the Dual Inline Package (DIP).
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300A(H) Rev. 1.0.1 2 FAN6300A/H — Highly-Integrated Quasi-Resonant Current Mode PWM Controller
Ordering Information
Part Number Eco Status Operating Temperature Range Package Packing Method FAN6300AMY Green -40°C to +125°C 8-Lead, Sm all Outline Package (SOP) Tape & Reel FAN6300HMY Green -40°C to +125°C 8-Lead, Sm all Outline Package (SOP) Tape & Reel FAN6300ANY Green -40°C to +125°C 8-Lead, Dual In-line Package (DIP) Tube FAN6300HNY Green -40°C to +125°C 8-Lead, Dual In-line Package (DIP) Tube For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html Application Diagram Figure 1. Typical Application
16 V/10 V/8V
Figure 2. Functional Block Diagram Figure 3. Marking Diagram
Figure 4. Pin Configuration
1 DET
- Generates a ZCD signal once the secondary-side switching current falls to zero.
and minimize the switching losses. error-amplifier is equipped at the secondary-side of the power converter. for feedback-loop compensation. (around 4.2V) more than 55ms. and the resulting voltage is applied to this pin for the cycle-by-cycle current limit. clamped gate output voltage is 18V. 6 VDD Power supply. The threshold voltages for startup and turn-off are 16V and 10V, respectively. The startup current is less than 20µA and the operating current is lower than 4.5mA.
7 NC No connect
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300A / FAN6300H • Rev. 1.0.1 5 FAN6300A/H — Highly Integrated Quasi-Resonant Current Mode PWM Controller Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VDD DC Supply Voltage 30 V VHV HV 500 V VH GATE -0.3 25.0 V VL V FB, VCS, VDET -0.3 7.0 V PD Power Dissipation SOP-8 400 mW DIP-8 800 TJ Operating Junction Temperature +150 °C TSTG Storage Temperature Range -55 +150 °C TL Lead Temperature (Soldering 10 Seconds) +270 °C ESD Human Body Model, JEDEC:JESD22-A114 3.0 KV Charged Device Model, JEDEC:JESD22-C101 1.5 Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. 2. All voltage values, except differential volt ages, are given with respect to GND pin. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Conditions Min. Typ. Max. Unit TA Operating Ambient Temperature -40 +125 °C
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300A / FAN6300H • Rev. 1.0.1 6 FAN6300A/H — Highly Integrated Quasi-Resonant Current Mode PWM Controller
Electrical Characteristics
Unless otherwise specified, VDD=10~25V, TA=-40°C~125°C (TA=TJ). Symbol Parameter Conditions Min. Typ. Max. Unit VDD Section VOP Continuously Operating Voltage 25 V VDD-ON Turn-On Threshold Voltage 15 16 17 V VDD-PWM-OFF PWM Off Threshold Voltage 9 10 11 V VDD-OFF Turn-Off Threshold Voltage 7 8 9 V IDD-ST Startup Current VDD=VDD-ON -0.16V GATE Open 10 20 µA IDD-OP Operating Current VDD=15V, fS=60KHz, CL=2nF 4.5 5.5 mA IDD-GREEN Green-Mode Operating Supply Current (Average) VDD=15V, fS=2KHz, CL=2nF 3.5 mA IDD-PWM-OFF Operating Current at PWM-Off Phase VDD=VDD-PWM-OFF- 0.5V 70 80 90 µA VDD-OVP V DD Over-Voltage Protection (Latch-Off) 26 27 28 V tVDD-OVP V DD OVP Debounce Time 100 150 200 µs IDD-LATCH V DD OVP Latch-Up Holding Current V DD=5V 42 µA HV Startup Current Source Section VHV-MIN Minimum Startup Voltage on Pin HV 50 V IHV Supply Current Drawn from Pin HV VAC=90V(VDC=120V) VDD=0V 1.5 4.0 mA IHV-LC Leakage Current After Startup HV=500V, VDD=VDD-OFF +1V 1 20 µA Feedback Input Section AV Input-Voltage to Current Sense Attenuation AV =ΔVCS/ΔVFB ZFB Input Impedance 3 5 7 K Ω IOZ Bias Current FB=V OZ 1.2 2 mA VOZ Zero Duty-Cycle Input Voltage 0.8 1.0 1.2 V VFB-OLP Open Loop Protection Threshold Voltage 3.9 4.2 4.5 V tD-OLP Debounce Time for Open-Loop/Overload Protection 46 52 62 ms tSS Internal Soft-Start Time 5 ms Continued on the following page...
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300A / FAN6300H • Rev. 1.0.1 7 FAN6300A/H — Highly Integrated Quasi-Resonant Current Mode PWM Controller Electrical Characteristics (Continued) Unless otherwise specified, VDD=10~25V, TA=-40°C ~125°C (TA=TJ). Symbol Parameter Conditions Min. Typ. Max. Unit DET Pin OVP and Valley Detection Section VDET-OVP Comparator Reference Voltage 2.45 2.50 2.55 V Av Open-Loop Gain (3) 60 dB Bw Gain Bandwidth (3) 1 MHz VV-HIGH Output High Voltage 4.5 V VV-LOW Output Low Voltage 0.5 V tDET-OVP Output OVP (Latched) Debounce Time 100 150 200 µs IDET-SOURCE Maximum Source Current V DET=0V 1 mA VDET-HIGH Upper Clamp Voltage I DET=-1mA 5 V VDET-LOW Lower Clamp Voltage I DET=1mA 0.1 0.3 V tVALLEY-DELAY Delay Time from Valley-Signal Detected to Output Turn-On(3) 200 ns tOFF-BNK Leading-Edge-Blanking Time for DET when PWM MOS Turns Off(3) FAN6300A 4.0 µs FAN6300H 1.5 tTIME-OUT Time-Out after t OFF-MIN FAN6300A 9 µs FAN6300H 5 Oscillator Section tON-MAX Maximum On-Time 38 45 54 µs tOFF-MIN Minimum Off-Time VFB≧VN, FAN6300A 8 µs VFB≧VN FAN6300H 3 µs VFB=VG FAN6300A 38 µs VFB=VG FAN6300H 13 µs VN Beginning of Green-On Mode at FB Voltage Level 1.95 2.10 2.25 V VG Beginning of Green-Off Mode at FB Voltage Level 1.0 1.2 1.4 V ΔVFBG Green-Off Mode VFB Hysteresis Voltage 0.05 0.10 0.20 V tSTARTER Start Timer (Time-Out Timer) VFB<VG 1.8 2.1 2.4 ms VFB>VFB-OLP 25 30 45 µs Output Section VOL Output Voltage Low VDD=15V, IO=150mA 1.5 V VOH Output Voltage High VDD=12V, IO=150mA 7.5 V tR Rising Time 145 200 ns tF Falling Time 55 120 ns VCLAMP Gate Output Clamping Voltage 16.7 18.0 19.3 V Continued on following page…
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300A / FAN6300H • Rev. 1.0.1 8 FAN6300A/H — Highly Integrated Quasi-Resonant Current Mode PWM Controller Electrical Characteristics(Continued) Unless otherwise specified, VDD=10~25V, TA=-40°C ~125°C (TA=TJ). Symbol Parameter Conditions Min. Typ. Max. Unit Current Sense Section tPD Delay to Output 20 150 200 ns VLIMIT Limit Voltage on CS Pin for Over-Power Compensation IDET < 74.41µA 0.82 0.85 0.88 V IDET=550µA 0.380 0.415 0.450 V VSLOPE Slope Compensation (3) tON=45µs 0.3 V tON=0µs 0.1 V tBNK Leading-Edge-Blanking Time (MOS Turns ON) 525 625 725 ns VCS-H VCS Clamped High Voltage once CS Pin Floating CS Pin Floating 4.5 5.0 V tCS-H Delay Time once CS Pin Floating CS Pin Floating 150 µs Internal Over-Temperature Protection Section TOTP Internal Threshold Temperature for OTP (3) +140 °C TOTP-HYST Hysteresis Temperature for Internal OTP (3) +15 °C Note: 3. Guaranteed by design.
B) ALL DIMENSIONS ARE IN MILLIMETERS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
1.75 MAX
Figure 24. 8-Pin Small Outline Package (SOP) the warranty therein, which covers Fairchild products.
5.08 MAX
0.33 MIN
B) ALL DIMENSIONS ARE IN MILLIMETERS. MOLD FLASH, AND TIE BAR EXTRUSIONS. E) DRAWING FILENAME AND REVSION: MKT-N08FREV2. Figure 25. 8-Pin Dual Inline Package (DIP) the warranty therein, which covers Fairchild products.
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6300A / FAN6300H • Rev. 1.0.1 15 FAN6300A/H — Highly Integrated Quasi-Resonant Current Mode PWM Controller