FAN6224

FAN6224 ONSEMI | Alldatasheet

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© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6224 • Rev. 1.4 FAN6224 — Synchronous Rectification Controller for Flyback and Forward Freewheeling Rectification FAN6224 Synchronous Rectification Controller for Flyback and Forward Freewheeling Rectification

Features

 mWSaver™ Technology: - Internal Green Mode to Stop SR Switching for Lower No-Load Power Consumption - 300 A Ultra-Low Green Mode Operating Current  Synchronous Rectification Controller  Suited for High-Side and Low-Side of Flyback Converters in QR, DCM, and CCM Operation  Suited for Forward Freewheeling Rectification  PWM Frequency Tracking with Secondary-Side Winding Voltage Detection  140 kHz Maximum Operation Frequency  VDD Pin Over-Voltage Protection (OVP)  LPC Pin Open/Short Protection  RES Pin Open/Short Protection  RP Pin Open/Short Protection  Internal Over-Temperature Protection (OTP)  SOP-8 Package Available

Applications

 AC-DC NB Adapters  Open-Frame SMPS

Description

FAN6224 is a secondary-side Synchronous Rectification (SR) controller to drive SR MOSFET for improv ed efficiency. The IC is suitable for flyback converters and forward freewheeling rectification. FAN6224 can be applied i n Continuous or Discontinuous Conduction Mode (CCM and DCM) and Quasi-Resonant (QR) flyback converters based on a proprietary linear-predict timing-control technique . The benefits of this technique include a simple control method without current-sense circuitry to accomplish noise immunity. With PWM frequency tracking and secondary-side winding voltage detection, FAN6224 can operate in both fixed- and variable-frequency systems up to 140kHz. FAN6224 detects output load condition and determines adjustable loading levels for Green Mode. In Green Mode, the SR controller stops all SR switching operation to reduce the operating current. Power consumption is maintained at a minimum level in light-load condition.

Ordering Information

Temperature Range Package Packing Method FAN6224M -40°C to +105°C 8-Lead, Small Outline Package (SOP-8) Tape & Reel

Figure 4. Block Diagram

Figure 5. Top Mark Figure 6. Pin Configuration the range of operating frequency is programmable by the capacitor. 3 GATE Driver Output. The totem-pole output driver for driving the power MOSFET. 4 GND Ground. MOSFET source connection.

7 RES

© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6224 • Rev. 1.4 5 FAN6224 — Synchronous Rectification Controller for Flyback and Forward Freewheeling Rectification Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dama ge the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VDD DC Supply Voltage 30 V VLPC Voltage on LPC Pin (TA=25°C) -0.3 7.0 V VRES Voltage on RES Pin (Continuously in -0.5 V) (TA=25°C) -1.5 7.0 V VRP Voltage on RP Pin (TA=25°C) -0.3 7.0 V PD Power Dissipation (TA=25°C) 0.8 W ΘJA Thermal Resistance (Junction-to-Air) 151 °C/W ΘJC Thermal Resistance (Junction-to-Case) 58 °C/W TSTG Storage Temperature Range -55 150 °C TL Lead Temperature (Soldering) 10s 260 °C ESD Electrostatic Discharge Capability Human Body Model, JESD22-A114 5500 V Charged Device Model, JESD22-C101 2000 Notes: 1. Stresses beyond those listed under Absolute Maximum Ratin gs may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with res pect to GND pin. Recommended Operating Conditions The Recommended Operating Conditions table defines the condi tions for actual device operation. Recommended operating conditions are specified to ensure optimal perfo rmance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Condition Min. Max. Unit VLPC Voltage on LPC Pin Continuous Operation 4.8 V VRES Voltage on RES Pin 4.8 V VRP Voltage on RP Pin 0.5 2.5 V

© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6224 • Rev. 1.4 6 FAN6224 — Synchronous Rectification Controller for Flyback and Forward Freewheeling Rectification

Electrical Characteristics

VDD=15 V and TA=25°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit VOP Continuously Operating Voltage VDD-OFF VDD-OVP V VDD-ON Turn-On Threshold Voltage 9.5 10.5 11.5 V VDD-OFF Turn-Off Threshold Voltage 9.1 10.1 11.1 V VDD-HYST Hysteresis Voltage for Turn-On / Turn-Off Threshold 0.1 0.7 V IDD-OP Operating Current VDD=15 V, LPC=65 kHz, CL=6000 pF 7 8 mA IDD-GREEN Operating Current in Green Mode VDD=15 V 300 400 µA VDD-OVP VDD Over-Voltage Protection 26.0 27.5 29.0 V VDD-OVP-HYST Hysteresis Voltage for VDD OVP 1.1 1.5 1.9 V tVDD-OVP VDD OVP Debounce Time(3) 100 µs Output Driver for internal SR Mosfet Section VZ Output Voltage Maximum (Clamp) 10 12 14 V VOL Output Voltage LOW VDD=12 V, IO=50 mA 0.5 V VOH Output Voltage HIGH VDD=12 V, IO=50 mA 9 V tR Rising Time VDD=12 V, CL=6 nF, GATE=2 V~9 V 30 70 120 ns tF Falling Time VDD=12 V, CL=6 nF, GATE=9 V~2 V 20 50 100 ns tPD_HIGH_LPC Propagation Delay to GATE HIGH (LPC Trigger) tR:0%~10%, VDD=12 V 150 250 ns tPD_LOW_LPC Propagation Delay to GATE LOW (LPC Trigger(3) tF:100%~90%,VDD=12 V 150 ns tMAX-PERIOD Limitation between LPC Rising Edge to Gate Falling Edge fs=65 kHz 24.0 29.5 35.0 µs fs=140 kHz 12.5 15.5 18.5 LPC Section tBNK Blanking Time for Charging CT (3) 150 ns tLPC-SMP LPC Sampling Timing of Previous Cycle fs=65 kHz, RRP=75 k~200 k, CRP=100 nF 0.9 1.1 1.3 µs fs=140 kHz, RRP=75 k~200 k, CRP=1 nF 0.5 0.6 0.7 µs VLPC-SOURCE Lower Clamp Voltage Source ILPC=10 µA 0 0.1 0.2 V VLPC-HIGH-EN Threshold Voltage for LPC to Enable SR VLPC-HIGH>VLPC-HIGH-EN, SR Enable 1.38 1.45 1.54 V VEN-CLAMP SR Enable Threshold Clamp Voltage(3) VLPC-EN=2.5 V at VLPC-HIGH >3 V 2.5 V VLPC-TH-HIGH Threshold Voltage on LPC Rising Edge(3) 1.22 V VLPC-CLAMP-H VLPC High Clamping Voltage VLPC>VLPC-CLAMP-H 5.7 6.2 6.7 V VLPC-DIS Threshold Voltage of VLPC to Disable SR Gate Switching VLPC>VLPC-DIS 4.8 5.5 V tLPC-EN-RES No LPC Signal, Reset VLPC-EN (3) 95 s Continued on the following page…

© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6224 • Rev. 1.4 7 FAN6224 — Synchronous Rectification Controller for Flyback and Forward Freewheeling Rectification Electrical Characteristics (Continued) VDD=15 V and TA=25°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit RES Section tRES-SMP VRES Sampling Time(3) tSR_gate=5 µs 2.5 µs VRES-EN Threshold Voltage of VRES to Enable SR Gate Switching VRES>VRES-EN 1.3 1.6 2.0 V VRES-CLAMP-H VRES High Clamping Voltage VRES>VRES-CLAMP-H 5.7 6.2 6.7 V KRES-DROP VRES Drop Protection Ratio(3) VRES[n+1]<VRES[n] x KRES-DROP 85 % VRES-SOURCE VRES Low Clamping Voltage IRES=10 µA, VDD=15 V 0 0.2 0.4 V Linear Prediction Section RatioLPC Transfer Ratio of VLPC to ILPC (3) 1 µA/V RatioRES Transfer Ratio of VRES to IRES (3) 0.256 µA/V RatioLPC-RES RatioLPC/RatioRES VRES=3 V,VLPC=3 V CRP=100 nF 3.65 3.90 4.15 tLPC-EN Debounce Time for VLPC>VLPC- EN=0.875 x VLPC-HIGH fs=65 kHz, RRP=75 k~200 k, CRP=100 nF 0.9 1.1 1.3 µs fs=140 kHz, RRP=75 k~200 k, CRP=1 nF 0.5 0.6 0.7 RatioSR-LMT Maximum Ratio of SR Gate On Time(3) RatioSR-LMT < tON-SR[n+1]/ tON-SR[n] 120 % tLPC-EXP-LMT LPC Pulse Width Expansion Limit tLPC-EXP-LMT < tLPC[n+1]- tLPC[n] 0.5 0.7 0.9 µs tLPC-SRK-LMT LPC Pulse Width Shrink Limit tLPC-SRK-LMT < tLPC[n]- tLPC[n+1] 0.6 0.8 1.0 µs Green Mode Section tGREEN-OFF SR Gate On Time to Exit Green Mode RRP=200 k, CRP=100 nF 5.5 5.9 6.3 µs RRP=75 k,CRP=1 nF 3.0 3.3 3.6 tGREEN-ON SR Gate On time to Enter Green Mode RRP=200 k, CRP=100 nF 4.0 4.4 4.8 µs RRP=75 k,CRP=1 nF 1.6 1.9 2.2 tGREEN- HYST(65kHz) Hysteresis Voltage for tGREEN- On/tGREEN-Off Threshold(3) RRP=200 k, CRP=100 nF 1.5 µs tGREEN- HYST(140kHz) Hysteresis Voltage for tGREEN- On/tGREEN-Off Threshold(3) RRP=75 k,CRP=1 nF 1.4 µs nGREEN-OFF Number of Switching Cycles to Exit Green Mode(3) SR Gate On Time > tGREEN-OFF 15 times nGREEN-ON Number of Switching Cycles to Enter Green Mode(3) SR Gate On Time < tGREEN-ON 3 times VRP-OPEN Threshold Voltage for RP Pin Pull High Protection 3.0 3.5 4.0 V VRP-SHORT Threshold Voltage for RP Pin Pull Low Protection 0.30 0.35 0.40 V tGREEN-ENTER No Gate Signal to Enter Green Mode(3) 75 s Continued on the following page…

© 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6224 • Rev. 1.4 8 FAN6224 — Synchronous Rectification Controller for Flyback and Forward Freewheeling Rectification VDD=15 V and TA=25℃, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Unit Operation Frequency Setting Section VCRP-TH Threshold Voltage for High / Low Frequency Determination(3) Set VRP> VCRP-th for Higher Operating Frequency 0.35 V tCRP-TH Debounce Time for High / Low Frequency Determination(3) 170 µs IRP-SOURCE RP Pin Source Current 8.5 9.5 10.5 µA Casual Function Section tDEAD-CAUSAL SR Turn-Off Dead Time by Causal Function fS=65 kHz, (RRP=75 k~200 k, CRP=100 nF) 480 680 880 ns fS=140 kHz, (RRP=75 k~200 k, CRP=1 nF) 350 500 650 ns tCAUSAL-FAULT If tS-PWM(n+1) > tCAUSALx tS-PWM(n), SR Stops Switching & Enters Green Mode fS=65 kHz to 140 kHz 130 150 170 % tCAUSAL_LEAVE (Assume SR Triggers Fault Causal Protection) If LPC Rises Twice during tCAUSAL_LEAVE and Previous On-Time of VLPC-HIGH is Longer than tLPC-EN, then SR Leaves Fault Causal Protection(3) 5.3 µs tDEAD-CFR Once CFR is Triggered, SR Terminates & Forces SR to Enter Green Mode (The Last Time from SR Gate Falling to LPC Rising)(3) Causal Function Regulator (CFR) 70 ns Internal Over-Temperature Protection for OTP TOTP Internal Threshold Temperature for OTP(3) 140 °C TOTP-HYST Hysteresis Temperature for Internal OTP(3) 20 °C Note: 3. Guaranteed by Design

Figure 25. Waveforms of Linear-Predict Timing Control in CCM and DCM / QR Flyback

Figure 26. Waveforms of Linear-Predict Timing Control in CCM and DCM / QR Flyback for (N1) to secondary windings (N2). linear-predict timing control. to zero, the SR controller turns off the SR MOSFET.

Figure 27. Simplified Linear-Predict Block same as inductor current discharge time (t L.DIS).

are shown as right side of Figure 25 and Figure 26 . of the SR MOSFET is naturally turned off. normal operation, as shown in Figure 29. exiting Green Mode is adjustable.

3 Times

Figure 28. Entering Green Mode

15 Times

Figure 29. Resuming Normal Operation Figure 30. Adjustable tGREEN-ON and tGREEN-OFF

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