FAN4147 ONSEMI | Alldatasheet
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© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN4147 • Rev. 1.0.1 FAN4147 — Ground Fault Interrupter FAN4147 Ground Fault Interrupter
Features
For GFCI and RCD Applications Precision Sense Amplifier and Bandgap Reference Built-in AC Rectifier Built-in Noise Filter Low-Voltage SCR Disable Direct DC Coupled to Sense Coil SCR Gate Driver Adjustable Sensitivity 400A Quiescent Current Minimum External Components Meets UL 943 Requirements Ideal for 120V or 220V Systems Space Saving SuperSOT™ 6-Pin Package
Applications
GFCI Output Receptacles GFCI Circuit Breakers Portable GFCI Cords
Description
The FAN4147 is a low-power Ground Fault Interrupter (GFI) controller for detecting hazardous current paths to ground and ground- to-neutral faults. The FAN4147 application circuit opens the load contacts before a harmful shock occurs. Internally, the FAN4147 contains a diode rectifier, precision bandgap 12V shunt regulator, precision low- VOS offset-sense amplifier, time delay noise filter, window-detection comparators, and an SCR driver. With a minimum number of external components, t he FAN4147 detects and protects against a hot-wire-to- ground fault and a neutral-line-to-neutral-load short. The minimal components and the small SuperSOT ™ package allow for a small-form-factor, low-cost solution. The FAN4147 circuitry has a built-in rectifier and shunt regulator that operates with a low quiescent current. This allows for a high-value, low-wattage-series supply resistor. The internal temperature-compensated shunt regulator, sense amplifier, and bias circuitry provide for precision ground-fault detection. The low-VOS offset- sense amplifier allows direct coupling of the sense coil to the amplifier’s feedback signal. This eliminates the large 50/60Hz AC-coupling capacitor. The internal delay filter rejects high-frequency noise spikes common with inductive loads. This decreases false nuisance tripping. The internal SCR driver is temperature compensated and designed to satisfy the current requirements for a wide selection of external SCRs. The minimum number of external components and the 6-pin SuperSOT™ package enable a low-cost, compact design and layout.
Ordering Information
Temperature Range Package Packing Method FAN4147SX -35°C to +85°C 6-Lead SUPERSOT6, JEDEC M0-193, 1.6mm Tape and Reel
Figure 3. Pin Configuration
1 SCR Gate drive for external SCR
2 Neutral Supply input for FAN4147 circuitry
3 Line Supply input for FAN4147 circuitry
4 VREF Non-inverting input for current-sense amplifier
5 VFB Inverting input for current-sense amplifier
6 AmpOut An external resistor connected to the VFB pin sets the Ifault sensitivity threshold
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN4147 • Rev. 1.0.1 4 FAN4147 — Ground Fault Interrupter Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit ICC Continuous Supply Current, Line to Neutral 15 mA VCC Continuous Supply Voltage, Line to Neutral -1.2 16 V Continuous Voltage to Neutral, All Other Pins -0.8 15 V TSTG Storage Temperature Range -65 +150 °C ESD Electrostatic Discharge Protection Level Human Body Model, JESD22-A114 2.5 kV Charged Device Model, JESD22-C101 1.0 Machine Model, JESD22-A115 0.2 Recommended Operating Conditions The Recommended Operating Conditions define conditi ons for actual device operation. Recommended operat ing conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. (Unless otherwise specified, refer to figure 2.) Symbol Parameter Conditions Min. Typ. Max. Unit VREG Power Supply Shunt Regulator Voltage Line to Neutral 12.2 12.7 13.2 V Line to Neutral Ishunt=-2mA -0.9 -0.7 V IQ Quiescent Current Line to Neutral=10V 350 400 450 µA VREF Reference Voltage VREF to Neutral 5.8 6.0 6.2 V VTH Trip Threshold AmpOut to VREF 3.4 3.5 3.6 V VOS Amplifier Offset Gain=1000 -450 0 450 µV IOS Amplifier Input Offset(3) Design Value -50 0 50 nA G Amplifier DC Gain(3) Design Value 100 dB fGBW Amplifier Gain Bandwidth(3) Design Value 1.5 MHz VSW+ Amplifier Positive Voltage Swing AmpOut to VREF, IFAULT=10A 4.0 V VSW- Amplifier Negative Voltage Swing VREF to AmpOut, IFAULT=-10A 4.0 V ISINK Amplifier Current Sink AmpOut=VREF + 3V, VFB=VREF + 100mV 400 µA ISRL Amplifier Current Source AmpOut=VREF – 3V, VFB=VREF - 100mV 400 µA td Delay Filter Delay from C1 trip to SCR L->H 0.7 1.0 1.3 ms ROUT SCR Output Resistance SCR to Neutral=250mV, AmpOut=VREF 0.5 1.0 K VOUT SCR Output Voltage SCR to Neutral AmpOut=VREF 1 10 mV SCR to Neutral AmpOut=VREF +4V 2.5 V IOUT SCR Output Current SCR to Neutral=1V, AmpOut=VREF + 4V 350 500 µA Note: 3. Guaranteed by design ; not tested in production.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN4147 • Rev. 1.0.1 5 FAN4147 — Ground Fault Interrupter Functional Description (Refer to Figure 1 and Figure 2.) The FAN4147 is a GFCI controller for AC ground-fault circuit interrupters. The internal rectifier circuit is supplied from the AC line during the positive half cycle of the AC line voltage. The internal 12V shunt regulator uses a precision temperature-compensated bandgap reference. The combination of precision reference circuitry and precision sense amplifier provides for an accurate ground-fault tolerance. This allows for selection of external components with wider , lower-cost, parameter variations. Due to the low quiescent current , a high-value external series resistor (R1) can be used, which reduces the maximum power wattage required. The 12V shunt regulator generates the reference voltage for the sense amplifier’s (A1) non-inverting input (AC ground reference) and supplies the bias for the delay timer (T1), comparators (C1 & C2), and SCR driver. The secondary winding of the sense transformer is connected to pin 4 (VREF) and to a resistor R IN directly DC connected to the inverting input of the sense amplifier at pin 5 (VFB). The feedback resistor (R SET) converts the sense transformer’s secondary current to a voltage at pin 6 (AmpOut). This voltage is compared to the internal window comparator (C1 & C2) and, when the AmpOut voltage exceeds the +/-VTH threshold voltage, the window comparator triggers the internal delay timer. The output of the window comparator must stay HIGH for the duration of the t 1 timer. If the window comparator’s output goes LOW, the internal delay timer starts a reset cycle. If the window comparator’s output is still HIGH at the end of the t 1 pulse, the SCR driver enables the current source I 1 and disables Q 1. The current source I 1 then enables the external SCR, which energizes the solenoid, opens the contact switches to the load, and removes the hazardous ground fault. The window comparator allows for detection of a positive or negative IFAULT signal independent from the phase of the line voltage. The sense transformer typically has a toroidal core made of laminated steel rings or solid ferrite material. The secondary of the transformer is typically 800 to 1500 turns of #40 wire wound through the toroi d. The primary is typically one to two turns made by passing the AC hot and neutral wires through the center of the toroid. When a ground fault exists, a difference exists between the current flowing in hot and neutral wires. The primary difference current, divided by the primary- to-secondary turns ratio, is the current that flows through the secondary wire of the transformer. A grounded neutral condition occurs when the neutral- line is grounded at the neutral-load side. Depending on the resistance of the grounded neutral connection, this condition causes the sense coil to detect a lower ground fault current. The detection of a ground-to-load-neutral fault relies on the principle o f positive feedback. When this occurs, the sense and neutral coils are mutually coupled, which produces a positive feedback path around the sense amplifier. This positive feedback causes the sense amplifier to oscillate. When the peak oscillation voltage exceeds the SCR trigger threshold, the internal delay timer is enabled. Since the amplifier’s output signal is crossing the window comparator’s trip threshold typically at 6KHz, the delay timer alternates between detection of a fault/no fault. The ratio of the fault/no-fault detection time interval determines if the SCR driver is enabled. The sensitivity of the grounded neutral detection is changed by the neutral coil turns and C2, C3 values. RSET Resistor Calculation The AmpOut signal must exceed the window comparator’s VTH threshold voltage for longer than the delay timer. Therefore: VTH=IFAULT x 1.41 x RSET x COS(2 x (t/2P)) / N (1) RSET=(VTH x N) / (1.41 x IFAULT x COS( x t/P)) (2) where: VTH = 3.5V ; IFAULT = 5mA (UL943) ; t = 1ms (timer delay); P = Period of the AC Line (1/60Hz); N = Ratio of secondary to primary turns (1000:1); Note: 4. In practice, the transformer is non- ideal, so RSET may need to be adjusted by up to 30% to obtain the desired Ifault trip threshold. VOS Trip Threshold Error Calculation Since the sense coil is DC connected to the feedback of the sense amplifier, the V OS offset introduces an I fault threshold error. This error can be calculated as: %Error= 100 x (VOS x RSET) / (RIN + RLDC + RLAC) / VTH (3) where: VOS = +/-450V (worse case); = +/-150V (typical); RSET = 511K RIN = 470 (typical value); RLDC = 75 (sense coil secondary DC resistance); RLAC = 1.5K (AC(jL) impedance of sense coil) (L= 4H, f= 60Hz); VTH = 3.5V; %Error = +/- 3.2% (worst case); +/-1.1% (typical).
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MO-193. VAR. AA, ISSUE E. B) ALL DIMENSIONS ARE IN MILLIMETERS. C PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.25mm PER END. PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25mm PER SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS ARE DETERMINED AT DATUM H. D) DRAWING FILE NAME: MKT-MA06AREVF 1.00 0.70 0.10 0.00 SEATING PLANE
0.60 REF
0.55 0.35 SCALE: 50X DETAIL A SEE DETAIL A GAGE PLANE 0.25
1.10 MAX
0.20 0.08 0.950.95 3.00 2.80
0.70 MIN
LAND PATTERN RECOMMENDATION 3.00 2.60 0.50 0.30 1.90 0.95 1.70 1.50
1.00 MIN
2.60 SYMM CL (0.30) C A B C 0.20 M 0.10 A B H C C
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