FAN3180

FAN3180 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

 3.3-V, 15-mA Output  ±1% at 25°C, ±2.5% Total Variation Gate Driver  Peak 2.8-A Sink / 2.5-A Source at VDD = 12 V  Controlled Output Pulses at Startup and Shutdown  Non-Inverting Logic Configuration  TTL-Compatible Input Thresholds  23-ns Typical Delay Time  19-ns / 13-ns Rise and Fall Times with 1-nF Load General  -40°C to +125°C Operation Temperature  5-V to 18-V Operating Range  VON / VOFF UVLO of 4.75 V / 4.55 V  200-µA Maximum Standby Supply Current  Lead (Pb)-Free Green 5-Pin SOT23 Package

Applications

 Gate Drive with Power for the MCU  Switched-Mode Power Supplies, Consumer Electronics, Portable Hand Tools

Description

The FAN3180 combines a high -speed low -side gate driver with a 3.3 -V output Low Drop Out ( LDO) regulator. The gate driver is rated to 2.8-A peak current at V DD of 12 V and is designed to drive an N -channel enhancement-mode MOSFET in low -side switching applications. The FAN3180 also integrates a 3.3 -V, 15- mA LDO with tight voltage tolerance of ±1% at 25°C and ±2.5% of total variat ion for powering external microcontrollers. Internal circuitry provides an Under -Voltage Lockout (UVLO) function by holding the output low until the supply voltage is within the operating range and the first full input pulse is detect ed. The FAN3180 has UVLO thresholds of 4.75 -V V ON and 4.55 -V V OFF and a maximum standby supply current of 200 µA. The driver delivers fast MOSFET switching performance to maximize efficiency in high -frequency power converter de signs. It incorporates the MillerDrive™ architecture for the final output driver stage. This bipolar-MOSFET combination provides high peak current during the Miller plateau stage of the MOSFET turn-on / turn -off process to minimize switching loss, while providing rail -to-rail voltag e swing and reverse - current capability. Thermal shutdown function is included as an additional safety feature. 3V3 VDD MCU PWM Input Load UVLO LDO OUT IN+ GND VDD Figure 1. Typical Application

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3180 • Rev. 1.0.3 2 FAN3180 — Single 2-A Low-Side Driver with 3.3-V LDO

Ordering Information

Threshold UVLO (VON / VOFF) Package Packing Method Reel Quantity FAN3180TSX TTL 4.75 V / 4.55 V 5-Pin SOT23 Tape & Reel 3000 Functional Pin Configuration IN+ VDD OUT GND 3V3 UVLO LDO Figure 2. Top View

1. Estimates derived from thermal simulation; actual values depend on the application.
2. Theta_JL (JL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads

(including any thermal pad) that are typically soldered to a PCB.

1. Theta_JT (JT): Thermal resistance between the semiconductor junction and the top surface of the package,

assuming it is held at a uniform temperature by a top-side heat sink.

1. Theta_JA (ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking,

JEDEC standards JESD51-2, JESD51-5, and JESD51-7, as appropriate.

1. Psi_JB (JB): Thermal characterization parameter providing correlation between semiconductor junction

the SOT23-5 package, the board reference is defined as the PCB copper adjacent to pin 2.

1. Psi_JT (JT): Thermal characterization parameter providing correlation between the semiconductor junction

temperature and the center of the top of the package for the thermal environment defined in Note 4. 1 VDD Supply Voltage. Provides power to the IC. 2 GND Ground. Common ground reference for input and output circuits. 3 IN+ Non-Inverting Input. Connect to VDD to enable output. 4 3V3 3.3-V LDO Output with 15 mA output capability. 5 OUT Gate Drive Output. Held LOW unless required input is present and VDD is above UVLO threshold.

1. Default input signal if no external connection is made.

1 VDD

5 OUT

2 GND

Figure 3. Simplified Block Diagram

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3180 • Rev. 1.0.3 4 FAN3180 — Single 2-A Low-Side Driver with 3.3-V LDO Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VDD VDD to GND -0.3 20.0 V VIN Voltage on IN+ to GND -0.3 VDD + 0.3 V VOUT Voltage on OUT to GND -0.3 VDD + 0.3 V V3V3 3.3-V Output Voltage Pin to GND 6.0 V TL Lead Soldering Temperature (10 Seconds) +260 ºC TJ Junction Temperature +125 ºC TSTG Storage Temperature -65 +150 ºC Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit VDD Supply Voltage Range 4.5 18.0 V VIN Input Voltage IN+ 0 VDD V CBYP Supply Bypass Capacitor 1.0 µF TA Operating Ambient Temperature -40 +125 ºC

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3180 • Rev. 1.0.3 5 FAN3180 — Single 2-A Low-Side Driver with 3.3-V LDO

Electrical Characteristics

Unless otherwise noted, V DD = 12 V, T J = -40°C to +125°C. Currents are defined as positive into the device and negative out of the device. Symbol Parameter Conditions Min. Typ. Max. Unit Supply VDD Operating Range 5 18 V IDD_STATIC Static Supply Current Inputs Not Connected; 3V3 Not Loaded 200 µA IDD_OPER Operating Supply Current(8) fSW=100 kHz, No Load 0.6 mA fSW=1 MHz, No Load 3.8 fSW=100 kHz, 1 nF Load 1.5 fSW=1 MHz, 1 nF Load 12.5 VON Turn-On Voltage VDD Increasing 4.50 4.75 5.00 V VOFF Turn-Off Voltage VDD Decreasing 4.30 4.55 4.80 V VHYS_VDD Supply Voltage Hysteresis 150 200 250 mV Input VIL_T IN+, Low-Voltage Threshold, Maximum 0.8 V VIH_T IN+, High-Voltage Threshold, Minimum 2 V VHYS_IN Input Hysteresis Voltage 0.2 0.5 0.8 V IINL IN+ Current, LOW IN from 0 to VDD -1.00 0.05 1.00 µA IINH IN+ Current, HIGH IN from 0 to VDD -50 -30 1 µA 3V3 LDO VLDO LDO Output Voltage TA=25°C 3.267 3.300 3.333 V Total Variation 3.217 3.382 VLDO_LineReg LDO Line Regulation VDD=5 to 13 V, IOUT=10 mA 1 10 mV VLDO_LoadReg LDO Load Regulation VDD=5 to 13 V, IOUT=0.1 mA to 10 mA 5 20 mV ILDO_MAX Maximum LDO Current 15 mA ILDO_I-LIM LDO Current Limit 10 35 mA Thermal Shutdown TSDON Thermal Shutdown Activation(8) 150 °C TSDOFF Thermal Shutdown Deactivation(8) 125 °C Continued on the following page…

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3180 • Rev. 1.0.3 6 FAN3180 — Single 2-A Low-Side Driver with 3.3-V LDO Unless otherwise noted, V DD = 12 V, T J = -40°C to +125°C. Currents are defined as positive into the device and negative out of the device. Symbol Parameter Conditions Min. Typ. Max. Unit Output ISINK OUT Current, Mid-Voltage, Sinking(8) OUT at VDD/2, CLOAD=0.1 µF, f=1 kHz 2.5 A ISOURCE OUT Current, Mid-Voltage, Sourcing(8) OUT at VDD/2, CLOAD =0.1 µF, f=1 kHz -1.8 A IPK_SINK OUT Current, Peak, Sinking(8) CLOAD=0.1 µF, f=1 kHz 2.8 A IPK_SOURCE OUT Current, Peak, Sourcing(8) CLOAD=0.1 µF, f=1 kHz -2.5 A tRISE Output Rise Time(9) CLOAD=1000 pF 19 30 ns tFALL Output Fall Time(9) CLOAD=1000 pF 13 25 ns tD1 Output Prop. Delay, Input Rising(9) 0 - 3.3 VIN, 1 V/ns Slew Rate 12 23 36 ns tD2 Output Prop. Delay, Input Falling(9) 0 - 3.3 VIN, 1 V/ns Slew Rate 13 24 35 ns IRVS Output Reverse Current Withstand(8) 250 mA Notes: 8. Not tested in production. 9. See Figure 4. Timing Diagrams Figure 4. Non-Inverting Waveforms

Table 1. Related Products

1. Typical currents with OUT at 6 V and VDD=12 V.
2. Thresholds proportional to an externally supplied reference voltage.

Figure 37. 5-Lead SOT-23 warranty therein, which covers Fairchild products. http://www.fairchildsemi.com/packaging/.

0.20 C A B

0.60 REF

0.35 SEATING PLANE

B) ALL DIMENSIONS ARE IN MILLIMETERS.

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3180 • Rev. 1.0.3 17 FAN3180 — Single 2-A Low-Side Driver with 3.3-V LDO

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