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Technical content

Features

 3A Peak Sink/Source at VDD = 12V  4.5 to 18V Operating Range  2.5A Sink / 1.8A Source at VOUT = 6V  Dual-Logic Inputs Allow Configuration as Non-Inverting or Inverting with Enable Function  Internal Resistors Turn Driver Off If No Inputs  13ns Typical Rise Time and 9ns Typical Fall-Time with 1nF Load  Choice of TTL or CMOS Input Thresholds  MillerDrive™ Technology  Typical Propagation Delay Time Under 20ns with Input Falling or Rising  6-Lead 2x2mm MLP or 5-Pin SOT23 Packages  Rated from –40°C to 125°C Ambient

Applications

 Switch-Mode Power Supplies  High-Efficiency MOSFET Switching  Synchronous Rectifier Circuits  DC-to-DC Converters  Motor Control

Description

The FAN3100 2A gate driver is designed to drive an N- channel enhancement-mode MOSFET in low-side switching applications by providing high peak current pulses during the short switchi ng intervals. The driver is available with either TTL (FAN3100T) or CMOS (FAN3100C) input thresholds. Internal circuitry provides an under-voltage lockout func tion by holding the output low until the supply voltage is within the operating range. The FAN3100 delivers fast MOSFET switching performance, which helps maximize efficiency in high- frequency power converter designs. FAN3100 drivers incorporate MillerDrive™ architecture for the final output stage. This bipolar-MOSFET combination provides high peak current during the Miller plateau stage of the MOSFET turn-on / turn-off process to minimize switching loss, while providing rail-to-rail voltage swing and reverse current capability. The FAN3100 also offers dual inputs that can be configured to operate in non-in verting or inverting mode and allow implementation of an enable function. If one or both inputs are left unconnected, internal resistors bias the inputs such that the output is pulled low to hold the power MOSFET off. The FAN3100 is available in a lead-free finish 2x2mm 6- lead Molded Leadless Package (MLP), for smallest size with excellent thermal performance, or industry-standard 5-pin SOT23. Functional Pin Configurations Figure 1. 2x2mm 6-Lead MLP (Top View) Figure 2. SOT23-5 (Top View)

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3100 • Rev. 1.0.3 2 FAN3100 — Single 2A High-Speed, Low-Side Gate Driver

Ordering Information

Threshold Package Packing Method Quantity / Reel FAN3100CMPX CMOS 6-Lead 2x2mm MLP Tape & Reel 3000 FAN3100CSX CMOS 5-Pin SOT23 Tape & Reel 3000 FAN3100TMPX TTL 6-Lead 2x2mm MLP Tape & Reel 3000 FAN3100TSX TTL 5-Pin SOT23 Tape & Reel 3000 Package Outlines Figure 3. 2x2mm 6-Lead MLP (Top View) Figure 4. SOT23-5 (Top View)

  1. Estimates derived from thermal simulati on; actual values depend on the application.
  2. Theta_JL ( JL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any

thermal pad) that are typically soldered to a PCB.

  1. Theta_JT ( JT): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is

held at a uniform temperature by a top-side heatsink.

  1. Theta_JA ( ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow.

JESD51-5, and JESD51-7, as appropriate.

  1. Psi_JB ( JB): Thermal characterization parameter providing correlation between semiconductor junction temperature and an

SOT23-5 package, the board reference is defined as the PCB copper adjacent to pin 2.

  1. Psi_JT ( JT): Thermal characterization parameter providing correlation between the semiconductor junction temperature and

the center of the top of the package for the thermal environment defined in Note 4.

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3100 • Rev. 1.0.3 3 FAN3100 — Single 2A High-Speed, Low-Side Gate Driver Pin Definitions SOT23 Pin # MLP Pin # Name Pin Description 1 3 VDD Supply Voltage. Provides power to the IC. 2 AGND Analog ground for input signals (MLP only). Connect to PGND underneath the IC. 2 GND Ground (SOT-23 only). Common ground reference for input and output circuits. 3 1 IN+ Non-Inverting Input. Connect to VDD to enable output. 4 6 IN- Inverting Input. Connect to AGND or PGND to enable output. 5 4 OUT Gate Drive Output: Held low unless required inputs are present and VDD is above UVLO threshold. Pad P1 Thermal Pad (MLP only). Exposed metal on the bottom of the package which is electrically connected to pin 5. 5 PGND Power Ground (MLP only). For output drive circuit; separates switching noise from inputs. Output Logic IN+ IN − OUT 0(7) 0 0 0(7) 1 (7) 0 1 0 1 1 1 (7) 0 Note: 7. Default input signal if no external connection is made.

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3100 • Rev. 1.0.3 5 FAN3100 — Single 2A High-Speed, Low-Side Gate Driver Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The devic e may not function or be operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VDD VDD to PGND -0.3 20.0 V VIN Voltage on IN+ and IN- to GND, AGND, or PGND GND - 0.3 V DD + 0.3 V VOUT Voltage on OUT to GND, AG ND, or PGND GND - 0.3 V DD + 0.3 V TL Lead Soldering Temperature (10 seconds) +260 ºC TJ Junction Temperature -55 +150 ºC TSTG Storage Temperature -65 +150 ºC ESD Electrostatic Discharge Protection Level Human Body Model, JEDEC JESD22-A114 4 kV Charged Device Model, JEDEC JESD22-C101 750 V Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device oper ation. Recommended operating conditions are specified to ens ure optimal performance to the datasheet specificat ions. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit VDD Supply Voltage Range 4.5 18.0 V VIN Input Voltage IN+, IN- 0 V DD V TA Operating Ambient Te mperature -40 +125 ºC

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3100 • Rev. 1.0.3 6 FAN3100 — Single 2A High-Speed, Low-Side Gate Driver

Electrical Characteristics

Unless otherwise noted, V DD = 12V, T J = -40°C to +125°C. Currents are def ined as positive into the device and negative out of the device. Symbol Parameter Conditions Min. Typ. Max. Unit Supply VDD Operating Range 4.5 18.0 V IDD Supply Current Inputs/EN Not Connected FAN3100C(8) 0.20 0.35 mA FAN3100T 0.5 0.8 mA VON Turn-On Voltage 3.5 3.9 4.3 V VOFF Turn-Off Voltage 3.3 3.7 4.1 V Inputs (FAN3100T) VINL_T IN+, IN- Logic Low Voltage, Maximum 0.8 V VINH_T IN+, IN- Logic High Voltage, Minimum 2.0 V IIN+ Non-inverting Input IN from 0 to V DD -1 175 µA IIN- Inverting Input IN from 0 to V DD -175 1 µA VHYS IN+, IN- Logic Hysteresis Voltage 0.2 0.4 0.8 V Inputs (FAN3100C) VINL_C IN+, IN- Logic Low Voltage 30 %V DD VINH_C IN+, IN- Logic High Voltage 70 %V DD IINL IN Current, Low IN from 0 to V DD -1 175 µA IINH IN Current, High IN from 0 to V DD -175 1 µA VHYS_C IN+, IN- Logic Hysteresis Voltage 17 %V DD Output ISINK OUT Current, Mid-Voltage, Sinking (9) OUT at VDD/2, CLOAD = 0.1µF, f = 1kHz 2.5 A ISOURCE OUT Current, Mid-Voltage, Sourcing (9) OUT at VDD/2, CLOAD = 0.1µF, f = 1kHz -1.8 A IPK_SINK OUT Current, Peak, Sinking (9) C LOAD = 0.1µF, f = 1kHz 3 A IPK_SOURCE OUT Current, Peak, Sourcing (9) C LOAD = 0.1µF, f = 1kHz -3 A tRISE Output Rise Time (10) C LOAD = 1000pF 13 20 ns tFALL Output Fall Time (10) C LOAD = 1000pF 9 14 ns tD1, tD2 Output Prop. Delay, CMOS Inputs (10) 0 - 12V IN; 1V/ns Slew Rate 7 15 28 ns tD1, tD2 Output Prop. Delay, TTL Inputs (10) 0 - 5V IN; 1V/ns Slew Rate 9 16 30 ns IRVS Output Reverse Current Withstand (9) 500 mA Note: 8. Lower supply current due to inactive TTL circuitry. 9. Not tested in production. 10. See Timing Diagrams of Figure 7 and Figure 8.

Figure 7. Non-Inverting

Table 1. Related Products

  1. Typical currents with OUT at 6V and V DD = 12V.

Figure 53. 2x2mm, 6-Lead Molded Leadless Package (MLP) specifically the warranty therein, which covers Fairchild products.

0.20 CAB

0.60 REF

0.35 SEATING PLANE

B) ALL DIMENSIONS ARE IN MILLIMETERS. Figure 54. 5-Lead SOT-23 specifically the warranty therein, which covers Fairchild products.

© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3100 • Rev. 1.0.3 22 FAN3100 — Single 2A High-Speed, Low-Side MOSFET Driver