FAN21SV04

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Document overview

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Technical content

Features

 Single-Supply Operation with 4 A Output Current  Wide Input Range with Dual Supply: 3.0 V to 24 V  Wide Output Voltage Range: 0.8 V to 80% VIN  Over 94% Peak Efficiency  1% Reference Accuracy Over Temperature  Fully Synchronous Operation with Integrated Schottky Diode on Low-Side MOSFET Boosts Efficiency  Single Supply Device for VIN > 6.5 V – 24 V  Programmable Frequency Operation (200-

600 KHz)

 Synchronizable to External Clock with Master/Slave Provisions  Power-Good Signal  Accepts Ceramic Capacitors on Output  External Compensation for Flexible Design  Starts on Pre-Bias Outputs  Integrated Bootstrap Diode  Programmable Over-Current Protection  Under-Voltage, Over-Voltage, and Thermal- Shutdown Protections  5x6mm, 25-Pin, 3-Pad MLP Package

Applications

 Servers & Telecom  Graphics Cards & Displays  Computing Systems  Set-Top Boxes & Game Consoles  Point-of-Load Regulation

Description

The FAN21SV04 TinyBuck™ is a highly efficient, small-footprint, progra mmable-frequency, 4 A, integrated synchronous buck regulator. FAN21SV04 contains both synchronous MOSFETs and a controller/driver with optimized interconnects in one package, which enables designers to solve high- current requirements in a small area with minimal external components, thereby reducing cost. On- board internal 5 V regulator enables single-supply operation for input voltages >6.5 V. The FAN21SV04 can be confi gured to drive multiple slave devices OR synchronize to an external system clock. In slave mode, FAN21SV04 may be set up to be free-running in the absence of a master clock signal. External compensation, programmable switching frequency, and current-limit f eatures allow for design optimization and flexibilit y. High-frequency operation allows for all-ceramic solutions. Fairchild’s advanced BiCMOS power process, combined with low-R DS(ON) internal MOSFETs and a thermally efficient MLP pa ckage, provide the ability to dissipate high power in a small package. Integration helps minimize critical inductances, making layout simpler and more efficient compared to discrete solutions. Output over-voltage, under-v oltage, over-current, and thermal-shutdown protections help protect the device from damage during fault conditions. FAN21SV04 prevents pre-biased output discharge during startup in point-of-load applications. Related Resources  TinyCalc™ Calculator Design Tool  AN-8022 — TinyCalc™ Calculator User Guide

Ordering Information

FAN21SV04MPX -10°C to 85°C Molded Leadless Package (MLP) 5x6 mm Tape and Reel FAN21SV04EMPX -40°C to 85°C Molded Leadless Package (MLP) 5x6 mm Tape and Reel

Figure 3. MLP 5x6 mm Pin Configuration (Bottom View) P1, 6-12 SW Switching Node. Junction of high-side and low-side MOSFETs. P2, 3-5 VIN Power Conversion Input Voltage. Connect to the main input power source. P3, 21-23 PGND Power Ground. Power return and Q2 source.

1 BOOT

6.5 V with 10 Ω resistor and a 1 µF bypass capacitor at the pin (see Figure 10).

13 PGOOD

fault occurs, EN is discharged by a current sink. this pin. Tie this pin to the ground island/plane through the lowest impedance connection. limit trip threshold lower than the internal default setting.

18 R T

5 V_Reg through a resistor configures the CLK signal as an input (slave) and establishes

the free-running switching frequency. 19 FB Output Voltage Feedback. Connect through a resistor divider to the output voltage.

24 CLK

synchronizing with 180° phase shift. amplitude and also provides voltage feedforward functionality.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN21SV04 • Rev. 1.0.3 4 FAN21SV04 — TinyBuck™ 4 A, 24 V Single-Input Integrated Synchronous Buck Regulator Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The devic e may not function or be operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Parameter Conditions Min. Max. Units VIN, VIN_Reg to AGND AGND=PGND 28 V 5V_Reg to AGND AGND=PGND 6 V BOOT to PGND 35 V BOOT to SW -0.5 6.0 V SW to PGND Continuous -0.5 24.0 V Transient (t < 20 ns, f < 600 KHz) -5 30 All other pins -0.3 6.0 V ESD Electrostatic Discharge Protection Level Human Body Model, JESD22-A114 1.5 kV Charged Device Model, JESD22-C101 2.5 Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device oper ation. Recommended operating conditions are specified to ens ure optimal performance to the datasheet specificat ions. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Conditions Min. Typ. Max Units fSW Switching Frequency 200 500 600 KHz VIN, VIN_Reg Supply Voltage for Power and Bias VIN to PGND 3.0 24.0 V VIN_Reg to AGND 6.5 24.0 TA Ambient Temperature FAN21SV04MPX -10 +85 FAN21SV04EMPX -40 +85 TJ Junction Temperature +125 °C Thermal Information Symbol Parameter Min. Typ. Max. Units TSTG Storage Temperature -65 +150 °C TL Lead Soldering Temperature, 30 Seconds +300 °C θJC Thermal Resistance: Junction-to-Case P1 (Q2) 4 °C/W P2 (Q1) 7 P3 4 θJ-PCB Thermal Resistance: Junction-to-Mounting Surface(1) 35 °C/W PD Total Power Dissipation in the package, T A=25°C(1) 2.8 W Note: 1. Typical thermal resistance when mount ed on a four-layer, two-ounce PCB, as shown in Figure 38. Actual results are dependent upon mounting method and surface related to the design.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN21SV04 • Rev. 1.0.3 5 FAN21SV04 — TinyBuck™ 4 A, 24 V Single-Input Integrated Synchronous Buck Regulator

Electrical Characteristics

Recommended operating conditions and using the circuit shown in Figure 1, with V IN, VIN_Reg=12 V, unless otherwise noted. Parameter Conditions Min. Typ. Max. Units Power Supplies Operating Current (VIN+VIN_Reg) V IN=12 V, 5V_Reg Open, CLK Open, fSW=500 KHz, No Load 22 30 mA VIN_Reg Operating Current EN=High, 5 V_Reg Open, CLK Open, fSW=500 KHz 11 mA VIN_Reg Quiescent Current EN=High, FB=0.9 V 4 5 mA VIN_Reg Standby Current EN=0, V IN=12 V 1 mA 5V_Reg Output Voltage Internal VCC Regulator, No Load, 6.5 V<VIN_Reg<24 V 4.7 5.0 5.3 V 5V_Reg Max. Current Load VIN_Reg=12 V 5 mA VIN_Reg UVLO Threshold Rising VIN, VIN=VIN_Reg 5.6 6.3 V Falling VIN, VIN=VIN_Reg 5 V Reference Reference Voltage measured at FB (See Figure 4 for Temperature Coefficient) FAN21SV04MPX, TA=25°C 794 800 806 mV FAN21SV04EMPX, TA=25°C 795 800 805 Oscillator Frequency RT=50 kΩ to GND (Master Mode) 255 300 345 KHz RT=24 kΩ to GND (Master Mode) 540 600 660 Frequency in Slave Mode Compared to Master Mode RT=24 kΩ to 50 kΩ to 5 V_Reg (Slave Mode) -15 +15 % Minimum On Time (2) 40 65 ns Duty Cycle V IN=6.5 V, fSW=600 KHz 80 85 % Ramp Amplitude, Peak–to-Peak(2) VIN=16 V, 1.8 VOUT, RT=30 kΩ, RRAMP=200 kΩ 0.5 V Minimum Off Time (2) 100 150 ns Synchronization CLK Output Pulse Width Master (R T to GND) 70 85 100 ns CLK Output Sink Current Master, V CLK=0.4 V 0.25 0.35 mA CLK Output Source Current Master, V CLK=2 V -2.5 -2.0 mA CLK Input Pulse Width Slave: V CLK > 2 V 50 ns CLK Input Source Current Slave: V CLK=1 V -230 -200 -170 µA CLK Input Threshold, Rising Slave 1.73 1.83 1.93 V Soft-Start VOUT to Regulation (T0.8) Frequency=500 KHz 2.5 ms Fault Enable/SSOK (T1.0) 3.1 ms Error Amplifier DC Gain (2) VIN_Reg > 6.5 V 80 85 dB Gain Bandwidth Product(2) 12 15 MHz Output Voltage Swing (VCOMP) 0.4 4.0 V Output Current, Sourcing 5V_Reg=5 V, V COMP=2.2 V 1.5 2.2 2.5 mA Output Current, Sinking 5V_Reg=5 V, V COMP=1.2 V 0.8 1.2 1.5 mA FB Bias Current V FB=0.8 V, TA=25°C -850 -650 -450 nA Note: 2. Specifications guaranteed by design and characterization; not production tested.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN21SV04 • Rev. 1.0.3 6 FAN21SV04 — TinyBuck™ 4 A, 24 V Single-Input Integrated Synchronous Buck Regulator Electrical Characteristics (Continued) Recommended operating conditions using the circuit shown in Figure 1 with V IN, V IN_Reg=12 V, unless otherwise noted. Parameter Conditions Min. Typ. Max. Units Control Functions EN Threshold, Rising 1.35 2.00 V EN Hysteresis 250 mV EN Pull-Up Resistance VIN_Reg >6.5 V 800 KΩ EN Discharge Current Auto-Restart Mode, VIN_Reg>6.5 V 1 µA FB OK Drive Resistance 800 1000 KΩ PGOOD Low Threshold FB < VREF, 2 Consecutive Clock Cycles(3) -14.0 -11.0 -8.0 %VREF FB > VREF, 2 Consecutive Clock Cycles(3) +7.0 +10.0 +13.5 PGOOD Low Voltage I OUT < 2 mA 0.4 V PGOOD Leakage Current V PGOOD=5 V 0.2 1.0 µA Protection and Shutdown Current Limit RILIM open, fSW=500 KHz, VOUT=1.8 V, RRAMP=200 kΩ, 16 Consecutive Clock Cycles(3) 5.5 6.5 7.5 A ILIM Current VIN_Reg > 6.5 V, T A=25°C -11 -10 -9 µA Over-Temperature Shutdown Internal Temperature +155 °C Over-Temperature Hysteresis +30 °C Over-Voltage Threshold 2 Consecutive Clock Cycles (3) 110 115 120 %V OUT Under-Voltage Shutdown 16 Consecutive Clock Cycles(3) 68 73 78 %V OUT Fault-Discharge Threshold Measured at FB pin 250 mV Fault-Discharge Hysteresis Measured at FB pin (V FB ~500 mV) 250 mV Note: 3. Delay times are not tested in production. Guaranteed by design.

Typical operating characteristics using the Figure 10 circuit; VIN=12 V, VCC=5 V, TA=25°C, unless otherwise specified. Figure 18. 1.8 V OUT Line Regulation Figure 19. 1.8 V OUT Load Regulation Figure 20. Peak MOSFET Temperatures 3.3 V Output,

12 V and 24 V Input (500KHz)(5)

Figure 21. Peak Case Temperature Over MOSFET Temperature rise VIN = 20V, Natural Convection. Figure 22. 1.8 V OUT Efficiency Over fSW Figure 23. Typical Output Operating Area Based on

1. Circuit values for this c onfiguration change in Figure 10.

Refer to Figure 2 for the PWM control mechanism. compensation for enhanced flexibility. before releasing the internal soft-start ramp (SS). with external control, as shown in Figure 30. CC for a latch configuration. Figure 30. Enabling with External Control control circuits including the drivers. ceramic capacitor (see Figure 10, Figure 11). capacitor to reduce noise into the regulator. switching frequency (number of clock cycles). avoid skipping the soft-start cycle.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN21SV04 • Rev. 1.0.3 14 FAN21SV04 — TinyBuck™ 4 A, 24 V Single-Input Integrated Synchronous Buck Regulator

Application Information

5 V_Reg Output

The 5 V_Reg pin is the output of the internal regulator that supplies all power to the control circuit. It is important to keep this pin decoupled to AGND with a 2.2 µf X5R or X7R decoupli ng capacitor. In addition, for operation with V IN>20 V, add a 3.3 Ω resistor in series with the boot capacit or to reduce the switching noise into the regulator. Setting the Output Voltage The output voltage of the r egulator can be set from

0.8 V to ~80% of V IN by an external resistor divider (R1

and R BIAS in Figure 1). For output voltages >3.3 V, output current rating may need to be de-rated depending on the ambient temperature, power dissipated in the package, and the PCB layout (refer to Thermal Information table on page 4, Figure 20, Figure 21, and Figure 23). The internal reference is set to 0.8 V with 650 nA sourced from the FB pin to ensure that the regulator does not start if the pin is left open. The external resistor divider is calculated using: nA6501R V8.0V R V8.0 OUT BIAS +−= (1) Connect RBIAS between FB and AGND. If R1 is open (see Figure 1), the output voltage is not regulated and a latched fault occurs after the SS is complete (T1.0). If the parallel combination of R1 and R BIAS is ≤ 1 KΩ, the internal SS ramp is not released and the regulator does not start. Setting the Switching Frequency Switching frequency is determined by a resistor, R T, connected between the R T pin and AGND (Master Mode) or 5 V_Reg (Slave Mode): where RT is expressed in kΩ: 135)/10( 6 −=Ω fR KT (2) where frequency (f) is expressed in KHz. In Slave Mode, the switching frequency is about 10% slower for the same R T. The regulator does not start if RT is open in Master Mode. Calculating the Inductor Value Typically the inductor value is chosen based on ripple current (ΔIL), which is chosen between 10 to 35% of the maximum DC load. Regulator designs that require fast transient response use a higher ripple-current setting while regulator designs that require higher efficiency keep ripple current on the low side and operate at a lower switching frequency. The inductor value is calculated by the following formula: fI V - (1 V L L IN OUT OUT = (3) where f is the switching frequency. Setting the Ramp Resistor Value RRAMP resistor plays a critical role by providing charging current to the internal ramp capacitor and also serving as a means to provide input voltage feedforward. R RAMP is calculated by the following formula: 10fV)I5.45.30( V)8.1V(R 6 INOUT OUTIN )K(RAMP −

• −= −Ω (4) where frequency (f) is expressed in KHz. For wide input operation, first calculate R RAMP for the minimum and maximum input voltage conditions and use larger of the two values calculated. In all applications, current through the R RAMP pin must be greater than 10 µA from the equation below for proper operation: AR V RAMP IN μ102 8.1 ≥+ − (5) If the calculated R RAMP values in Equation (4) result in a current less than 10 µA, use the R RAMP value that satisfies Equation (5). In applications with large Input ripple voltage, the R RAMP resistor should be adequately decoupled from the input voltage to minimize ripple on the ramp pin. Setting the Current Limit The current limit system involves two comparators. The MAX I LIMIT comparator is used with a V ILIM fixed-voltage reference and represents the maximum current limit allowable. This reference voltage is temperature compensated to reflect the R DSON variation of the low- side MOSFET. The ADJUST I LIMIT comparator is used where the current limit needs to be set lower than the V ILIM fixed reference. The 10 µA current source does not track the RDSON changes over temperature, so change is added into the equations for calculating the ADJUST I LIMIT comparator reference voltage, as is shown below. Figure 33 shows a simplified schematic of the over- current system.

A) DIMENSIONS ARE IN MILLIMETERS. X & Y AXIS EXCEPT WHERE DEPOPULATED. Figure 39. 5x6 mm Molded Leadless Package (MLP) specifically the warranty therein, which covers Fairchild products.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN21SV04 • Rev. 1.0.3 18 FAN21SV04 — TinyBuck™ 4 A, 24 V Single-Input Integrated Synchronous Buck Regulator