FAM65HR51DS2_V01 ONSEMI | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 11
Technical content
Features
- SIP or DIP H−Bridge Power Module for On−board Charger (OBC) in EV or PHEV
- 5 kV/1 sec Electrically Isolated Substrate for Easy Assembly
- Creepage and Clearance per IEC60664−1, IEC 60950−1
- Compact Design for Low Total Module Resistance
- Module Serialization for Full Traceability
- Lead Free, RoHS and UL94V−0 Compliant
- Automotive Qualified per AEC Q101 and AQG324 Guidelines
Applications
- DC−DC Converter for On−board Charger in EV or PHEV Benefits
- Enable Design of Small, Efficient and Reliable System for Reduced Vehicle Fuel Consumption and CO2 Emission
- Simplified Assembly, Optimized Layout, High Level of Integration, and Improved Thermal Performance www.onsemi.com See detailed ordering, marking and shipping information on page 2 of this data sheet.
ORDERING INFORMATION
APMCA−B16
16 LEAD
XXXX = Specific Device Code ZZZ = Lot ID AT = Assembly & Test Location Y = Year W = Work Week NNN = Serial Number
www.onsemi.com Part Number Package Lead Forming Snubber Capacitor Inside DBC Material Pb−Free and RoHS Compliant Operating Temperature (TA) Packing Method FAM65HR51DS2 APM16−CAB L−Shape Yes Al2O3 Yes −40°C ~ 125°C Tube Pin Configuration and Description Figure 1. Pin Configuration Table 1. PIN DESCRIPTION
3 Q1 Sense Source Sense of Q1
4 Q1 Gate Gate Terminal of Q1
9 Q2 Sense Source Sense of Q2
10 Q2 Gate Gate Terminal of Q2
11 Q4 Sense Source Sense of Q4
12 Q4 Gate Gate Terminal of Q4
13 Q3 Sense Source Sense of Q3
14 Q3 Gate Gate Terminal of Q3
Figure 2. Internal Block Diagram Table 2. ABSOLUTE MAXIMUM RATINGS (TJ = 25°C, Unless Otherwise Specified) should not be assumed, damage may occur and reliability may be affected.
- Maximum continuous current and power, without switching losses, to reach T
Table 3. COMPONENTS
- Please refer to datasheet of the Murata capacitor.
0.63 mm Al2O3 alumina with 0.3 mm copper on both sides. DBC substrate is NOT nickel plated. flammability rating class 94V−0. Solder used is a lead free SnAgCu alloy. re−melting of the solder joints.
Table 4. ELECTRICAL SPECIFICATIONS (TJ = 25°C, Unless Otherwise Specified) performance may not be indicated by the Electrical Characteristics if operated under different conditions.
- Defined by design, not subject to production test
Table 5. THERMAL RESISTANCE
- Test method compliant with MIL STD 883−1012.1, from case temperature under the chip to case temperature measured below the package
- Defined by thermal simulation assuming the module is mounted on a 5 mm Al −360 die casting material with 30 um of 1.8 W/mK thermal
Table 6. ISOLATION (Isolation resistance at tested voltage from the base plate to control pins or power terminals.)
www.onsemi.com PARAMETER DEFINITIONS Reference to Table 4: Parameter of Electrical Specifications BVDSS Q1 – Q4 MOSFET Drain−to−Source Breakdown Voltage The maximum drain−to−source voltage the MOSFET can endure without the avalanche breakdown of the body− drain P−N junction in off state. The measurement conditions are to be found in Table 4. The typ. Temperature behavior is described in Figure 13 VGS(th) Q1 – Q4 MOSFET Gate to Source Threshold Voltage The gate−to−source voltage measurement is triggered by a threshold ID current given in conditions at Table 5. The typ. Temperature behavior can be found in Figure 12 RDS(ON) Q1 – Q4 MOSFET On Resistance RDS(on) is the total resistance between the source and the drain during the on state. The measurement conditions are to be found in Table 4. The typ behavior can be found in Figure 10 and Figure 11 as well as Figure 17 gFS Q1 – Q4 MOSFET Forward Transconductance Transconductance is the gain in the MOSFET, expressed in the Equation below. It describes the change in drain current by the change in the gate−source bias voltage: gfs = [ /C0068IDS / /C0068VGS ]VDS IGSS Q1 – Q4 MOSFET Gate−to−Source Leakage Current The current flowing from Gate to Source at the maximum allowed VGS The measurement conditions are described in the Table 4. IDSS Q1 – Q4 MOSFET Drain−to−Source Leakage Current Drain – Source current is measured in off state while providing the maximum allowed drain−to-source voltage and the gate is shorted to the source. IDSS has a positive temperature coefficient.
Figure 3. Timing Measurement Variable Definition Table 7. PARAMETER OF SWITCHING CHARACTERISTICS Turn−On Delay (td(on)) This is the time needed to charge the input capacitance, Ciss, before the load current ID starts flowing. The measurement conditions are described in the Table 4. For signal definition please check Figure 3 above. Rise Time (tr) The rise time is the time to discharge output capacitance, Coss. After that time the MOSFET conducts the given load current ID. The measurement conditions are described in the Table 4. For signal definition please check Figure 3 above. Turn−Off Delay (td(off)) td(off) is the time to discharge Ciss after the MOSFET is turned off. The measurement conditions are described in the Table 4. For signal definition please check Figure 3 above. Fall Time (tf) The fall time, tf, is the time to charge the output capacitance, Coss. During this time the load current drops down and the voltage VDS rises accordingly. The measurement conditions are described in the Table 4. For signal definition please check Figure 3 above.
Figure 4. Normalized Power Dissipation vs. Figure 5. Maximum Continuous ID vs. Case Figure 6. Transfer Characteristics Figure 7. Forward Diode Figure 8. On Region Characteristics (25/C0053C) Figure 9. On Region Characteristics (150 /C0053C)
10 VVGS = 15 V
APMCA−B16 / 16LD, AUTOMOTIVE MODULE CASE MODGJ ISSUE C DATE 03 NOV 2021 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “/C0071”, may or may not be present. Some products may not follow the Generic Marking. GENERIC MARKING DIAGRAM* XXXX = Specific Device Code ZZZ = Lot ID AT = Assembly & Test Location Y = Year W = Work Week NNN = Serial Number XXXXXXXXXXXXXXXX ZZZ ATYWW NNNNNNN MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 98AON97133GDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1APMCA−B16 / 16LD, AUTOMOTIVE MODULE onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com
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