FAD6263 ONSEMI | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 16
Technical content
Features
- Complementary High and Low Drive Outputs
- Shoot−Through Protection with adjustable Dead−Time
- High V oltage Range: Up to 600 V
- DV/dt Immunity ±50 V/ns
- Matched Propagation Delay 100 ns
- Gate Drive Supply Range from 10 V to 22 V
- Output Source / Sink Current Capability 3 A / 3 A
- 3.3 V and 5 V Input Logic Pins
- Extended Allowable Negative Bridge Pin V oltage Swing to −10 V for Signal Propagation
- Under V oltage LockOut (UVLO) for Both Channels
- Shutdown Pin with Latched Fault State
- AEC−Q100 Qualified and PPAP Capable
- This Device is Pb−Free, Halogen Free and is RoHS Compliant
Applications
- Automotive
- Motor Control (fans, pumps, compressors)
- MOSFET and IGBT driver applications This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. www.onsemi.com SOIC−16 CASE 751B MARKING DIAGRAM FAD6263 = Specific Device Code A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week FAD6263 2SD 3SR 4DT 5V SS 6COM 7VDD 8LOP 16 VB
15 HOP
14 HON
9 LON
Device Package Shipping †
ORDERING INFORMATION
FAD6263M1X SOIC −16 (Pb−Free) 2,500 / Tape & Reel PIN CONNECTIONS †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
Figure 1. Application Schematic − SOIC16
5 VSS
6 COM
7 VDD
8 LOP
Figure 2. Simplified Block Diagram
Figure 3. Pin Connection (Top View) Table 1. PIN FUNCTION DESCRIPTION
1 IN Logic Input for Complementary Outputs
2 SD Logic Input Shutdown (Active Low)
3 SR Shutdown Reset
4 DT Dead−Time Control with External Resistor (referenced to VSS)
5 VSS Logic Ground
6 COM Power Ground, Low−Side Driver Return
7 VDD Low−Side and Logic Power Supply Voltage
8 LOP Low−Side Driver Output (Pull Up)
9 LON Low−Side Driver Output (Pull Down)
10 NC No Electrical Connection (Note 1)
11 NC No Electrical Connection (Note 1)
12 NC No Electrical Connection (Note 1)
13 VS High−Side Floating Supply Return
14 HON High−Side Driver Output (Pull Down)
15 HOP High−Side Driver Output (Pull Up)
16 VB High−Side Floating Supply
- The lead and the silicon die are not electrically connected. Printed circuit board traces are allowable.
Table 2. MAXIMUM RATINGS should not be assumed, damage may occur and reliability may be affected.
- Refer to the following standards:
- This device series incorporates ESD protection and is tested by the following methods:
- For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Table 3. RECOMMENDED OPERATING RANGES the Recommended Operating Ranges limits may affect device reliability.
- Recommended based on min 5 V on VB, for proper operation of the level shifter circuit and ensure proper propagation of the si gnal from
- Power and thermal impedance should be determined with case so T J does not exceed 150°C.
Table 4. ELECTRICAL CHARACTERISTICS
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
- SR Logic Input Voltage guaranteed by design.
10.The turn−on propagation delay includes the dead time.
- Turn−off propagation applies to SD
pin. See Figure 37 for timing definitions.
Figure 37. Shutdown with SR Pin Pulled Down SR A floating DT pin would not allow any output to turn on. This pin must be connected to ground with a proper resistor. monitor the Vbs voltage and the Vdd to Vss voltage.
- If the Vbs voltage drops below the negative going threshold voltage, then the output of the high side is pulled down.
- If the Vdd voltage drops below the negative going threshold voltage, then the output of the low side as well as the output of the high side is pulled down. In both cases, the outputs will be reactivated at the next positive edge at the input after the Vbs/Vdd voltages reach again the positive going threshold voltage. Note that an under voltage lockout event has no impact to the Shutdown functionality and it does not need a signal on the SR pin to reactivate the output. Pull Up and Pull Down Outputs The turn on and turn off speed can be defined separately without the need for a diode in the gate resistance path. HOP and LOP are the pull up output stages that command the turn on of the power switch to drive. The value of R1 and R3 consequently impacts the turn on speed. HON and LON are the pull down output stages that command the turn off of the power switch to drive. The value of R2 and R4 consequently impacts the turn off speed.
SOIC−16 CASE 751B−05 ISSUE K DATE 29 DEC 2006SCALE 1:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 16 9 SEATING PLANE F JM R X 45/C0095 G
8 PLP−B−
−A− M0.25 (0.010) B S −T− D K C 16 PL SBM0.25 (0.010) A ST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 /C0095/C0095/C0095/C0095 6.40 16X 0.58 16X 1.12 1.27 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT STYLE 1: PIN 1. COLLECTOR 2. BASE 3. EMITTER 4. NO CONNECTION 5. EMITTER 6. BASE 7. COLLECTOR 8. COLLECTOR 9. BASE 10. EMITTER 11. NO CONNECTION 12. EMITTER 13. BASE 14. COLLECTOR 15. EMITTER 16. COLLECTOR STYLE 2: PIN 1. CATHODE 2. ANODE 3. NO CONNECTION 4. CATHODE 5. CATHODE 6. NO CONNECTION 7. ANODE 8. CATHODE 9. CATHODE 10. ANODE 11. NO CONNECTION 12. CATHODE 13. CATHODE 14. NO CONNECTION 15. ANODE 16. CATHODE STYLE 3: PIN 1. COLLECTOR, DYE #1 2. BASE, #1 3. EMITTER, #1 4. COLLECTOR, #1 5. COLLECTOR, #2 6. BASE, #2 7. EMITTER, #2 8. COLLECTOR, #2 9. COLLECTOR, #3 10. BASE, #3 11. EMITTER, #3 12. COLLECTOR, #3 13. COLLECTOR, #4 14. BASE, #4 15. EMITTER, #4 16. COLLECTOR, #4 STYLE 4: PIN 1. COLLECTOR, DYE #1 2. COLLECTOR, #1 3. COLLECTOR, #2 4. COLLECTOR, #2 5. COLLECTOR, #3 6. COLLECTOR, #3 7. COLLECTOR, #4 8. COLLECTOR, #4 9. BASE, #4 10. EMITTER, #4 11. BASE, #3 12. EMITTER, #3 13. BASE, #2 14. EMITTER, #2 15. BASE, #1 16. EMITTER, #1 STYLE 5: PIN 1. DRAIN, DYE #1 2. DRAIN, #1 3. DRAIN, #2 4. DRAIN, #2 5. DRAIN, #3 6. DRAIN, #3 7. DRAIN, #4 8. DRAIN, #4 9. GATE, #4 10. SOURCE, #4 11. GATE, #3 12. SOURCE, #3 13. GATE, #2 14. SOURCE, #2 15. GATE, #1 16. SOURCE, #1 STYLE 6: PIN 1. CATHODE 2. CATHODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE 7. CATHODE 8. CATHODE 9. ANODE 10. ANODE 11. ANODE 12. ANODE 13. ANODE 14. ANODE 15. ANODE 16. ANODE STYLE 7: PIN 1. SOURCE N‐CH 2. COMMON DRAIN (OUTPUT) 3. COMMON DRAIN (OUTPUT) 4. GATE P‐CH 5. COMMON DRAIN (OUTPUT) 6. COMMON DRAIN (OUTPUT) 7. COMMON DRAIN (OUTPUT) 8. SOURCE P‐CH 9. SOURCE P‐CH 10. COMMON DRAIN (OUTPUT) 11. COMMON DRAIN (OUTPUT) 12. COMMON DRAIN (OUTPUT) 13. GATE N‐CH 14. COMMON DRAIN (OUTPUT) 15. COMMON DRAIN (OUTPUT) 16. SOURCE N‐CH MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98ASB42566BDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1SOIC−16 © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
www.onsemi.com ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries i n the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . A listing of ON Semiconductor’s product/patent ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the right s of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative