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Technical content
Features
High Output, Low Distortion Class-D Mono Speaker Amplifier o 2.3W into 8Ω from 3.6V Supply (10% THD+N) o 1.85W into 8Ω from 3.6V Supply (1% THD+N) o 0.01% THD+N into 8Ω (100mW) High-Efficiency Boost Regulator Provides Higher Output Power Over Li-Ion Battery Voltages o 85% Total Efficiency (3.6V, 8Ω, PO = 1.0W) Adaptive Boost Shutdown at Lower Output Power Increases Efficiency and Reduces Quiescent Current Consumption: o IDD = 2.7mA from 3.6V Supply Automatic Gain Control (AGC) Monitors Battery Voltage and Dynamically Adjusts Gain, Extending Battery Runtime Reduced Noise Floor Enhances Audio Playback o 38µV Output Noise (A-Weighted) o 100dB SNR (A-Weighted) Low-EMI Design Allows Filterless Operation High-Power Supply Ripple Rejection: o 88dB PSRR (fRIPPLE = 217Hz, Boost Enabled) o 70dB PSRR (fRIPPLE = 217Hz, Boost Bypassed) High Noise Rejection Using Differential Audio Inputs: o 75dB CMRR (fIN = 1kHz) o 71dB CMRR (fIN = 217Hz) Short-Circuit Protection Under-Voltage Protection “Click and Pop” Suppression Available in 12-Bump, 0.5mm Pitch, WLCSP o Space-Saving 1.86mm x 1.44mm Package
Description
The FAB3103 is a mono Class-D audio amplifier with an integrated boost regulator that achieves high output audio over a power supply range of 2.5V to 5.2V. Automatic Boost Shutdown dynamically shuts down the boost regulator at low output power for greater efficiency and lower quiescent current consumption. Automatic Gain Control (A GC) monitors the battery and reduces gain as the battery voltage drops to limit maximum current consumption, extending battery runtime and preventing mobile device shutdown.
Applications
Smart Phones, Feature Phones Tablets, Portable Gaming Devices GPS, Active Speakers Figure 1. Typical Application Circuit
Ordering Information
Part Number Operating Temperature Range Package Packing Method FAB3103UCX -40°C to +85°C 12-Bump, 0.5mm Pitch, Wafer-Level Chip-Scale Package (WLCSP)
3000 Units
on Tape & Reel
Figure 2. Pin Assignments (Top View) A3 BGND Ground Boost regulator ground – conne ct to PGND and AGND with a ground plane. D1 PGND Ground Power ground – connect to BGND and AGND with a ground plane. D2 AGND Ground Analog ground – connect to BGND and PGND with a ground plane.
© 2011 Fairchild Semiconductor www.fairchildsemi.com FAB3103 • Rev. 1.0.2 3 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may dam age the device. The device may not function or be operable above the recommended operating conditions and st ressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VBATT Voltage on VBATT Pin -0.3 6.0 V VOUT Voltage on OUT-, OUT+ Pins -0.3 V BSTOUT + 0.3 V VIN Voltage on IN+, IN-, SW, EN, AGCT Pins -0.3 V BATT + 0.3 V VINDIFF Differential Voltage Across IN+, IN- Pins While Enabled -1.5 1.5 V rms PD Power Dissipation Internally Limited Dissipation Ratings Symbol Parameter Min. Typ. Max. Unit TJ Junction Temperature 150 °C TSTG Storage Temperature Range -65 150 °C TL Lead Temperature (Soldering, 10s) 300 °C JA Thermal Resistance, JEDEC Standard, Multilayer Test Boards, Still Air 77 °C/W Electrostatic Discharge Protection Symbol Parameter Condition Level Unit ESD Human Body Model (HBM) EIA/JESD22-A114 ±3 KV Charged Device Model (CDM) According to "EIA/JESD22-C101 Level III" Compatible with "IEC61340-3-3 Level C4" or "ESD-STM5.3.1-1999 Level C4" ±1 KV Recommended Operating Conditions The Recommended Operating Conditions table defines th e conditions for actual device operation. Recommended operating conditions are specified to en sure optimal performance to the datash eet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Typ. Max. Unit TA Operating Temperature Range -40 85 °C VBATT VBATT Supply Voltage Range 2.5 5.2 V LSW Inductor (at Peak Inductor Current: 1.5A) 1.4 (1) 2.2 µH CVBATT VBATT Capacitor 4.7(1) 10.0 µF CPVDD PVDD Capacitor 6.8(1) 22.0 µF CAGCT Capacitive Load on AGCT 10 pF RL Load Resistance 6 (2) 8 Ω Notes: 1. Capacitors experience degradation over time and this is accelerated with increased temperature. It is therefore recommended to use the stated typical values. 2. The FAB3103 is optimized to drive an 8 Ω speaker impedance. The 8Ω speaker should remain at ≥6Ω over the entire audio frequency range.
© 2011 Fairchild Semiconductor www.fairchildsemi.com FAB3103 • Rev. 1.0.2 4 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control
Electrical Characteristics
Unless otherwise noted: AGCT=GND, R L=8Ω + 33µH, f=1KHz, and audio measurement bandwidth=22Hz to 20KHz (AES17). Typical values are at VBATT=3.6V, TA=25°C, with typical external component values. Symbol Parameter Conditions Min. Typ. Max. Unit IDD Quiescent Current Inputs AC Grounded, EN=HIGH 2.7 mA ISD Shutdown Current EN=PGND, Inputs AC Grounded 0.1 2.0 µA tWU Wake-Up Time From LOW to HIGH EN Transition to Full Operation 5 12 ms fSW(AMP) Class-D Switching Frequency 300 KHz VOS Differential Output Offset Voltage Inputs AC Grounded 1.67 5.00 mV AV Gain AGC Inactive 9.5 10.0 10.5 V/V RIN Input Resistance Gain=10V/V (AGC Inactive) Differential 24 30 36 KΩ Single-Ended 12 15 18 RSTD Single-Ended Input Impedance During Shutdown EN=PGND, AC-Coupled Inputs, V INx < 2Vrms per Input 80 K Ω VSTD Maximum Single-Ended Input Voltage Swing During Shutdown EN=PGND, AC-Coupled Inputs 2 V rms THD+N Added to Audio Signal at Inputs During Shutdown EN=PGND, AC-Coupled Inputs, Source Impedance < 1Ω 0.02 % THD+N Total Harmonic Distortion Plus Noise POUT=100mW 0.01 POUT=500mW 0.02 PO Output Power THD+N ≤ 10% 2.3 W THD+N ≤ 1% 1.85 IDLMT Class-D Output Current Limit 1.4 A PSRR Power Supply Rejection Ratio Inputs Shorted, AC Grounded, Output Referred; V RIPPLE=200mVP-P Square Centered Around V BATT=3.8V, 50% Duty Cycle, 10µs Rise/Fall Time fRIPPLE=1KHz, Boost Enabled 85 dB fRIPPLE=217Hz, Boost Enabled 88 fRIPPLE=1KHz, Boost Bypassed 77 fRIPPLE=217Hz, Boost Bypassed 70 CMRR Common-Mode Rejection Ratio Output Referred, VRIPPLE=200m VP-P Square, 50% Duty Cycle, 10µs Rise/Fall Time, Inputs Shorted and AC-Coupled to V RIPPLE fRIPPLE=1KHz 75 dB fRIPPLE=217Hz 71 VBIAS IN+, IN- Bias Voltage 1.2 V Efficiency RL=8Ω + 33µH , POUT=1.0W 85 % SNR Signal-To-Noise Ratio POUT=1.85W, A-Weighted 100 dB POUT=1.85W, Unweighted 97 Continued on the following page...
© 2011 Fairchild Semiconductor www.fairchildsemi.com FAB3103 • Rev. 1.0.2 5 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Unless otherwise noted: AGCT=GND, R L=8Ω + 33µH, f=1KHz, and audio measurement bandwidth=22Hz to 20KHz (AES17). Typical values are at VBATT=3.6V, TA=25°C, with typical external component values. Symbol Parameter Conditions Min. Typ. Max. Unit en Output Noise A-Weighted 38 µV rms Unweighted 51 TSTD Thermal Shutdown Junction Temperature 165 °C THYS Thermal Shutdown Hysteresis Junction Temperature 25 °C VULVO V BATT Under-Voltage Shutdown 1.8 2.1 2.3 V VHYS V BATT Under-Voltage Hysteresis 120 300 mV fSW(REG) Boost Converter Switching Frequency 1.2 MHz ILIMIT(SU) Boost Converter Inrush Current Limit PVDD Rising from 0V to VBATT 600 mA tINRUSH Boost Converter Inrush Time PVDD Rising from 0V to VBATT 1000 µs Auto Boost Startup Current Ramp Rate PVDD Rising from VBATT to 5.6V 15 mA/µs IBOOST Boost Converter Peak Input Current Limit Open-Loop Limit 1100 1600 2100 mA VBSTOUT Boost Converter Output Vo ltage 5.55 5.65 5.75 V VBSTSTD Auto Boost Shutdown Threshold Voltage 2 V pk tHOLD Auto Boost Shutdown Hold Time 125 ms VAGC AGC Trip Point AGCT=Floating 3.190 3.250 3.283 V AGCT=GND 3.480 3.550 3.586 AGCT=VBATT 3.680 3.750 3.788 Output Power with AGC AGCT=GND, VIN=0.4Vpk, 1KHz Sine Wave VBATT=3.4V 0.79 W VBATT=3.0V 0.45 tA AGC Attack Time 20 µs/dB tR AGC Release Time 1600 ms/dB AGC Step Size 0.5 dB AGC Maximum Attenuation 10 dB VIH EN Logic Input High Voltage 1.1 V VIL EN Logic Input Low Voltage 0.45 V CIN EN Capacitance 10 pF RPD EN Pull-Down Resistance 300 K Ω
© 2011 Fairchild Semiconductor www.fairchildsemi.com FAB3103 • Rev. 1.0.2 7 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Detailed Description Signal Path The FAB3103 features a fully differential signal path for noise rejection. The low-EMI design allows the OUT+ and OUT- pins to be connected directly to a speaker without an output filter. The input section includes an 80KHz low-pass filter for removing out-of-band noise from audio sources, such as sigma delta DACs. Shutdown If EN is grounded, the Class-D amplifier and the boost regulator are turned off. IN+ and IN- are high impedance. Audio signals present at IN+ and IN- with amplitude less than the maximum differential input voltage swing are not dist orted by the FAB3103 ( see Electrical Characteristics). When EN transitions from LOW to HIGH during the wake-up time (see Electrical Characteristics), the FAB3103 charges the input DC blocking capacitors to the Common Mode voltage before enabling the Class-D amplifier. To minimize click and pop during turn-on, audio signals should not be present during the wake-up period. Other devices that are connected to the same input signal, if not muted, may experience a pop due to this capacitor charging. There is no limitation on the length of shutdown. Remaining charge on the PVDD capacitor at startup (for example, if EN is LOW for only a short period) does not affect startup behavior. The EN pin has an internal 300K Ω pull-down resistor. EN must be LOW when V BATT is lower than the V BATT under-voltage shutdown voltage (see Electrical Characteristics). EN must remain LOW for at least 100µs after V BATT rises above the V BATT under-voltage shutdown voltage. Class-D Amplifier Over-Current Protection If the output current of t he Class-D amplifier exceeds limits (see the Electrical Characteristics), the amplifier is disabled for approximately one second. (Other systems, such as the boost regulator and AGC, remain active.) After one second, the amplifier is re-enabled. If the fault condition still exists, the amplifier is disabled again. This cycle repeats until the fault condition is removed. Speaker Size The FAB3103 was designed for use with small speakers found in mobile applications. The back EMF in larger speakers can cause PVDD to peak above safe levels. To check safe operation, monitor PVDD while driving a dynamic signal (such as music) at maximum levels. If PVDD peaks above 6.2V, connect a 6V Zener diode between PVDD and PGND. Low EMI To minimize EMI, edge-rate control for the boost regulator and Class-D amplifier can be employed. The boost regulator's edge-rate control is disabled by default. For devices with 20ns boost edge rates or 10ns boost edge rates, contact a Fairchild Representative. This is a factory option that cannot be changed in the application, but is available from Fairchild. The Class-D amplifier's edge-rate control is disabled by default. For devices with 20ns Class-D edge rates, contact a Fairchild Representative. This is a factory option that cannot be changed in the application, but is available from Fairchild.. Automatic Boost Shutdown Automatic boost shutdown changes the Class-D amplifier supply voltage as a function of audio output level. At audio output levels above 2V pk, the boost converter generates 5.65V from the input battery voltage. If the output level is below 2V pk for more than 125ms, the boost converter is switched off and the Class-D amplifier is supplied directly from the battery. As a result, efficiency is improved at low audio output levels and quiescent current consumption is reduced. Figure 9 shows an example of an auto boost startup event. At first, the boost converter is off and PVDD is the same voltage as VBATT. At 20µs, a large audio signal is presented at th e inputs, which causes the boost converter to start up. From 20µs to 120µs, battery current is ramped up. The auto boost startup current ramp rate is 15mA/µs. This ramp is enforced to avoid sudden current draw spikes from the battery. At 120µs, after PV DD has reached the Boost Converter Output Voltage, the ramp is released and battery current falls to a level capable of sustaining the speaker amplifier’s outputs. At 160µs, the input signal begins to rise, which increases battery current. At 180µs, the boost converter peak input current limit is enforced and battery current levels off, which causes PVDD to droop. The boost regulator should not be used to drive any loads other than the Class-D amplifier.
in analog performance and thermal characteristics. Do not run analog and digital signals in parallel. Traces must run on top of the ground plane. Avoid routing at 90° angles. (0.1 inches) of the device power pin. Figure 16. Recommended PCB Layout
Figure 17. 12-Ball WLCSP, 3x4 Array, 0.5mm Pitch, 250µm Ball warranty therein, which covers Fairchild products. specifications. http://www.fairchildsemi.com/packaging/. A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. ±39 MICRONS (547-625 MICRONS).
© 2011 Fairchild Semiconductor www.fairchildsemi.com FAB3103 • Rev. 1.0.2 13 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control