STF6N80K5 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 15

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package information
  • 4.1 TO-220FP package information
  • 4.2 I 2PAKFP (TO-281) package information
  • 5 Revision history

Features

  • Industry’s lowest RDS(on)
  • Industry’s best figure of merit (FoM)
  • Ultra low gate charge
  • 100% avalanche tested
  • Zener-protected

Applications

  • Switching applications

Description

These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. D(2) G(1) S(3) AM01476v1 TO-220FP 1 2 3 I PAKFP2 Order code V DS RDS(on)max I D PTOT STF6N80K5 800 V 1.6 Ω 4.5 A 25 W STFI6N80K5 Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Limited by maximum junction temperature
  2. Pulse width limited by safe operating area

Table 3. Thermal data

2 Electrical characteristics

(TCASE = 25 °C unless otherwise specified). Table 4. On/off states

  1. Defined by design, not subject to production test .

Table 5. Dynamic

  1. Time related is defined as a constant equivalent capacitance giving the same charging time as C oss when
  2. Energy related is defined as a constant equival ent capacitance giving the same stored energy as C oss

integrity protection,thus eliminating the need for additional external componentry. Table 6. Switching times Table 7. Source drain diode

  1. Pulse width limited by safe operating area
  2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

Table 8. Gate-source Zener diode

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance

6 VGS(V)8

Figure 8. Capacitance variations Figure 9. Output capacitance stored energy Figure 10. Normalized gate threshold voltage vs Figure 11. Normalized on-resistance vs Figure 12. Normalized V(BR)DSS vs temperature Figure 13. Source-drain diode forward

0 VDS(V)

2.5 VGS=10 V

3 Test circuits

Figure 14. Switching times test circuit for Figure 15. Gate charge test circuit Figure 16. Test circuit for inductive load Figure 17. Unclamped inductive load test circuit Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.1 TO-220FP package information

Figure 20. TO-220FP package outline

Table 9. TO-220FP mechanical data

4.2 I 2PAKFP (TO-281) package information

Figure 21. I2PAKFP (TO-281) package outline

Table 10. I2PAKFP (TO-281) mechanical data

5 Revision history

Table 11. Document revision history 28-May-2013 1 First release. Updated title, features and description in cover page. and Section 4: Package information. times, and Table 7: Source drain diode.