RF3S49092SM FAIRCHILD | Alldatasheet
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Technical content
Features
- 20A, 12V (N-Channel) 10A, 12V (P-Channel) r DS(ON) = 0.060Ω (N-Channel) rDS(ON) = 0.140Ω (P-Channel) Temperature Compensating PSPICE® Model On-Resistance vs Gate Drive Voltage Curves Peak Current vs Pulse Width Curve UIS Rating Curve Symbol Packaging JEDEC MO-169AB
Ordering Information
RF3S49092SM MO-169AB F3S49092 NOTE: When ordering, use the entire part number. For ordering the MO-169AB in tape and reel, add the suffix 9A to the part number, i.e., RF3S49092SM9A. G1S1 D Data Sheet September 2004
©2004 Fairchild Semiconductor Corporation RF3S49092SM Rev. C Absolute Maximum Ratings TC = 25oC Unless Otherwise Specified N-CHANNEL P-CHANNEL UNITS Drain Current Refer to Peak Current Curve Refer to Peak Current Curve A Power Dissipation 0.33 0.33 W W/oC Maximum Temperature for Soldering 300 260 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications (N-Channel)TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0V, (Figure 13) 12 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA, (Figure 12) 1 - - V Zero Gate Voltage Drain Current I DSS VDS = 12V, VGS = 0V TC = 25oC- - 1 µA TC = 150oC- - 5 0 µA Gate to Source Leakage Current I GSS VGS = ±10V - - ±100 nA Drain to Source On Resistance r DS(ON) ID = 20A, VGS = 5V, (Figure 9, 11) - - 0.060 Ω Turn-On Time t ON VDD = 6V, ID ≈ 20A, RL = 0.24Ω , VGS =5 V , RGS = 25Ω (Figure 10) - - 100 ns Turn-On Delay Time t d(ON) -1 8-n s Rise Time t r -6 0-n s Turn-Off Delay Time t d(OFF) -5 0-n s Fall Time t f -6 0-n s Turn-Off Time t OFF - - 140 ns Total Gate Charge Q g(TOT) VGS = 0V to 10V V DD = 9.6V, ID = 20A, R L = 0.42Ω (Figure 15) -2 0 2 5 n C Gate Charge at 5V Q g(5) VGS = 0V to 5V - 12 15 nC Threshold Gate Charge Q g(TH) VGS = 0V to 1V - 0.9 1.2 nC Input Capacitance C ISS VDS = 10V, VGS = 0V, f = 1MHz (Figure 14) - 750 - pF Output Capacitance C OSS - 700 - pF Reverse Transfer Capacitance C RSS - 275 - pF Thermal Resistance Junction to Case R θJC - - 3.00 oC/W Thermal Resistance Junction to Ambient R θJA -- 6 2 oC/W N-Channel Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Voltage V SD ISD = 20A - - 1.5 V Reverse Recovery Time t rr ISD = 20A, dISD /dt = 100A/µs - - 100 ns RF3S49092SM
©2004 Fairchild Semiconductor Corporation RF3S49092SM Rev. C Soldering Precautions The soldering process creates a considerable thermal stress on any semiconductor component. The melting temperature of solder is higher than the maximum rated temperature of the device. The amount of time the device is heated to a high temperature should be minimized to assure device reliability. Therefore, the following precautions should always be observed in order to minimize the thermal stress to which the devices are subjected. 1. Always preheat the device. 2. The delta temperature between the preheat and soldering should always be less than 100 oC. Failure to preheat the device can result in excessive thermal stress which can damage the device. 3. The maximum temperature gradient should be less than 5oC per second when changing from preheating to soldering. 4. The peak temperature in the soldering process should be at least 30oC higher than the melting point of the solder chosen. 5. The maximum soldering temperature and time must not exceed 260oC for 10 seconds on the leads and case of the device. 6. After soldering is complete, the device should be allowed to cool naturally for at least three minutes, as forced cool- ing will increase the temperature gradient and may result in latent failure due to mechanical stress. 7. During cooling, mechanical stress or shock should be avoided. RF3S49092SM
©2004 Fairchild Semiconductor Corporation RF3S49092SM Rev. C SUBCKT RF3S49092 2 1 3; N-Channel Model rev 9/6/94 CA 12 8 9.77e-10 CB 15 14 9.19e-10 CIN 6 8 7.81e-10 DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 14.89 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 1.233e-9 LSOURCE 3 7 0.452e-9 MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 5 16 RDSMOD 4.91e-3 RGATE 9 20 2.74 RIN 6 8 1e9 RSOURCE 8 7 RDSMOD 5e-3 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 0.3215 .MODEL DBKMOD D (RS = 1.28e-1 TRS1 = 1.69e-3 TRS2 = -2.0e-6) .MODEL DPLCAPMOD D (CJO = 0.84e-9 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 1.63 KP = 11.55 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 9.15e-4 TC2 = 3.13e-7) .MODEL RDSMOD RES (TC1 = 7.00e-4 TC2 = 5.00e-6) .MODEL RVTOMOD RES (TC1 = -2.155e-3 TC2 = -2.7e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.05 VOFF= -4.05) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.05 VOFF= -6.05) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.72 VOFF= 4.28) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 4.28 VOFF= -0.72) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991. GATE LGATE RGATE EVTO 12 13 S1A S1B S2A S2B CA CB EGS EDS RIN CIN MOS1 MOS2 RDRAIN DBREAK EBREAK DBODY LDRAIN DRAIN RSOURCE LSOURCE SOURCE RBREAK RVTO VBAT IT VTO ESG DPLCAP 7 3 17 18 209 RF3S49092SM
©2004 Fairchild Semiconductor Corporation RF3S49092SM Rev. C SUBCKT RF3S49092 2 1 3 ; P-Channel Model rev 11/8/94 CA 12 8 8.75e-10 CB 15 14 8.65e-10 CIN 6 8 7.65e-10 DBODY 5 7 DBDMOD DBREAK 7 11 DBKMOD DPLCAP 10 6 DPLCAPMOD EBREAK 5 11 17 18 -23.75 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 8 6 1 EVTO 20 6 8 18 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 1.233e-9 LSOURCE 3 7 0.452e-9 MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 5 16 RDSMOD 7.36e-3 RGATE 9 20 6.1 RIN 6 8 1e9 RSOURCE 8 7 RDSMOD 4.56e-2 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 -0.558 .MODEL DBKMOD D (RS = 7.84e-2 TRS1 = -4.27e-3 TRS2 = 5.77e-5) .MODEL DPLCAPMOD D (CJO = 2.85e-10 IS = 1e-30 N = 10) .MODEL MOSMOD PMOS (VTO = -2.1423 KP = 9.206 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 9.61e-4 TC2 = -1.09e-6) .MODEL RDSMOD RES (TC1 = 2.10e-3 TC2 = 6.99e-6) .MODEL RVTOMOD RES (TC1 = -1.82e-3 TC2 = 1.47e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 5.47 VOFF= 3.47) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.47 VOFF= 5.47) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.05 VOFF= -3.95) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.95 VOFF= 1.05) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991. GATE LGATE RGATE EVTO 12 13 S1A S1B S2A S2B CA CB EGS EDS RIN CIN MOS1 MOS2 RDRAIN DBREAK EBREAK DBODY LDRAIN DRAIN RSOURCE LSOURCE SOURCE RBREAK RVTO VBAT IT VTO ESG DPLCAP 610 21 11 7 3 17 18 209 RF3S49092SM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™ POP™ FAST FASTr™ FPS™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I 2C™ i-Lo™ ImpliedDisconnect™ Rev. I13 ACEx™ ActiveArray™ Bottomless™ CoolFET™ CROSSVOLT ™ DOME™ EcoSPARK™ E 2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™Across the board. Around the world.™ The Power Franchise Programmable Active Droop™