IRF3710S IRF | Alldatasheet
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HEXFET ® Power MOSFET PD -91310C Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D 2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on- resistance in any existing surface mount package. The D 2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF3710L) is available for low- profile applications. S D G VDSS = 100V R DS(on) = 0.025Ω ID = 57A
Description
Parameter Typ. Max. Units R θJC Junction-to-Case ––– 0.75 R θJA Junction-to-Ambient ( PCB Mounted,steady-state)** ––– 40 Thermal Resistance °C/W Parameter Max. Units ID @ TC = 25°C Continuous Drain Current, VGS @ 10V ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 40 A IDM Pulsed Drain Current 180 PD @T A = 25°C Power Dissipation 3.8 W PD @T C = 25°C Power Dissipation 200 W Linear Derating Factor 1.3 W/°C VGS Gate-to-Source Voltage ± 20 V EAS Single Pulse Avalanche Energy 530 mJ IAR Avalanche Current 28 A EAR Repetitive Avalanche Energy 20 mJ dv/dt Peak Diode Recovery dv/dt
5.0 V/ns
TJ Operating Junction and -55 to + 175 TSTG Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Absolute Maximum Ratings l Advanced Process Technology l Surface Mount (IRF3710S) l Low-profile through-hole (IRF3710L) l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated
2 D Pak
Parameter Min. Typ. Max. Units Conditions V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V V GS = 0V, ID = 250µA ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA R DS(on) Static Drain-to-Source On-Resistance ––– ––– 0.025 Ω VGS = 10V, ID = 28A VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V V DS = VGS , ID = 250µA gfs Forward Transconductance 20 ––– ––– S V DS = 25V, ID = 28A ––– ––– 25 µA VDS = 100V, VGS = 0V ––– ––– 250 V DS = 80V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 V GS = 20V Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V Q g Total Gate Charge ––– ––– 190 I D = 28A Q gs Gate-to-Source Charge ––– ––– 26 nC V DS = 80V Q gd Gate-to-Drain ("Miller") Charge ––– ––– 82 V GS = 10V, See Fig. 6 and 13 td(on) Turn-On Delay Time ––– 14 ––– V DD = 50V tr Rise Time ––– 59 ––– I D = 28A td(off) Turn-Off Delay Time ––– 58 ––– R G = 2.5Ω tf Fall Time ––– 48 ––– R D = 1.7Ω, See Fig. 10 Between lead,––– ––– and center of die contact C iss Input Capacitance ––– 3000 ––– V GS = 0V C oss Output Capacitance ––– 640 ––– pF V DS = 25V C rss Reverse Transfer Capacitance ––– 330 ––– ƒ = 1.0MHz, See Fig. 5 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) IGSS ns IDSS Drain-to-Source Leakage Current nH7.5LS Internal Source Inductance VDD = 25V, starting TJ = 25°C, L = 1.4mH RG = 25Ω , IAS = 28A. (See Figure 12) Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Notes: ** When mounted on FR-4 board using minimum recommended footprint. For recommended footprint and soldering techniques refer to application note #AN-994. ISD ≤ 28A, di/dt ≤ 460A/µs, VDD ≤ V(BR)DSS , TJ ≤ 175°C Pulse width ≤ 300µs; duty cycle ≤ 2%. Uses IRF3710 data and test conditions Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current MOSFET symbol (Body Diode) ––– ––– showing the ISM Pulsed Source Current integral reverse (Body Diode) VSD Diode Forward Voltage ––– ––– 1.3 V T J = 25°C, IS = 28A, VGS = 0V trr Reverse Recovery Time ––– 210 320 ns T J = 25°C, IF = 28A Q rr Reverse RecoveryCharge ––– 1.7 2.6 µC di/dt = 100A/µs Source-Drain Ratings and Characteristics S D GA 180 ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Fig 1. Typical Output Characteristics Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature Fig 2. Typical Output Characteristics 100 1000 0.1 1 10 100 I , Drain-to-Source Current (A)D V , Drain-to-Source Voltage (V )DS VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 20µs PULSE WIDTH T = 25°CC A 4.5V 100 1000 0.1 1 10 100 I , Drain-to-Source Current (A)D V , Drain-to-Source Voltage (V )DS VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V A 4.5V 20µs PULSE WIDTH T = 175°CC 100 1000 456789 1 0 T = 25°CJ GSV , Gate-to-Source Voltage (V) DI , Drain-to-Source Current (A) V = 50V 20µs PULSE WIDTH DS A T = 175°CJ 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 JT , Junction Temperature (°C) R , Drain-to-Source O n ResistanceDS(on) (Normalized) V = 10V GS A I = 46AD
Fig 8. Maximum Safe Operating Area Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 7. Typical Source-Drain Diode Forward Voltage 1000 2000 3000 4000 5000 6000 1 10 100 C, Capacitance (pF) DSV , Drain-to-Source Voltage (V ) A V = 0V, f = 1MHz C = C + C , C SHORTED C = C C = C + C GS iss gs gd ds rss gd oss ds gd C iss C oss C rss 0 40 80 120 160 200 Q , Total Gate Charge (nC )G V , Gate-to-Source Voltage (V)GS V = 80V V = 50V V = 20V DS DS DS A FOR TEST CIRCUIT SEE FIGURE 13 I = 28AD 100 1000 T = 25°CJ V = 0V GS V , Source-to-Drain Voltage (V) I , Reverse Drain Current (A) SD SD A T = 175°CJ 100 1000 1 10 100 1000 V , Drain-to-Source Voltage (V )DS I , Drain Current (A) OPERATION IN THIS AREA LIMITED BY R D DS(on) 10µs 100µs 1ms 10ms A T = 25°C T = 175°C Sin gle Pulse C J
Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr td(off) tf Fig 10b. Switching Time Waveforms VDS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % R D VGS R G D.U.T. 10V -VDD Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 0.01 0.1 Notes: 1. Duty factor D =t / t 2. Peak T= P x Z + T 1 2 J DM thJC C P t t DM t , Rectangular Pulse Duration (sec) Thermal Response (Z ) thJC 0.01 0.02 0.05 0.10 0.20 D = 0.50 SINGLE PULSE (THERMAL RESPONSE) 25 50 75 100 125 150 175 T , Case Temperature( C) I , Drain Current (A) D
D.U.T. VDS IDIG 3mA VGS .3µF 50KΩ .2µF12V Current Regulator Same Type as D.U.T. Current Sampling Resistors 10 V Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 13b. Gate Charge Test CircuitFig 13a. Basic Gate Charge Waveform 200 400 600 800 1000 1200 25 50 75 100 125 150 175 J E , Single Pulse Avalanche Energy (mJ)AS A Starting T , Junction Temperature (°C ) I TOP 11A 20A BOTTOM 28A V = 25V D DD Fig 12b. Unclamped Inductive Waveforms Fig 12a. Unclamped Inductive Test Circuit tp V (BR)DSS IAS R G IAS 0. 01Ωtp D.U.T LV DS - V DD DRIVER A 15V 20V
P.W. Period di/dt Diode Recovery dv/dt Ripple ≤ 5% Body Diode Forward Drop Re-Applied Voltage Reverse Recovery Current Body Diode Forward Current VGS =10V VDD ISD Driver Gate Drive D.U.T. ISD Waveform D.U.T. VDS Waveform Inductor Curent D = P.W . Period Fig 14. For N-Channel HEXFETS * VGS = 5V for Logic Level Devices Peak Diode Recovery dv/dt Test Circuit R G VDD
- dv/dt controlled by RG
- Driver same type as D.U.T.
- ISD controlled by Duty Factor "D"
- D.U.T. - Device Under Test D.U.T Circuit Layout Considerations
- Low Stray Inductance
- Ground Plane
- Low Leakage Inductance Current Transformer
10.16 (.400) REF. 6.47 (.255) 6.18 (.243) 2.61 (.103) 2.32 (.091) 8.89 (.350) REF. - B - 1.32 (.052) 1.22 (.048) 2.79 (.110) 2.29 (.090) 1.39 (.055) 1.14 (.045) 5.28 (.208) 4.78 (.188) 4.69 (.185) 4.20 (.165) 10.54 (.415) 10.29 (.405) - A - 1 3 15.49 (.610) 14.73 (.580) 3X 0.93 (.037) 0.69 (.027) 5.08 (.200) 3X 1.40 (.055) 1.14 (.045) 1.78 (.070) 1.27 (.050) 1.40 (.055) MAX. NOTES: 1 DI MENSI ONS AFTER SOLDER DI P. 2 DI MENSI ONI NG & TOLERANCI NG PER ANSI Y14.5M, 1982. 3 CONTROLLI NG DI MENSION : I NCH. 4 HEATSINK & LEAD DI MENSI ONS DO NOT INCLUDE BURRS. 0.55 (.022) 0.46 (.018) 0.25 (.010) M B A M MI NI MUM RECOMMENDED FOOTPRI NT 11.43 (.450) 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) LEAD ASSI GNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 2.54 (.100) PART NUMBERINTERNATIONAL RECTIFIER LOGO DATE CODE (YYW W ) YY = YEAR WW = WE EK ASSEMBLY LOT CODE F530S 9B 1M 9246 A
Tape & Reel Information D 2Pak WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 5/98 TRR FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) TRL FEED DIRECTION 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) MAX. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) MIN. 30.40 (1.197) MAX. 26.40 (1.039) 24.40 (.961) NOTES : 1. COMFORMS TO EIA-418. 2. CO N TR O LLING DIM ENSIO N : M ILLIM ETER. 3. DIMENSION MEASURED @ HUB. 4. I NCLUDES FLANGE DI STORTI ON @ OUTER EDGE.