F29C51001 ETC1 | Alldatasheet

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F29C51001T/F29C51001B V1.0 May 1999 Functional Block Diagram Capacitance (1,2) NOTE: 1. Capacitance is sampled and not 100% tested. 2. T A = 25 C, V CC = 5V 10%, f = 1 MHz. Latch Up Characteristics (1) NOTE: 1. Includes all pins except V CC . Test conditions: V CC = 5V, one pin at a time. AC Test Load Symbol Parameter Test mSetup Typ. Max. Units C IN Input Capacitance V IN = 0 6 8 pF C OUT Output Capacitance V OUT = 0 8 12 pF C IN2 Control Pin Capacitance V IN = 0 8 10 pF Parameter Min. Max. Unit Input Voltage with Respect to GND on A , OE -1 +13 V Input Voltage with Respect to GND on I/O, address or control pins -1 V CC + 1 V V CC Current -100 +100 mA Address buffer & latchesA0–A16 51001-05 I/O Buffer & Data Latches I/O0–I/O7 Y-Decoder 1,048,576 Bit Memory Cell ArrayX-Decoder Control Logic CE OE WE 51001-06 IN3064 or Equivalent IN3064 or Equivalent 2.7 kΩ 6.2 kΩ +5.0 V IN3064 or Equivalent IN3064 or Equivalent C L = 100 pF Device Under Test

F29C51001T/F29C51001B V1.0 May 1999 Absolute Maximum Ratings (1) NOTE: 1. Stress greater than those listed unders “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. No more than one output maybe shorted at a time and not exceeding one second long. (over the commercial operating range) Symbol Parameter Commercial Extended Unit V IN Input Voltage (input or I/O pins) -2 to +7 -2 to +7 V V IN Input Voltage (A pin, OE) -2 to +13 -2 to +13 V V CC Power Supply Voltage -0.5 to +5.5 -0.5 to +5.5 V T STG Storage Temerpature (Plastic) -65 to +125 -65 to +150 C T OPR Operating Temperature 0 to +70 -40 to + 125 C I OUT Short Circuit Current (2) 200 (Max.) 200 (Max.) mA Parameter Name Parameter Test Conditions Min. Max. Unit V IL Input LOW Voltage V CC = V CC Min. — 0.8 V V IH Input HIGH Voltage V CC = V CC Max. 2 — V I IL Input Leakage Current V IN = GND to V CC , V CC = V CC Max. — m A I OL Output Leakage Current V OUT = GND to V CC , V CC = V CC Max. — m A V OL Output LOW Voltage V CC = V CC Min., I OL = 2.1mA — 0.4 V V OH Output HIGH Voltage V CC = V CC Min, I OH = -400 m A 2.4 — V I CC1 Read Current CE = OE = V IL , WE = V IH , all I/Os open, Address input = V IL IH , at f = 1/t RC Min., V CC = V CC Max. — 40 mA I CC2 Program Current CE = WE = VIL, OE = V IH , V CC = V CC Max. — 50 mA I SB TTL Standby Current CE = OE = WE = V IH , VCC = VCC Max. — 2 mA ISB1 CMOS Standby Current CE = OE = WE = VCC – 0.3V, VCC = VCC Max. — 100 mA VH Device ID Voltage for A9 CE = OE = VIL, WE = VIH 11.5 12.5 V IH Device ID Current for A9 CE = OE = VIL, WE = VIH, A9 = VH Max. — 50 mA

SyncMOS F29C51001T/F29C51001B 5F29C51001T/F29C51001B V1.0 May 1999 (over all temperature ranges) Read Cycle Program (Erase/Program) Cycle Parameter Name Parameter -45 -70 -90 tRC Read Cycle Time 45 — 70 — 90 — ns tAA Address Access Time — 45 — 70 — 90 ns tACS Chip Enable Access Time — 45 — 70 — 90 ns tOE Output Enable Access Time — 25 — 35 — 45 ns tCLZ CE Low to Output Active 0 — 0 — 0 — ns tOLZ OE Low to Output Active 0 — 0 — 0 — ns tDF Output Enable or Chip Disable to Output in High Z 0 15 0 20 0 30 ns tOH Output Hold from Address Change 0 — 0 — 0 — ns Parameter Name Parameter -45 -70 -90 tWC Program Cycle Time 45 — — 70 — — 90 — — ns tAS Address Setup Time 0 — — 0 — — 0 — — ns tAH Address Hold Time 35 — — 45 — — 45 — — ns tCS CE Setup Time 0 — — 0 — — 0 — — ns tCH CE Hold Time 0 — — 0 — — 0 — — ns tOES OE Setup Time 0 — — 0 — — 0 — — ns tOEH OE High Hold Time 0 — — 0 — — 0 — — ns tWP WE Pulse Width 25 — — 35 — — 45 — — ns tWPH WE Pulse Width High 20 — — 35 — — 38 — — ns tDS Data Setup Time 20 — — 25 — — 30 — — ns tDH Data Hold Time 0 — — 0 — — 0 — — ns tWHWH1 Programming Cycle — — 20 — — 20 — — 20 ms tWHWH2 Sector Erase Cycle — — 10 — — 10 — — 10 ms tWHWH3 Chip Erase Cycle — 500 — — 500 — — 500 — ms

SyncMOS F29C51001T/F29C51001B F29C51001T/F29C51001B V1.0 May 1999 Waveforms of Read Cycle Waveforms of WE Controlled-Program Cycle NOTES: 1. I/O7: The output is the complement of the data written to the device. 2. PA: The address of the memory location to be programmed. 3. PD: The data at the byte address to be programmed. tRC tAA tCE tOE tCLZ tOH tAA tOLZ tDF ADDRESS CE OE WE I/O VALID DATA OUT VALID DATA OUT HIGH-Z 51001-07 HIGH-Z tWC tAS PA5555H tWHWH1 tWPHtCS tRCtAH tDS tDH tWPtOES tDF tOH tOE D OU TI/O7(1)PD (3)A0H 51001-08 ADDRESS CE OE WE I/O 3rd bus cycle PA (2) tCH

SyncMOS F29C51001T/F29C51001B 7F29C51001T/F29C51001B V1.0 May 1999 Waveforms of CE Controlled-Program Cycle Waveforms of Erase Cycle(1) NOTES: 1. PA: The address of the memory location to be programmed. 2. PD: The data at the byte address to be programmed. 3. SA: The sector address for Sector Erase. Address = don’t care for Chip Erase. tWC tAS tWHWH1 tWPHtOES tRC tAH tDS tDH tWP tDF tOH tOE D OU TI/O7PD (2)A0H 51001-09 ADDRESS 5555H PA PA (1) WE OE CE I/O tWC tAS tWPH ADDRESS CE OE WE I/O 5555H 5555H 5555H2AAAH 2AAAH SA AAH 55H 80H AAH 55H 30H 10H for Chip Erase 51001-10 tAH tWP tDS tDH tCS

SyncMOS F29C51001T/F29C51001B F29C51001T/F29C51001B V1.0 May 1999 Waveforms of DATA Polling Cycle Waveforms of Toggle Bit Cycle tOEH tCE tWHWH1 tOH tDF tCH CE OE WE I/O7 I/O7 I/O7 VALID DATA OUT HIGH-Z tOE 51001-11 I/O0-I/O6I/O0-I/O6 INVALID VALID DATA OUT HIGH-Z 51001-12 CE WE OE tOEH I/O6

WE must be HIGH prior to CE and OE going LOW. for the read to complete (see Table 1). HIGH-Z, independent of the OE signal. program cycles (see Table 2). cycle can be CE controlled or WE controlled. determined via DATA polling or toggle bit. pre-erased sectors (all bits = 1). Table 1. Operation Modes Decoding

  1. X = Don’t Care, VIH = HIGH, VIL = LOW. VH = 12.5V Max.
  2. PD: The data at the byte address to be programmed.

Table 2. Command Codes

  1. PA: The address of the memory location to be programmed.
  2. PD: The data at the byte address to be programmed.

and the chip erase command (see Table 2). and terminates when the data on DQ7 is “1”. (I/O7) and Toggle Bit (I/O6). polling to indicate the end of a program cycle. bit may begin at any time during a program cycle.

HIGH or LOW. This is shown in table 1. return to the previous mode. 00H, the Top/Bottom Boot Block is unprotected. Boot Block device (see Table 3). ID is presented at the outputs. inhibited when VCC is less than 2.5V. 5ns will not initiate a program cycle. Table 3. Autoselect Decoding

  1. X = Don’t Care, VIH = HIGH, VIL = LOW.

SyncMOS F29C51001T/F29C51001B F29C51001T/F29C51001B V1.0 May 1999 Byte Program Algorithm Chip/Sector Erase Algorithm Write Program Command Sequence Add/Data 5555H/AAH 2AAAH/55H 5555H/A0H Four Bus Cycle Sequence PA/PD DATA Polling (I/O7) or Toggle Bit (I/O6) Programming Completed Verify Byte? Yes No Write Erase Command Sequence Add/Data 5555H/AAH 2AAAH/55H 5555H/80H Six Bus Cycle Sequence 5555H/AAH 2AAAH/55H 5555H/10H (Chip Erase) PA/30H (Sector Erase DATA Polling or Toggle Bit Successfully Completed Erase Complete 51001-14

SyncMOS F29C51001T/F29C51001B 13F29C51001T/F29C51001B V1.0 May 1999 DATA Polling Algorithm Toggle Bit Algorithm NOTE: 1. PBA: The byte address to be programmed. Read I/O7 Address = PBA(1) Program Done Program Done I/O7 = DataNo Yes Read I/O6 No Yes I/O6 Toggle Read I/O6 51002-17

SyncMOS F29C51001T/F29C51001B F29C51001T/F29C51001B V1.0 May 1999 Package Diagrams 32-pin Plastic DIP 32-pin PLCC 15° MAX 0.545/0.555 INDEX-1 .047+.012 – 0

0.210 MAX

0.120 MIN

0.010 MIN

.600 TYP 1.660 MAX. .050 MAX .100 TYP .032 +.012 – 0 .018 +.006 – .002 .010 +.004 – .0004 INDEX-2 EJECTOR MARK 3° - 6° .017 30° .136 – .003 .110 .046 – .003 .025 .050 TYP .450 – .003 .490 – .005 .045X45° .590 – .005 .550 – .003 20 19 18 17 16 15 14 29 30 31 32 1 2 3 4

SyncMOS F29C51001T/F29C51001B 15F29C51001T/F29C51001B V1.0 May 1999 32-pin TSOP-I 0.032 TYP.

0.020 SBC

0.003 MAX

0.020 MAX. 0.024 – 0.004 SEATING PLANE 0.010 See Detail “A” Detail “A” 0.724 TYP. (0.728 MAX.) 0.787 – 0.008 0.009 – 0.002 0.315 TYP. (0.319 MAX.) 0.035 – 0.002 0.047 MAX. 0.005 MIN. 0.007 MAX. Units in inches

SyncMOS Technology Inc. Sales Office : No. 1, Creation Rd. 1, Science-Based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel : 886-3-5792926 Fax : 886-3-5792953 Note 1 : publication date : May 1999. Rev. A Note 2 : all data and specification are subject to change without notice. F29C51001T/F29C51001B V1.0 May 1999