F2977EVBI

F2977 RENESAS | Alldatasheet

Document overview

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Technical content

Features

/square4 Low insertion loss: /square4 0.38dB at 2.4GHz /square4 0.45dB at 6GHz /square4 High Isolation: /square4 39dB at 2.4GHz /square4 High Linearity: /square4 IIP2 +125dBm at 2.4GHz /square4 IIP3 +77dBm at 2.4GHz /square4 P0.1dB compression of +40dBm at 2.4GHz /square4 Second Harmonic: z95dBc at 900MHz /square4 Third Harmonic: z90dBc at 900MHz /square4 Supply voltage: +2.7V to +5.25V /square4 1.8V and 3.3V compatible control logic /square4 z40°C to +105°C operating temperature range /square4 2mm x 2mm, 12zpin VFQFPzN package Block Diagram Figure 1. Block Diagram

Figure 2. Pin Assignments for 2mm x 2mm x 0.5mm 125pin VFQFP5N, NEG12 – Top View Table 1. Pin Descriptions 1 GND Internally grounded. Connect pin directly to paddle ground or as close as possible to pin with thru vias. 2 RFC RF Common Port. If this pin is not 0V DC, then an external coupling capacitor must be used. 3 GND Internally grounded. Connect pin directly to paddle ground or as close as possible to pin with thru vias. 4 GND Internally grounded. Connect pin directly to paddle ground or as close as possible to pin with thru vias. 5 RF1 RF1 Port. If this pin is not 0V DC, then an external coupling capacitor must be used. 6 GND Internally grounded. Connect pin directly to paddle ground or as close as possible to pin with thru vias. 2.5V through a 500kΩ resistor. 10 GND Internally grounded. Connect pin directly to paddle ground or as close as possible to pin with thru vias. 11 RF2 RF2 Port. If this pin is not 0V DC, then an external coupling capacitor must be used. 12 GND Internally grounded. Connect pin directly to paddle ground or as close as possible to pin with thru vias. vias are also required to achieve the specified RF performance.

for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings a. TEP = Temperature of the exposed paddle. b. 5% duty cycle of a 4.6ms period.

Table 3. Recommended Operating Conditions Figure 3. Maximum Operating RF Input Power (Z S = ZL = 50Ω)

Table 4. General Specifications applied at RF1 or RF2 and measured at RFC, unless otherwise noted. control pulse applied to VCTL. a. Items in min/max columns in bold italics are guaranteed by test. b. Items in min/max columns that are not bold italics are guaranteed by design characterization.

© 2017 Integrated Device Technology, Inc. 6 Rev O May 19, 2017

Electrical Characteristics

Table 5. Electrical Characteristics tone signal applied at RF1 or RF2 and measured at RFC, EVKit trace and connector losses are dezembedded, unless otherwise noted. a. Items in min/max columns in bold italics are guaranteed by test. b. Items in min/max columns that are not bold italics are guaranteed by design characterization.

© 2017 Integrated Device Technology, Inc . 7 Rev O May 19 , 2017 Table 6. Electrical Characteristics signal applied at RF1 or RF2 and measured at RFC, EVKit trace and connector losses are dezembedded, unless otherwise noted. a. Items in min/max columns in bold italics are guaranteed by t est. b. Items in min/max columns that are not bold italics are guaranteed by design characterization.

Table 7. Package Thermal Characteristics

© 2017 Integrated Device Technology, Inc . 11 Rev O May 19 , 2017 Control Mode Table 8. Switch Control Truth Table

Application Information

A common V CC power supply should be used for all pins requiring DC pow er. All supply pins should be bypassed with external capac itors to minimize noise and fast transients. Supply noise can degrade noise figure and fast transients can trigger ESD clamps and cause them to fail. Supply voltage change or transients should have a slew rate smaller than 1V / 20µs. In addition, all control pins should remain at 0V (+/z 0.3V) while the supply voltage ramps up or while it returns to zero. Control Pin Interface If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, ringing, etc., the following circuit at the input of each control pin is recommended. This applies to control pins 7 and 8 as shown below. Figure 16. Control Pin Interface Schematic

Figure 19. Electrical Schematic

Table 9. Bill of Material (BOM)

1 Printed Circuit Board F2972 50 Hglyphx+x PCB IDT

Set up a V CC power supply in the voltage range of +2.7V to +5.25V with the power supply output disabled. Connect the disabled VCC supply connection to J6 pin 3 and GND to J6 pin 1, 2, 4, 6, 8, 9, or 10. With the logic control lines disabled, set the HIGH and LOW logic levels to satisfy the levels stated in the electrical specifications table. Connect the disabled logic control lines to J6 EN / LS (pin 5) and V CTL (pin 7). See Table 8 for the logic truth table. Setup the supplies and EVKit as noted in the External Supply Setup and Logic Control Setup sections above. Enable the logic control signals. Set the logic control pins to a logic LOW.

Figure 20. Package Outline Drawing NEG12 PSC54642

Figure 21. Recommended Land Pattern NEG12 PSC54642

© 2017 Integrated Device Technology, Inc. 17 Rev O May 19, 2017 Marking Diagram 2977 YW Line 1 z 2977 = Abbreviated part number. Line 2 z Y = Year code. Line 2 z W = Work week code. Line 2 z = Sequential alpha for lot traceability.

Ordering Information

Orderable Part Number Package MSL Rating Shipping Packaging Temperature F2977NEGK 2mm x 2mm x 0.5mm 12zVFQFPzN MSL1 Cut Reel z40°C to +105°C F2977NEGK8 2mm x 2mm x 0.5mm 12zVFQFPzN MSL1 Tape and Reel z40°C to +105°C F2977EVBI Evaluation Board

© 2017 Integrated Device Technology, Inc. 18 Rev O May 19, 2017

Revision History

Revision Revision Date Description of Change Rev O 2017zMayz19 Initial Release Corporate Headquarters

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San Jose, CA 95138 www.IDT.com Sales 1z800z345z7015 or 408z284z8200 Fax: 408z284z2775 www.IDT.com/go/sales Tech Support www.IDT.com/go/support DISCLAIMER Integrated Device Technology, Inc. (IDT) and its affiliated companies (herein referred to as “IDT”) reserve the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied warranty of merchantability, or nonzinfringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary . All contents of this document are copyright of Int egrated Device Technology, Inc. All rights reserved.

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