F2270_19 IDT | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 29
Technical content
Features
Frequency range: 5MHz to 3000MHz Low insertion loss: 1.1dB at 300MHz Typical/Minimum IIP3 ≥ 50MHz: 62dBm / 46dBm Typical/Minimum IIP2 ≥ 50MHz: 98dBm / 77dBm Up to 35dB attenuation range Attenuation slope versus VCTRL: 10dB/Volt Bi-directional RF ports +36dBm input P1dB VMODE pin allows either positive or negative attenuation control response Linear-in-dB attenuation characteristic Nominal supply voltage: 3.3V or 5V VCTRL range: 0V to 5V using 3.3V or 5V supply -40°C to +105°C operating temperature range 3 × 3 mm, 16-VFQFPN package Block Diagram Figure 1. Block Diagram
Figure 2. Pin Assignments for 3 x 3 x 0.9 mm 16 -VF QF P N Package – Top View
Table 1. Pin Descriptions 13 GND Internally grounded. This pin must be grounded as close to the device as possible.
3 RF1
match. This inductor, if used, should be placed as close to the device as possible.
10 RF2
match. This inductor, if used, should be placed as close to the device as possible.
14 V CTRL
internal 100kΩ series resistor that drives a biased voltage divider network. 15 VDD Power supply input. Bypass to ground (GND) with capacitors as close as possible to the pin.
16 V MODE
VCTRL). This pin is internally connected to a 170kΩ pull-down resistor to ground. pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground planes. These multiple ground vias are also required to achieve the specified RF performance.
for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings
Table 3. Recommended Operating Conditions [a] The power supply voltage must be applied before all other voltages. Figure 3. Maximum Operating CW RF Input Pow er vs. Frequency (ZS = ZL = 75Ω)
© 2019 Integrated Device Technology, Inc. 6 January 16, 2019
Electrical Characteristics
Table 4. Electrical Characteristics (General ) columns that are not shown in bold italics are guaranteed by design characterization.
Table 5. Electrical Characteristics (No External RF Tuning) columns that are not shown in bold italics are guaranteed by design characterization. [c] This value is for part to part variation at the given voltage.
Table 6. Electrical Characteristics – Extended Bandw idth Tuning (E BT ) using external components columns that are not shown in bold italics are guaranteed by design characterization. [c] This value is for part to part variation at the given voltage.
Table 7. Package Thermal Characteristics losses and mismatched effects. All temperatures are referenced to the exposed paddle. Extended band tuning uses L1 = 2.4nH and L2 = 2.8nH to improve RF1 and RF2 port match.
© 2019 Integrated Device Technology, Inc. 20 January 16, 2019
Application Information
The F2270 has been optimized for use in high performance RF applications from 5MHz to 1800MHz and has a full operating range of 5MHz to 3000MHz. Default Start-up VMODE should be tied to either logic LOW (ground) or logic HIGH. If the VCTRL pin is left floating, the part will power up in the minimum attenuation state when VMODE = LOW or in the maximum attenuation state when VMODE = HIGH. V MODE The VMODE pin is used to set the slope of the attenuation. The attenuation is varied by VCTRL as described in the next section. Setting VMODE to a logic LOW (HIGH) will set the attenuation slope to negative (positive). A negative (positive) slope is defin ed as an increased (decreased) attenuation with increasing VCTRL voltage. The Evaluation Kit provides has an on-board jumper to manually set VMODE. Install a jumper on header J7 from VMODE to the pin marked Lo (Hi) to set the device for a negative (positive) slope (see Figure 58). V CTRL The voltage level on the VCTRL pin is used to control the attenuation of the F2270. At VCTRL =0V, the attenuation is a minimum (maximum) in the negative (positive) slope mode. An increasing voltage on V CTRL produces an increasing (decreasing) attenuation respectively. The VCTRL pin has an on-chip pull-up ESD diode so VDD should be applied before VCTRL is applied (see “Recommended Operating Conditions” for details). If this sequencing is not possible, then resistor R5 in the application circuit (see Figure 60) should be set to 1kΩ to limit the current into the VCTRL pin. RF1 and RF2 Ports The F2270 is a bi-directional device, allowing RF1 or RF2 to be used as the RF input. RF1 has some enhanced linearity performance, and therefore should be used as the RF input, when possible, for best results. The F2270 has been designed to accept high RF input power levels; therefore, VDD must be applied prior to the application of RF power to ensure reliability. DC blocking capacitors are required on the RF pins and should be set to a value that results in a low reactance over the frequency range of interest. External series inductors can be added on the RF1 and RF2 lines close to the device to improve the higher frequency match. Pow er Supplies The VDD supply pin should be bypassed with external capacitors to minimize noise and fast transients. Supply noise can degrade performance, and fast transients can trigger ESD clamps and cause them to fail. Supply voltage changes or transients should have a slew rate smaller than 1V/20µs. In addition, all control pins should remain at 0V (+/- 0.3V) while the supply voltage ramps or while it returns to zero. Control Pin Interface If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, or ringing, etc., then implementing the circuit shown in Figure 57 at the input of each control pin is recommended. This applies to control pins 14 (VCTRL) and 16 (VMODE) as shown in Figure 57. Note the recommended resistor and capacitor values do not necessarily match the Evaluation Kit BOM for the case of poor control signal integrity. Extended Bandw idth Tuning (EBT) There are cases where the return loss for the RF ports needs to be better than 18 dB across the frequency range. For this case, adding series inductors just next to the package on the RF ports will accomplish this. The addition of these inductors, 2.4nH on RF1 and 2.8nH on RF2, will degrade the insertion loss and return loss at frequencies above 2GHz.
Figure 57. Control Pin Interface for Signal Integrity
Figure 60. Electrical Schematic
Table 8. Bill of Material (BOM)
1 Printed Circuit Board F2270 Rev 02 IDT
© 2019 Integrated Device Technology, Inc. 25 January 16, 2019 Evaluation Kit Operation Below is a basic setup procedure for configuring and testing the F2270 Evaluation Kit (EVKit). Pre -Configure EVKit This section is a guide to setting up the EVKit for testing. To configure the board for a negative attenuation slope (increasing attenuation with increasing VCTRL voltage), install a header-shunt shorting pin 2 (center pin) and pin 3 (labeled Lo) on header J7 (see Figure 58). For a positive slope (decreasing attenuation with increasing VCTRL voltage), this header-shunt should short pin 1 (labeled Hi) to pin 2 (center pin) on J7. Pow er Supply S etup Without making any connections to the EVKit, set up one fixed power supply (VCC) for 5V with a current limit of 10mA and one variable power supply (VCTRL) set to 0V with a current limit of 5mA. Disable both power supplies. RF Test Setup Set the RF test setup to the desired frequency and power ranges within the specified operating limits noted in this datasheet. Disable the output power of all the RF sources. Connect EVKit to the test setup. With the RF sources and power supplies disabled , connect the fixed 5V power supply to connector J3, the variable supply to J4 , and the RF connections to the desired RF ports. Pow ering Up the EVK it Enable the VCC power supply and observe a DC current of approximately 1.4mA. Enable the VCTRL power supply. Enable the RF sources. Verify that the DC current remains at about 1.4mA. If the J7 connection is set for a negative (positive) attenuation slope , then increasing the variable supply wi ll produce increased (decreased) attenuation for the attenuator path (J1 to J2). Pow ering Dow n the EVK it Disable the RF power applied to the device. Adjust the VCTRL power supply down to 0V and disable it. Disable the VCC power supply. Disconnect the EVKit from the RF test setup.
© 2019 Integrated Device Technology, Inc. 26 January 16, 2019 Package Outline Draw ings The package outline drawings are appended at the end of this document and are accessible from the link below. The packag e information is the most current data available. www.idt.com/document/psc/16-vfqfpn-package-outline-drawing-30-x-30-x-09-mm-05-mm-170-x-170-mm-epad-nlnlg16p2 Marking Diagram A01 637W F2270 Line 1 “A01” is for lot code. Line 2 “637” = has one digit for the year and week that the part was assembled. Line 2 “W” is the assembler code. Line 3 is the abbreviated part number.
Ordering Information
Orderable Part Number Package MSL Rating Shipping Packaging Operating Temperature F2270NLGK 3.0 × 3.0 × 0.9 mm 16-VFQFPN 1 Tray -40°C to +105°C F2270NLGK8 3.0 × 3.0 × 0.9 mm 16-VFQFPN 1 Reel -40°C to +105°C F2270EVBI Evaluation Board
© 2019 Integrated Device Technology, Inc. 27 January 16, 2019
Revision History
Revision Date Description of Change January 16, 2019 Changed the control pin leakage current to reflect the actual measured values. July 25, 2017 Initial release Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, CA 95138 www.IDT.com Sales 1-800-345-7015 or 408-284-8200 Fax: 408-284-2775 www.IDT.com/go/sales Tech Support www.IDT.com/go/support DISCLAIMER Integrated Device Technology, Inc. (IDT) and its affiliated companies (herei n referred to as “IDT”) reserve the right to modify the products and/or specifications described herei n at any time, without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitabil ity of IDT's products for any particular purpose, an implied warranty of merchantability, or non -infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in s uch a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glos sary of common terms, visit www.idt.com/go/glossary . All contents of this document are copyright of Integrated Device Technology, Inc. All rights reserved.
,QWHJUDWHG'HYLFH7HFKQRORJ\\,QF NL/NLG16P2, PSC-4169-02, Rev 05, Page 1
,QWHJUDWHG'HYLFH7HFKQRORJ\\,QF NL/NLG16P2, PSC-4169-02, Rev 05, Page 2 Package Revision History Rev No.Date Created Description Oct 25, 2017 Rev 04 Remove Bookmak at Pdf Format & Update Thickness Tolerance Jan 18, 2018 Rev 05 Change QFN to VFQFPN