F1420 IDT | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 19

Technical content

Features

 Broadband 700MHz to 1.1GHz  17.4dB typical gain at 960MHz  4.5dB noise figure at 960MHz  +42dBm OIP3 at 960MHz  +23.2dBm output P1dB at 960MHz  Single 5V supply voltage  ICC = 105mA  -40°C to +105°C operating temperature  50Ω single-ended input / output impedances  Standby mode for power savings  4mm x 4mm, 24-pin QFN package Block Diagram Figure 1. Block Diagram

Figure 2. Pin Assignments for 4mm x 4mm x 0.9mm QFN Package – Top View Table 1. Pin Descriptions resistor that is connected to GND. 9 RSET Amplifier bias current setting resistor. Connect 2.26kΩ resistor to ground. 10 RDSET Amplifier 2nd bias current setting resistor. Connect 5.76kΩ resistor to ground. 11 VCC Power Supply for the Amplifier. 23 GND Internally grounded. These pins must be grounded as close to the device as possible. 14 RFOUT RF output. Must use external DC block as close to the pin as possible. the pin for best RF performance. planes. These multiple ground vias are also required to achieve the specified RF performance.

The absolute maximum ratings are stress ratings o nly. Stresses greater than those listed below can cause permanent damage to the device. Table 2. Absolute Maximum Ratings

Table 3. Recommended Operating Conditions [a] Input / output load impedance < 2:1 VSWR any phase based in a 50Ω system.

© 2018 Integrated Device Technology, Inc. 5 Rev O January 23, 2018 F1420 Datasheet

Electrical Characteristics

See the F1420 Typical Application Circuit. Specifications apply when operated at VCC = +5.0V, fRF = 960MHz, TEP = +25°C, ZS = ZL = 50, tone spacing = 5MHz, POUT = +4dBm/tone, evaluation board (EVKit) traces and connectors are de-embedded, unless otherwise stated. Table 4. Electrical Characteristics these columns that are not shown in bold italics are guaranteed by design characterization.

Table 5. Package Thermal Characteristics

Figure 17. Electrical Schematic

Table 6. Bill of Material (BOM)

1 Printed Circuit Board F1420 EVKit REV 1 IDT

© 2018 Integrated Device Technology, Inc. 13 Rev O January 23, 2018 F1420 Datasheet Power-On Procedure Set up the voltage supplies and Evaluation Board as described in the "Power Supply Setup" section and set the "Standby Pin” or logic LOW.  Enable the power supply.  The STBY pin now can now be exercised. Power-Off Procedure  Set the STBY pin for logic LOW.  Disable the power supply.

Application Information

The F1420 has been optimized for use in high performance RF applications from 700MHz to 1100MHz. Standby Mode (STBY) The F1420 has a standby pin that allows the amplifier to be turned off to decrease overall power requirements. The pin uses simple logic levels and is compatible with both JECEC 1.8V and JEDEC 3.3V logic. Table 7 lists the amplifier state for the logic. An inter nal pull-down resistor causes the amplifier to default to the on state. Table 7. Standby Truth Table setting, the values are RSET (R1) is 2.26kΩ and RDSET (R2) is 5.76kΩ. not necessarily match the EVKit BOM for the case of poor control signal integrity.

Figure 20. Control Pin Interface for Signal Integrity Table 8 provides the open-circuit DC voltage referenced to ground and resistance value for the control pin listed. Table 8. Digital Pin Voltages and Resistance

8 STBY 0V 580kΩ resistor to ground

© 2018 Integrated Device Technology, Inc. 15 Rev O January 23, 2018 F1420 Datasheet Package Outline Drawings The package outline drawings and land pattern are located at the end of this document. The package information is the most current data available and is subject to change without notice or revision of this document.

© 2018 Integrated Device Technology, Inc. 16 Rev O January 23, 2018 F1420 Datasheet

Ordering Information

Orderable Part Number Package MSL Rating Shipping Packaging Temperature F1420NLGK 4mm x 4mm x 0.9mm 24-pin QFN (NLG24P1) 1 Tray -40° to +105°C F1420NLGK8 4mm x 4mm x 0.9mm 24-pin QFN (NLG24P1) 1 Reel -40° to +105°C F1420EVBI Evaluation Board Marking Diagram IDTF14 20NLGK ZA 721FTG Line 1 and 2 are the part number. Line 3 “ZA” is for die version. Line 3 “721” is one digit for the year and week that the part was assembled. Line 3 “FTG” denotes the production process.

© 2018 Integrated Device Technology, Inc. 17 Rev O January 23, 2018 F1420 Datasheet

Revision History

Revision Revision Date Description of Change O January 23, 2018 Initial release of the datasheet Corporate Headquarters

6024 Silver Creek Valley Road

San Jose, CA 95138 www.IDT.com Sales 1-800-345-7015 or 408-284-8200 Fax: 408-284-2775 www.IDT.com/go/sales Tech Support www.IDT.com/go/support DISCLAIMER Integrated Device Technology, Inc. (IDT) a nd its affiliated companies (herein referred to as “IDT ”) reserve the right to modify the products and/or specificatio ns described herein at any time, without notice, at IDT's sole discretion. Performance spe cifications and operating parameters of the descr ibed p roducts are determined in an independent state and a re not guaranteed to perform the same way when installed in customer products. The informati on contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not l imited to, the suitability of IDT's products for any particular purpose, an implie d warranty of merchantability, or non -infringement of t he intellectual property rights of others. This docume nt is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT's products are not intended for use in applicati ons involving extreme environmental conditions or in life support systems or similar devices where the failu re or malfunction of an IDT product can be reasonably expected to significantly affect the health o r safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an expres s, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other count ries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, v isit www.idt.com/go/glossary . All contents of this document are copyright of Integrated Device Technology, Inc. All rights reserved.