F100364

F100364 NSC | Alldatasheet

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n . = National amare |S Semiconductor 3 f-2) BS F100364 Cc . ° Low Power 16-Input Multiplexer = uU General Description Features 2 The F100364 is a 16-input multiplexer. Data paths are con- @ 35% power reduction of the F100164 o trolled by four Select lines (So—S). Their decoding is shown __2000V ESD protection 4 in the truth table. Output data polarity is the same as the — m Pin/function compatible with F100164 = seleted input data. All inputs have 50 k2 pulldown resistors. _™ Voltage compensated operating range o = -4.2V to -5.7V = eS Be | ao] i<j Logic Symbol c ~ a Deseript 4] toh te te la Ws We ly le te tho tay hie Ha ha hs) in Names escription x 2 lo-hs Data Inputs 2 Ss: So-S3 Select inputs z Data Output Ss Zz TL//10266-1 Connection Diagrams 24-Pin DIP 28-Pin PCC 24-Pin Quad Cerpak a, hates 42 ¥ees hy ho by S3 Sz Sy Vee So 5 oy eo) oar OBR0O08 a2 23-1, 24 23 22 21 20 19 5 Bs lb! 18F 1, Is 221 i lo ry 8 a 42 171. Ie-4 21 Ss Vee @ Deca 1 1s os 20s, Ves 8 De has ad Voo—46 19k, 38 BB Voc Is-4 1 2O By Ws 141 Yoca]7 18F-Veg 38 Bl, 10 748 17 sy Is 6 13 ly edo 6s nanaeae 78 9 101112 lols ta Vers ls ta 's '9 0 1s ha TL/F/10265~4 's 4 Voc Voca z 'g hou 4s TUF/10265-3 Lyi 13h TLF/x0265-2 ©1990 National Semiconductor Corporation TL/F/10265. 1 RRD-820M100/Printed in U.S. A.

to ty So tz ts Si la Is Sz leg Wy Sait Ig tho hy he os hats Wii || Uy a MAM Ht} tt tt | | To Ht EE et a ttt | il Co GU HE ieee pea a a nT CO a to aaa: y vy YY YY V z Truth Table [sees inputs Tatoo) [ss se L L L L H L L is L H L Lt H H L L L L H L \\4 H L H L 5 L H H L lg H H H L 7 L L L H lg H L L H Ig L H L H lio H H L H My H L H H his L H H H lig H H H H his H = HIGH Voltage Level L = LOW Voltage Level

Absolute Maximum Ratings Recommended Operating Above which the useful life may be impaired (Note 1) Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Case romperature To) OC to +85°C Office/Distributors for avalablity and specifications. Miltary gs to + 128°C Storage Temperature (Tsra) 65°C to + 150°C Supply Voltage (Vee) Maximum Junction Temperature (Ty) Commercial ~5.7V to —4.2V Ceramic +175°C Military -5.7V to —4.2V Plastic + 150°C Pin Potential to Ground Pin (Vee) -7.0V to +0.5V Input Voltage (DC) Vee to + 0.5V Output Current (OC Output HIGH) —50 mA ESD (Note 2) < 2000V Commercial Version Vee = ~4.2V to —5.7V, Voc = Voca = GND, To = 0°C to +85°C (Note 3) symboi | Parameter [win | typ | Max_| units | Conditions Vou OutputHIGH Voltage | 1025 | —955 | -670 | mV_| Vin=Viw(Max) | Loading with Vou Output LOW Voltage | ~1830 | -1705 | -1620 or Vit (Min) 509 to ~2.0V Vox OutputHIGH Voltage | -1095 | | | sm Vin= Viv (Min) | Loadingwith Vos | ouputowvorage [| | 1610 | my | rv Mon Son to =20V Vin Input HIGH Voltage —1168 270 mv Guaranteed HIGH Signal for All Inputs it LOW Vi Vit Input LOW Voltage ~ 4980 — 447s | mv | Guaranteed LOW Signal for All Inputs in Input Lowcurent | os | || wA | Vin = Vi iy tn InputtiaHCurent | || a0 | wa | Vin = Vin Max) lee Power uppiy Curent [eo | [45 | ma _|_ inputs Open Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Note 3: The specified limits represent the “worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operate under “worst case” conditions. Ceramic Dual-In-Line Package AC Electrical Characteristics Vee = —4.2V to ~5.7V, Vcc = Voca = GND ‘PLH Propagation Delay 0.90 200 | 090 200 | 090 210 teHL lo-lis to Output tent So, $1 to Output Figures 1, 2 - tPLH Propagation Delay A z 1 2. . z tea. Sp, Sq to Output 00 2.20 00 20 1.10 2.40 trun Transition Time

Commercial Version (continued) PCC and Cerpak AC Electrical Characteristics Vee = —4.2V to ~5.7V, Voc = Voca = GND ‘PLH Propagation Delay o90 180 | 090 180 | 090 190 tPHL lo-li5 to Output ° . " ° . ° tPHL So, S1 to Output . . 7 . ” von Del Figures 1,2 tPLH Propagation Delay TlH Transition Time trHe 20% to 80%, 80% to 20% | 95 1.10 0.36 1.10 tsG-G Skew Gate to Gate tep Tap Teo PCC Only (Note 1) Note 1: Gate to gate skew is defined as the difference in propagation delays beween each of the outputs. Military Version—Preliminary Veg = —4.2V to -5.7V, Voc = Voca = GND, To = ~55°C to + 125°C Symbol | Parameter | in | Max [ units | to | Conditions =| Notes Vou Output HIGH Voltage OC to Vin = Vin (Max) | Loading with 1,2,3 “4 - 025 | 870 | mY Tg s25%0 | or Vit (Min) 500 to —2.0V Vor Output LOW Voltage _ OC to 1620 | mv + 108°C Voue Output HIGH Voltage | _ jy 3¢ mv OC to Vin = Vin (Min) | Loading with 1,2,3 +125°C or Vi_ (Max) 50 to —2.0V Vouc Output LOW Voltage _ OC to 1610 | mV 415°C Vi Input HIGH Voltage _ _ 55°C to | Guaranteed HIGH Signal 1,2,3,4 1165 | 870 | mV | to6°0 | for All Inputs Vit Input LOW Voltage 1475 mv — 55°C to Guaranteed LOW Signal 1,2,3,4 +125°C | for All Inputs lie Input LOW Current A -55°Cto | Veg = -4.2V 1,2,3 Ms +125°C | Vin = Vin (Min)

Military Version—Preliminary (Continued) : Vee = —4.2V to —5.7V, Voc = Voca = GND, To = —55°C to + 125°C symbol | Parameter [min | max | units | to | Conditions Notes hi Input HIGH Current 300 A OC to Vee = —5.7V 1,2,3 » +126°C | Vin = Vin (Max) [| aso | ua [ssc | lee Power Supply Current —55°Cto | Inputs Open 1,2,3 —35 mA 5 +125°C Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals — 55°C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures Note 2: Screen tested 100% on each device at ~ 55°C, + 25°C, and + 125°C, Subgroups, 1, 2, 3, 7 and 8. Note 3: Sampled tested (Method 5005, Table |) on each manufactured lot at — 55°C, + 25°C, and + 125°C, Subgroups A1, 2, 3, 7 and 8. Note 4; Guaranteed by applying specified input condition and testing Vou/VoL. Ceramic Dual-In-Line Package AC Electrical Characteristics Vee = —4.2V to —5.7V, Voc = Veca = GND ~ Te = —55°C Te = 25°C Te = +125°C “mee [min Max | Min Max | Min Max_| “ee tPLH Propagation Delay 050 260 | 060 240 | 060 2.80 12,3 teHL lp-t15 to Output : " teun | Propagation Delay 070 390 | 090 310 | 100 3.50 Figures 1, 2 tpHL So, S; to Output . teu Propagation Delay tea Sp, Sa to Output 0. 2.60 0.60 3.00 ns ttLH Transition Time 4 0.20 1.20 tTHL 20% to 80%, 80% to 20% Cerpak AC Electrical Characteristics Vee = —4.2V to -5.7V, Voc = Veca = GND To = -55°C To = + 25°C Te = +128C syne ee eee .e teHL Ip-l15 to Output . . “ ” . " tHe So, S1 to Output . . : ° . " tPLH Propagation Delay ttLH Transition Time 4 trHe 20% 10 80%, 80% to 20% | °° 20 0.20 1.20 Note 1: F100K 300 Series cold temperature testing is pertormed by temperature soaking (to guarantee junction temperature equals — 55°C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 2: Screen tested 100% on each device at + 25°C, temperature only, Subgroup A9. Note 3: Sample tested (Method 5005, Table |) on each Mig. lot at + 25°C, Subgroup AQ, and at + 125°C, and — 55°C temp., Subgroups A10 and A11 - Note 4: Not tested at + 25°C, + 125°C and - 55°C temperature (design characterization data).

PULSE oO 424 23 22 21 20 19, GENERATOR: Nu ag 2 7 = 3 16 ‘ 8 a 5 4 my “A ‘SCOPE = ww CHAN B 0.25» 0.1 cal hr qT Voc IT 7 ~ = TL/F/10265-6 FIGURE 1. AC Test Circuit FIGURE 2. Propagation Delay and Transition Times

Ordering Information

The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows:

100364 D C QR

Device type $$] “Loci! variations (Basic) QR = Commercial grade device with burn-in QB = Military grade device with environmental Package Code and burn-in processit D = Ceramic DIP turn-in processing F = Quad Cerpak Temperature Range Q = Plastic Leaded Chip Carrier (PCC) C = Commercial (0°C to + 85°C) M = Military (—55°C to + 125°C)

Physical Dimensions inches (milimeters) 4.215 (30.86) 0.025 MAX 0.030-0.055 RAD | Bal S23) (22) fei) f2o) fis) fre] [v7] fie) fis) fra) fed RAD TYP ob \\| p 0.370 (9906) 2370 MAX (9.388) Guss ) “i We Be Gl eC el oy tol We 0.037 +0.005 jez *| tr SEALANT (1.397 20.127) 0.020 0.070 (0 all (asr) MIN (0.508 — 1.778) . MAX 9.225, (5.715) mw am ttt YP (0.203—0.305)

0.125 Tre

~ 0.055, amecere_,| LL sonseon | 175) asso] MAX TYP Te ‘BOTH ENDS J24E (REV G) 24-Lead Ceramic Dual-in-Line Package (0.400 Wide) (D) ‘GSPACES AT | 8.050, r az 2.190, i5.307) | ou nom

8 PEDESTAL

= er omen BO) Boe tm ged Sl,” you sane veh rfe Om + a Nena oss *| leizta ] ey ney a xs 0.410- 0.490 oa 10.97) i" SQUARE {CONTACT DIMENSION) 0.020 o.0r3-0.018 Tems=10) MN WP jam 4572) Fowstons | — 4 (0.127 -0.381) es wa) 0 fer 80 ~0. eet vatamev SQUARE 28-Lead Plastic Chip Carrier (Q) Note: Pedestal as shown on base is not available for F100K ECL products.

o . . x | Physical Dimensions inches (millimeters) (Continued) Lit.# 114925 a 2 0.370 0.004 — 0.006 = TYP We a PIN'NO. 1 £ nen | oe coer Ee A r —? 2] —— ft) 8 9 wi a | 9° | | —l | | 0.075 | t (1.905) 8 PLCS. © 0.016 0.018 | | MAK | 0.035 ~ 0.050 8 (one 0.487 [reese « 0.008 (0.889-1.270) = 0.400 TYP 12.159) L (10.16) MAX ‘SQUARE MAX GLASS wasn eves 24-Lead Quad Cerpak (F) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness be reasonably expected to result in a significant injury mong J to the user. io 7A National Semiconductor ‘National Semiconductor National Semiconductor National Semiconductor National Semicondutores: ‘National Semiconductor Corporation Gmort ddapan Lt Hong Kong Lta Do Brasil Lida (hustala) PTY, Uta $500 Semconcuctor Ore Indusnostrasso 10 Sensei Bldg Sone 512, Sh Foor Ay bg Fana Lima, 1363 St Floor 441 Si Kido Ra 70 Box 50090 (0.8090 Fustonolcouck 15 Nah Shaixy ——_Chnachem Golden Plaza, 50 Andor Con, 62 Motboure, 2008 Santa Clara, CA 95052.6090 West Germany Shunk Ku 77 Mody Road, Trmshatsu East, 14ST Sao Pauo, SP. Brest Vito, Austaha Tel. (408) 721-5000 Tei e141) 1000 Tokyo "60. Yapan owloon, Hong Kang Tor sri 212-5006 Tot (68) 267-5000 Two (10) 290.9240 Tein 527-649 Tat 3299-700" Ter 37201200, Fax (65/11) 211-1761 NSBR BR Faw 8132677498 Fax (08st) 1008s¢ FAX 3.288-7000 Teen. 52906 NSSEA Hx Fax 3.112596 Nabonal does not assume any responsibikty for use of ay circuttry described, no cxrcust patent he 2 are implied and National reserves the nght at any time without notice to change said cwcultry and specifications.